From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stefan Roese Date: Sat, 4 Nov 2006 11:03:12 +0100 (MET) Subject: [U-Boot-Users] Where does U-Boot's CFI driver check for top/bottom boot? In-Reply-To: <454BC9B3.8030806@orkun.us> References: <454B6B23.1060702@freescale.com> <454BC9B3.8030806@orkun.us> Message-ID: <200611041104.36057.sr@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Tolunay, On Friday 03 November 2006 23:58, Tolunay Orkun wrote: > I just looked at the datasheet of your flash part as well as datasheet > of a couple of intel flash parts as well as the current code. As I > suspected for your particular part, it looks like they are using the > same values for "Erase Bank Area 1" and "Erase Bank Area 2" irrespective > of top boot or bottom boot flash. I think, this is fundamentally wrong > and non-compliant with the general CFI standard. > > I will look at some AMD part datasheets. If this is generally available > on all AMD and AMD like parts, we can add it as a patch for AMD only. > Otherwise, we will either add CONFIG_GEOMETRY_REVERSED definition or > restrict a patch to specific vendor ids (and possibly part ids) which is > then a pain to manage. I suggest that we also look at the linux mtd cfi driver to see, if and how those devices are handled. I remember seeing something like "broken CFI table" in the linux bootlog on some boards. Best regards, Stefan