* [U-Boot-Users] Abatron config file for Sequoia AMCC 440EPx
2007-02-18 12:36 [U-Boot-Users] Abatron config file for Sequoia AMCC 440EPx Philippe Villet
2007-02-18 14:46 ` Chuck Gales
@ 2007-02-19 7:28 ` Stefan Roese
1 sibling, 0 replies; 3+ messages in thread
From: Stefan Roese @ 2007-02-19 7:28 UTC (permalink / raw)
To: u-boot
Hi Philippe,
On Sunday 18 February 2007 13:36, Philippe Villet wrote:
> Does anyone have a working abatron BDI2000 config file for debugging U-boot
> on a Sequoia board (AMCC 440EPX - DDR2 controller) ? (pehraps it can be
> added into ftp://ftp.denx.de/pub/BDI2000/)
Attached.
Best regards,
Stefan
=====================================================================
DENX Software Engineering GmbH, HRB 165235 Munich, CEO: Wolfgang Denk
Office: Kirchenstr. 5, D-82194 Groebenzell, Germany
=====================================================================
-------------- next part --------------
;bdiGDB configuration file for AMCC Sequoia 440EPx Reference Board
; ----------------------------------------------------------------
;
[INIT]
; Setup TLB
WTLB 0xF000009D 0x1F00003F ;Boot Space 256MB
WTLB 0x00000095 0x0000003F ;SDRAM 256MB @ 0x00000000
WTLB 0xE0000025 0x1E00003F ;Registers 16KB
WTLB 0xEF000075 0x1EF0003F ;Registers 16MB
WTLB 0xE0010025 0x0E00103F ;Registers 16KB
WTLB 0xC000009D 0x1C00003F ;CPLD 256MB
;
; Setup caches
WSPR 0x370 0x00000000 ;INV0
WSPR 0x371 0x00000000 ;INV1
WSPR 0x372 0x00000000 ;INV2
WSPR 0x373 0x00000000 ;INV3
WSPR 0x390 0x00000000 ;DNV0
WSPR 0x391 0x00000000 ;DNV1
WSPR 0x392 0x00000000 ;DNV2
WSPR 0x393 0x00000000 ;DNV3
WSPR 0x398 0x0001f800 ;DVLIM
WSPR 0x399 0x0001f800 ;IVLIM
;
;clear the esr because of bug
WSPR 0x03e 0x00000000 ;ESR
;
;looks like the 440EPX needs this to run from RAM
WSPR 0x3b3 0x00306000 ;CCR0
;
; Setup Peripheral Bus
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;FLASH CS0 32M x 16
WDCR 0x12 0x00000010 ;Select EBC0_B0AP
WDCR 0x13 0x03017300 ;B0AP: Flash
WDCR 0x12 0x00000000 ;Select EBC0_B0CR
WDCR 0x13 0xfe0ba000 ;B0CR: 32Meg, 16Bit at 0xFE000000
;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;BCSR NVRAM CS2
WDCR 0x12 0x00000012 ;Select EBC0_B2AP
;WDCR 0x13 0x24814580 ;B2AP: CPLD
WDCR 0x13 0x2f8f4580
WDCR 0x12 0x00000002 ;Select EBC0_B2CR
WDCR 0x13 0xc0038000 ;B2CR
WM32 0xef600b08 0x50011400 ;Enable CS2,CS4,CS5, PerAddr07,06 pin GPIO0_OSRL
WM32 0xef600b10 0x50011400 ;Enable CS2,CS4,CS5, PerAddr07,06 pin GPIO0_TSRL
WM32 0xef600b30 0x50000000 ;Enable PerAddr07,06 pin
;
; Setup SDRAM Controller (DDR SDRAM)
WDCR 0x10 0x000000e0 ;Select SDR0_DDRDL0
WDCR 0x11 0x00000000
WDCR 0x10 0x00000002 ;Select DDR0_02a
WDCR 0x11 0x00000000
WDCR 0x10 0x00000000 ;Select DDR0_00
WDCR 0x11 0x0000190A
WDCR 0x10 0x00000001 ;Select DDR0_01
WDCR 0x11 0x01000000
WDCR 0x10 0x00000003 ;Select DDR0_03
WDCR 0x11 0x02030602
WDCR 0x10 0x00000004 ;Select DDR0_04
WDCR 0x11 0x13030300
WDCR 0x10 0x00000005 ;Select DDR0_05
WDCR 0x11 0x0202050E
WDCR 0x10 0x00000006 ;Select DDR0_06
WDCR 0x11 0x0104C823
WDCR 0x10 0x00000007 ;Select DDR0_07
WDCR 0x11 0x000D0100
WDCR 0x10 0x00000008 ;Select DDR0_08
WDCR 0x11 0x02360001
WDCR 0x10 0x00000009 ;Select DDR0_09
WDCR 0x11 0x00011D5F
;WDCR 0x11 0x00011D47
WDCR 0x10 0x0000000a ;Select DDR0_10
WDCR 0x11 0x00000300
WDCR 0x10 0x0000000b ;Select DDR0_11
WDCR 0x11 0x0027C800
WDCR 0x10 0x0000000c ;Select DDR0_12
WDCR 0x11 0x00000003
WDCR 0x10 0x0000000e ;Select DDR0_14
WDCR 0x11 0x00000000
WDCR 0x10 0x00000011 ;Select DDR0_17
WDCR 0x11 0x19000000
;WDCR 0x11 0x1f000000
WDCR 0x10 0x00000012 ;Select DDR0_18
WDCR 0x11 0x19191919
;WDCR 0x11 0x1f1f1f1f
WDCR 0x10 0x00000013 ;Select DDR0_19
WDCR 0x11 0x19191919
;WDCR 0x11 0x1f1f1f1f
WDCR 0x10 0x00000014 ;Select DDR0_20
WDCR 0x11 0x0B0B0B0B
WDCR 0x10 0x00000015 ;Select DDR0_21
WDCR 0x11 0x0B0B0B0B
WDCR 0x10 0x00000016 ;Select DDR0_22
WDCR 0x11 0x00267F0B
;WDCR 0x11 0x0026670B
WDCR 0x10 0x00000017 ;Select DDR0_23
WDCR 0x11 0x00000000
WDCR 0x10 0x00000018 ;Select DDR0_24
WDCR 0x11 0x01010002
WDCR 0x10 0x0000001a ;Select DDR0_26
WDCR 0x11 0x5B260181
WDCR 0x10 0x0000001b ;Select DDR0_27
WDCR 0x11 0x0000682B
WDCR 0x10 0x0000001c ;Select DDR0_28
WDCR 0x11 0x00000000
WDCR 0x10 0x0000001f ;Select DDR0_31
WDCR 0x11 0x00000000
WDCR 0x10 0x0000002a ;Select DDR0_42
WDCR 0x11 0x01000006
WDCR 0x10 0x0000002b ;Select DDR0_43
WDCR 0x11 0x050A0200
WDCR 0x10 0x0000002c ;Select DDR0_44
WDCR 0x11 0x00000002
WDCR 0x10 0x00000002 ;Select DDR0_02b
WDCR 0x11 0x00000001
;
;
DELAY 100
;
; Setup default vector table
WSPR 0x03f 0x00000000 ;IVPR vector base at 0x00000000
WSPR 0x190 0x00000100 ;IVOR0 Critical Input
WSPR 0x191 0x00000200 ;IVOR1 Machine Check
WSPR 0x192 0x00000300 ;IVOR2 Data Storage
WSPR 0x193 0x00000400 ;IVOR3 Instruction Storage
WSPR 0x194 0x00000500 ;IVOR4 External Input
WSPR 0x195 0x00000600 ;IVOR5 Alignment
WSPR 0x196 0x00000700 ;IVOR6 Program
WSPR 0x197 0x00000800 ;IVOR7 Reserved
WSPR 0x198 0x00000c00 ;IVOR8 System Call
WSPR 0x199 0x00000a00 ;IVOR9 Reserved
WSPR 0x19a 0x00001000 ;IVOR10 Decrementer
WSPR 0x19b 0x00001010 ;IVOR11 Fixed Interval Timer
WSPR 0x19c 0x00001020 ;IVOR12 Watchdog Timer
WSPR 0x19d 0x00001100 ;IVOR13 Data TLB Error
WSPR 0x19e 0x00001200 ;IVOR14 Instruction TLB Error
WSPR 0x19f 0x00000f00 ;IVOR15 Debug
;
; Clear DBCR1 and DBCR2
WSPR 0x135 0x00000000 ;DBCR1
WSPR 0x136 0x00000000 ;DBCR2
[TARGET]
JTAGCLOCK 0 ;use 16 MHz JTAG clock
CPUTYPE 440 ;the used target CPU type
SCANMISC 8 ;IR length is 8 bits for 440GX
WAKEUP 50 ;wakeup time after reset
;BREAKMODE SOFT ;SOFT or HARD, HARD uses PPC hardware breakpoint
BREAKMODE HARD ;SOFT or HARD, HARD uses PPC hardware breakpoint
STEPMODE JTAG ;JTAG or HWBP, HWBP uses one or two hardware breakpoints
;MMU XLAT 0xC0000000 ;enable virtual address mode
;PTBASE 0x00000000 ;address where kernel/user stores pointer to page table
;SIO 7 9600 ;TCP port for serial IO
;REGLIST ALL ;select register to transfer to GDB
[HOST]
;IP 192.168.1.1
IP 10.0.0.152
FILE /tftpboot/sequoia/u-boot.bin
FORMAT BIN
DUMP /tftpboot/sequoia/dump.bin
PROMPT 440EPx>
[FLASH]
; user flash at 0xff800000, AM29LV033C (4M x 8)
;WORKSPACE 0xFF800000 ;workspace in SRAM for fast programming algorithm
WORKSPACE 0x00100000 ;workspace in SDRAM for fast programming algorithm
CHIPTYPE AM29BX16 ;Flash type (AM29F | AM29BX8 | AM29BX16 | I28BX8 | I28BX16)
CHIPSIZE 0x200000 ;The size of one flash chip in bytes
BUSWIDTH 16 ;The width of the flash memory bus in bits (8 | 16 | 32)
FILE /tftpboot/sequoia/u-boot.bin
;FORMAT BIN 0xFFF80000
FORMAT BIN 0xFFFA0000
;ERASE 0xFFF80000 ;erase sector 4
;ERASE 0xFFF90000 ;erase sector 4
ERASE 0xFFFA0000 ;erase sector 4
ERASE 0xFFFB0000 ;erase sector 4
ERASE 0xFFFC0000 ;erase sector 4
ERASE 0xFFFD0000 ;erase sector 5
ERASE 0xFFFE0000 ;erase sector 6
ERASE 0xFFFF0000 ;erase sector 7
[REGS]
IDCR1 0x010 0x011 ;SDRAM0_CFGADDR and SDRAM0_CFGDATA
IDCR2 0x012 0x013 ;EBC0_CFGADDR and EBC0_CFGDATA
IDCR3 0x014 0x015 ;EBM0_CFGADDR and EBM0_CFGDATA
IDCR4 0x016 0x017 ;PPM0_CFGADDR and PPM0_CFGDATA
IDCR5 0x00C 0x00D ;CPR0_CFGADDR and CPR0_CFGDATA
IDCR6 0x00E 0x00F ;SDR0_CFGADDR and SDR0_CFGDATA
DMM1 0xD0000000 ;PCI (should map to 2_000_0000)
DMM2 0xE0000000 ;Peripheral (should map to 1_400_0000)
FILE /tftpboot/BDI2000/reg440gx.def
^ permalink raw reply [flat|nested] 3+ messages in thread