[U-Boot-Users] PCI USB Driver

[U-Boot-Users] PCI USB Driver

[Lance Ware]

I have start to write a PCI usb_lowlevel_init i think that i might need 
something else as i am not getting any back from the registers but 0's.  I 
wanted to know how you guys are taking care of the pci write and read commands 
for readl and writel.  Here is my example code.


Code for usb_lowlevel_init 
busdevfunc=pci_find_device(USB_UHCI_VEND_ID,USB_UHCI_DEV_ID,0); /* get PCI 
Device ID */

	if(busdevfunc == -1) {
		printf("Error USB OHCI (%04X,%04X) not 
found\n",USB_UHCI_VEND_ID,USB_UHCI_DEV_ID);
		return -1;
	}
    
    pci_read_config_byte(busdevfunc,PCI_INTERRUPT_LINE,&temp);
	irqvec = temp;
	irq_free_handler(irqvec);
	pci_read_config_byte(busdevfunc,PCI_INTERRUPT_PIN,&temp);
	pci_read_config_dword(busdevfunc,PCI_BASE_ADDRESS_0,&pci_io_addr);

	pci_io_addr &= ~0xf;

    printf("usb_ohci_pci: io_base:0x%08X irq: %d\n", 
		   (unsigned long)pci_io_addr, irqvec);
	
	pci_write_config_dword(busdevfunc, PCI_COMMAND,
				       PCI_COMMAND_MEMORY | 
PCI_COMMAND_MASTER);

	// Find out what hose we are on...
	usb_hose = pci_bus_to_hose(0);
	
	/* Check if I/O accesses and Bus Mastering are enabled. */
	pci_read_config_dword(busdevfunc, PCI_COMMAND, &PciCommandWord);
	if (!(PciCommandWord & PCI_COMMAND_MEMORY)) {
		printf("Error: Can not enable MEM access.\n");
    } 

	/* align the storage */
	if ((__u32)&ghcca[0] & 0xff) {
		err("HCCA not aligned!!");
		return -1;
	}
	phcca = &ghcca[0];
	info("aligned ghcca %p", phcca);
	memset(&ohci_dev, 0, sizeof(struct ohci_device));
	if ((__u32)&ohci_dev.ed[0] & 0x7) {
		err("EDs not aligned!!");
		return -1;
	}
	memset(gtd, 0, sizeof(td_t) * (NUM_TD + 1));
	if ((__u32)gtd & 0x7) {
		err("TDs not aligned!!");
		return -1;
	}
	ptd = gtd;
	gohci.hcca = phcca;
	memset (phcca, 0, sizeof (struct ohci_hcca));

	gohci.disabled = 1;
	gohci.sleeping = 0;
	gohci.irq = -1;
	gohci.regs = bus_to_phys(busdevfunc,pci_io_addr);


	gohci.flags = 0;
	gohci.slot_name = "pci-usb";

[U-Boot-Users] PCI USB Driver

[Matthias Fuchs]

Hi Lance,

On Thursday 29 March 2007 21:00, Lance Ware wrote:
> I have start to write a PCI usb_lowlevel_init i think that i might need
> something else as i am not getting any back from the registers but 0's.  I
> wanted to know how you guys are taking care of the pci write and read
I did the same on a 405GPr board with a PCI OHCI controller. After adding 
swaps at the correct places I got USB running. Additionally  I am using these 
macros for readl and writel:

#define readl(a) swap_32(in32((u32)(a)))
#define writel(a, b) out32((u32)(b), swap_32((u32)(a)))

I will cleanup my work and post the patches when I find some time for it.

Matthias

> commands for readl and writel.  Here is my example code.
>
>
> Code for usb_lowlevel_init
> busdevfunc=pci_find_device(USB_UHCI_VEND_ID,USB_UHCI_DEV_ID,0); /* get PCI
> Device ID */
>
> 	if(busdevfunc == -1) {
> 		printf("Error USB OHCI (%04X,%04X) not
> found\n",USB_UHCI_VEND_ID,USB_UHCI_DEV_ID);
> 		return -1;
> 	}
>
>     pci_read_config_byte(busdevfunc,PCI_INTERRUPT_LINE,&temp);
> 	irqvec = temp;
> 	irq_free_handler(irqvec);
> 	pci_read_config_byte(busdevfunc,PCI_INTERRUPT_PIN,&temp);
> 	pci_read_config_dword(busdevfunc,PCI_BASE_ADDRESS_0,&pci_io_addr);
>
> 	pci_io_addr &= ~0xf;
>
>     printf("usb_ohci_pci: io_base:0x%08X irq: %d\n",
> 		   (unsigned long)pci_io_addr, irqvec);
>
> 	pci_write_config_dword(busdevfunc, PCI_COMMAND,
> 				       PCI_COMMAND_MEMORY |
> PCI_COMMAND_MASTER);
>
> 	// Find out what hose we are on...
> 	usb_hose = pci_bus_to_hose(0);
>
> 	/* Check if I/O accesses and Bus Mastering are enabled. */
> 	pci_read_config_dword(busdevfunc, PCI_COMMAND, &PciCommandWord);
> 	if (!(PciCommandWord & PCI_COMMAND_MEMORY)) {
> 		printf("Error: Can not enable MEM access.\n");
>     }
>
> 	/* align the storage */
> 	if ((__u32)&ghcca[0] & 0xff) {
> 		err("HCCA not aligned!!");
> 		return -1;
> 	}
> 	phcca = &ghcca[0];
> 	info("aligned ghcca %p", phcca);
> 	memset(&ohci_dev, 0, sizeof(struct ohci_device));
> 	if ((__u32)&ohci_dev.ed[0] & 0x7) {
> 		err("EDs not aligned!!");
> 		return -1;
> 	}
> 	memset(gtd, 0, sizeof(td_t) * (NUM_TD + 1));
> 	if ((__u32)gtd & 0x7) {
> 		err("TDs not aligned!!");
> 		return -1;
> 	}
> 	ptd = gtd;
> 	gohci.hcca = phcca;
> 	memset (phcca, 0, sizeof (struct ohci_hcca));
>
> 	gohci.disabled = 1;
> 	gohci.sleeping = 0;
> 	gohci.irq = -1;
> 	gohci.regs = bus_to_phys(busdevfunc,pci_io_addr);
>
>
> 	gohci.flags = 0;
> 	gohci.slot_name = "pci-usb";
>
>
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