From mboxrd@z Thu Jan 1 00:00:00 1970 From: Thierry Reding Date: Tue, 02 Oct 2007 07:17:53 +0200 Subject: [U-Boot-Users] [PATCH] Add definition of SA1110 register for PXA2xx processors. Message-ID: <20071002051753.16402.86018.stgit@avionic-0027.adnet.avionic-design.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de This patch adds the SA1110 register definition for PXA2xx processors. I could only get my hands on a PXA27x developer's manual, but I'm assuming the register is available on previous generations as well. If not it should be moved into a CONFIG_PXA27X section. Cheers, Thierry --- include/asm-arm/arch-pxa/pxa-regs.h | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h index 9b4da3a..099db5a 100644 --- a/include/asm-arm/arch-pxa/pxa-regs.h +++ b/include/asm-arm/arch-pxa/pxa-regs.h @@ -2211,6 +2211,7 @@ typedef void (*ExcpHndlr) (void) ; #define MCIO1 __REG(0x4800003C) /* Card interface I/O Space Socket 1 Timing Configuration */ #define MDMRS __REG(0x48000040) /* MRS value to be written to SDRAM */ #define BOOT_DEF __REG(0x48000044) /* Read-Only Boot-Time Register. Contains BOOT_SEL and PKG_SEL */ +#define SA1110 __REG(0x48000064) /* Static Memory SA-1110 Compatibility Configuration Register */ #define MDREFR_K2FREE (1 << 25) /* SDRAM Free-Running Control */ #define MDREFR_K1FREE (1 << 24) /* SDRAM Free-Running Control */