From: Lucas Jin <lucasjin@gmail.com>
To: u-boot@lists.denx.de
Subject: [U-Boot-Users] [patch] rtl8139.c: use PCI IO map
Date: Tue, 16 Oct 2007 09:17:41 +0800 [thread overview]
Message-ID: <200710160917377963483@gmail.com> (raw)
In-Reply-To: 47138DA4.5010206@sonare.it
Masami Komiya Wrote:
Yes, you are right, I didn't configurated my board correctly.
>Dear Lucas,
>
>I used RTL8139 driver on MPC8241 board. It works fine.
>The followings are defined in the configuration file.
>
>/* PCI memory */
>#define CFG_IBAT2L (0x80000000 | BATL_PP_10 | BATL_CACHEINHIBIT)
>#define CFG_IBAT2U (0x80000000 | BATU_BL_256M | BATU_VS | BATU_VP)
The former developer of my project changed the two defines above to
#define CFG_IBAT2L (0x78000000 | BATL_PP_10 | BATL_CACHEINHIBIT)
#define CFG_IBAT2U (0x78000000 | BATU_BL_128K | BATU_VS | BATU_VP)
and I didn't realize that.
>
>#define CFG_DBAT2L CFG_IBAT2L
>#define CFG_DBAT2U CFG_IBAT2U
>
>/* PCI Stuff */
>#define CONFIG_PCI
>#define CONFIG_PCI_PNP
>
>#define CONFIG_NET_MULTI
>
>#define CONFIG_RTL8139
>/* for RTL8139 */
>#define KSEG1ADDR(x) ({u32 _x=le32_to_cpu(*(u32 *)(x)); (&_x);})
>#define _IO_BASE 0x00000000
>
>The result of pci command are
>
># pci
>Scanning PCI devices on bus 0
>BusDevFun VendorId DeviceId Device Class Sub-Class
>_____________________________________________________________
>00.00.00 0x1057 0x0006 Bridge device 0x00
>00.0c.00 0x10ec 0x8139 Network controller 0x00
> :
>
># pci header 00.0c.00
> vendor ID = 0x10ec
> device ID = 0x8139
> command register = 0x0007
> status register = 0x0290
> revision ID = 0x20
> class code = 0x02 (Network controller)
> sub class code = 0x00
> programming interface = 0x00
> cache line = 0x08
> latency time = 0x20
> header type = 0x00
> BIST = 0x00
> base address 0 = 0x00000001
> base address 1 = 0x80000000
> base address 2 = 0x00000000
> base address 3 = 0x00000000
> base address 4 = 0x00000000
> base address 5 = 0x00000000
> cardBus CIS pointer = 0x00000000
> sub system vendor ID = 0x11ec
> sub system ID = 0x8139
> expansion ROM base address = 0x00000000
> interrupt line = 0xff
> interrupt pin = 0x01
> min Grant = 0x20
> max Latency = 0x40
>
>Masami Komiya
>
>-------------------------------------------------------------------------
>This SF.net email is sponsored by: Splunk Inc.
>Still grepping through log files to find problems? Stop.
>Now Search log events and configuration files using AJAX and a browser.
>Download your FREE copy of Splunk now >> http://get.splunk.com/
>_______________________________________________
>U-Boot-Users mailing list
>U-Boot-Users at lists.sourceforge.net
>https://lists.sourceforge.net/lists/listinfo/u-boot-users
------------------
Thanks
Lucas Jin
next prev parent reply other threads:[~2007-10-16 1:17 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-10-13 13:53 [U-Boot-Users] [patch] rtl8139.c: use PCI IO map Lucas Jin
2007-10-13 14:43 ` Wolfgang Denk
2007-10-13 15:16 ` Lucas Jin
2007-10-13 15:46 ` Shinya Kuribayashi
2007-10-14 1:12 ` Lucas Jin
2007-10-15 15:56 ` Masami Komiya
2007-10-16 1:17 ` Lucas Jin [this message]
2007-10-15 19:02 ` Scott Wood
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=200710160917377963483@gmail.com \
--to=lucasjin@gmail.com \
--cc=u-boot@lists.denx.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox