From mboxrd@z Thu Jan 1 00:00:00 1970 From: Anton Vorontsov Date: Mon, 22 Oct 2007 19:58:19 +0400 Subject: [U-Boot-Users] [PATCH] MPC8568E-MDS: set up QE pario for UART1 Message-ID: <20071022155819.GA14417@localhost.localdomain> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de To use UART1 on the MPC8568E-MDS, QE pario pins PC[0:3] should be set up appropriately. Signed-off-by: Anton Vorontsov --- board/mpc8568mds/mpc8568mds.c | 7 +++++++ 1 files changed, 7 insertions(+), 0 deletions(-) diff --git a/board/mpc8568mds/mpc8568mds.c b/board/mpc8568mds/mpc8568mds.c index 2b3f44f..ff04ddc 100644 --- a/board/mpc8568mds/mpc8568mds.c +++ b/board/mpc8568mds/mpc8568mds.c @@ -84,6 +84,13 @@ const qe_iop_conf_t qe_iop_conf_tab[] = { {1, 31, 2, 0, 3}, /* GTX125 */ {4, 6, 3, 0, 2}, /* MDIO */ {4, 5, 1, 0, 2}, /* MDC */ + + /* UART1 */ + {2, 0, 1, 0, 2}, /* UART_SOUT1 */ + {2, 1, 1, 0, 2}, /* UART_RTS1 */ + {2, 2, 2, 0, 2}, /* UART_CTS1 */ + {2, 3, 2, 0, 2}, /* UART_SIN1 */ + {0, 0, 0, 0, QE_IOP_TAB_END}, /* END of table */ }; -- 1.5.0.6