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* [U-Boot-Users] [PATCH] resubmit PPC4xx: Minimal changes to add vxWorks support
@ 2007-11-30 17:35 Niklaus Giger
  2007-11-30 19:55 ` Stefan Roese
  0 siblings, 1 reply; 2+ messages in thread
From: Niklaus Giger @ 2007-11-30 17:35 UTC (permalink / raw)
  To: u-boot

Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
---
 cpu/ppc4xx/start.S |    6 +++++-
 1 files changed, 5 insertions(+), 1 deletions(-)

diff --git a/cpu/ppc4xx/start.S b/cpu/ppc4xx/start.S
index 9626b65..97be4eb 100644
--- a/cpu/ppc4xx/start.S
+++ b/cpu/ppc4xx/start.S
@@ -1432,7 +1432,11 @@ relocate_code:
 	dccci	0,0			/* Invalidate data cache, now no longer our stack */
 	sync
 	isync
-	addi	r1,r0,0x0000		/* TLB entry #0 */
+#ifdef CFG_TLB_FOR_BOOT_FLASH
+	addi	r1,r0,CFG_TLB_FOR_BOOT_FLASH	/* Use defined TLB */
+#else
+	addi	r1,r0,0x0000		/* Default TLB entry is #0 */
+#endif
 	tlbre	r0,r1,0x0002		/* Read contents */
 	ori	r0,r0,0x0c00		/* Or in the inhibit, write through bit */
 	tlbwe	r0,r1,0x0002		/* Save it out */
-- 
1.5.2

^ permalink raw reply related	[flat|nested] 2+ messages in thread

* [U-Boot-Users] [PATCH] resubmit PPC4xx: Minimal changes to add vxWorks support
  2007-11-30 17:35 [U-Boot-Users] [PATCH] resubmit PPC4xx: Minimal changes to add vxWorks support Niklaus Giger
@ 2007-11-30 19:55 ` Stefan Roese
  0 siblings, 0 replies; 2+ messages in thread
From: Stefan Roese @ 2007-11-30 19:55 UTC (permalink / raw)
  To: u-boot

On Friday 30 November 2007, Niklaus Giger wrote:
> Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
> ---
>  cpu/ppc4xx/start.S |    6 +++++-
>  1 files changed, 5 insertions(+), 1 deletions(-)
>
> diff --git a/cpu/ppc4xx/start.S b/cpu/ppc4xx/start.S
> index 9626b65..97be4eb 100644
> --- a/cpu/ppc4xx/start.S
> +++ b/cpu/ppc4xx/start.S
> @@ -1432,7 +1432,11 @@ relocate_code:
>  	dccci	0,0			/* Invalidate data cache, now no longer our stack */
>  	sync
>  	isync
> -	addi	r1,r0,0x0000		/* TLB entry #0 */
> +#ifdef CFG_TLB_FOR_BOOT_FLASH
> +	addi	r1,r0,CFG_TLB_FOR_BOOT_FLASH	/* Use defined TLB */
> +#else
> +	addi	r1,r0,0x0000		/* Default TLB entry is #0 */
> +#endif
>  	tlbre	r0,r1,0x0002		/* Read contents */
>  	ori	r0,r0,0x0c00		/* Or in the inhibit, write through bit */
>  	tlbwe	r0,r1,0x0002		/* Save it out */

Ahh. There you go. Ok, added to my list.

Thanks.

Viele Gr??e,
Stefan

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