From: Anton Vorontsov <avorontsov@ru.mvista.com>
To: u-boot@lists.denx.de
Subject: [U-Boot-Users] [PATCH] MPC8568E-MDS: set up QE pario for UART1
Date: Wed, 9 Jan 2008 19:08:36 +0300 [thread overview]
Message-ID: <20080109160836.GA6116@localhost.localdomain> (raw)
In-Reply-To: <4784E42E.4000400@freescale.com>
On Wed, Jan 09, 2008 at 09:11:42AM -0600, Timur Tabi wrote:
> Anton Vorontsov wrote:
> >To use UART1 on the MPC8568E-MDS, QE pario pins PC[0:3] should
> >be set up appropriately.
>
> On 83xx, the pario pins are configured via the DTS.
And this is wrong way to do pario setup. This was discussed already,
and the argument is "device tree isn't configuration file. fix the
firmware, and if needed place temporary fixups into the Linux board
file".
By the way, I was disagreeing and arguing about that too. ;-)
See:
http://ozlabs.org/pipermail/linuxppc-dev/2007-August/040601.html
http://ozlabs.org/pipermail/linuxppc-dev/2007-August/040691.html
[and more...]
Though there we're discussing GPIOs, but it is more than applicable
to par io configuration, i.e. setting up pins' dedicated functions.
Also see documentation update:
http://ozlabs.org/pipermail/linuxppc-dev/2008-January/049418.html
> So now we have the DTS
> method for 83xx, and U-Boot for 85xx. Unless there's a U-Boot QE UART
> driver that I don't know about, this configuration should be done in the
> DTS, not here.
UART1 on MPC8568E-MDS is second DUART, not QE UART. Though Second DUART
is using QE Par I/O pins.
Thanks,
--
Anton Vorontsov
email: cbou at mail.ru
backup email: ya-cbou at yandex.ru
irc://irc.freenode.net/bd2
next prev parent reply other threads:[~2008-01-09 16:08 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-10-22 15:58 [U-Boot-Users] [PATCH] MPC8568E-MDS: set up QE pario for UART1 Anton Vorontsov
2008-01-09 7:54 ` Andy Fleming
2008-01-09 15:11 ` Timur Tabi
2008-01-09 16:08 ` Anton Vorontsov [this message]
2008-01-09 16:04 ` Timur Tabi
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