[U-Boot-Users] [PATCH] MPC8568E-MDS: set up QE pario for UART1

[U-Boot-Users] [PATCH] MPC8568E-MDS: set up QE pario for UART1

[Anton Vorontsov]

To use UART1 on the MPC8568E-MDS, QE pario pins PC[0:3] should
be set up appropriately.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
---
 board/mpc8568mds/mpc8568mds.c |    7 +++++++
 1 files changed, 7 insertions(+), 0 deletions(-)

diff --git a/board/mpc8568mds/mpc8568mds.c b/board/mpc8568mds/mpc8568mds.c
index 2b3f44f..ff04ddc 100644
--- a/board/mpc8568mds/mpc8568mds.c
+++ b/board/mpc8568mds/mpc8568mds.c
@@ -84,6 +84,13 @@ const qe_iop_conf_t qe_iop_conf_tab[] = {
 	{1, 31, 2, 0, 3}, /* GTX125 */
 	{4,  6, 3, 0, 2}, /* MDIO */
 	{4,  5, 1, 0, 2}, /* MDC */
+
+	/* UART1 */
+	{2, 0, 1, 0, 2}, /* UART_SOUT1 */
+	{2, 1, 1, 0, 2}, /* UART_RTS1 */
+	{2, 2, 2, 0, 2}, /* UART_CTS1 */
+	{2, 3, 2, 0, 2}, /* UART_SIN1 */
+
 	{0,  0, 0, 0, QE_IOP_TAB_END}, /* END of table */
 };
 
-- 
1.5.0.6

[U-Boot-Users] [PATCH] MPC8568E-MDS: set up QE pario for UART1

[Andy Fleming]

applied, thanks!

For both of the 8568 patches, I modified them to apply to the top of
tree.  Since it was a simple change (mpc8568mds directory was moved to
board/freescale/), I did it.

On 10/22/07, Anton Vorontsov <avorontsov@ru.mvista.com> wrote:
> To use UART1 on the MPC8568E-MDS, QE pario pins PC[0:3] should
> be set up appropriately.
>
> Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
> ---
>  board/mpc8568mds/mpc8568mds.c |    7 +++++++
>  1 files changed, 7 insertions(+), 0 deletions(-)
>
> diff --git a/board/mpc8568mds/mpc8568mds.c b/board/mpc8568mds/mpc8568mds.c
> index 2b3f44f..ff04ddc 100644
> --- a/board/mpc8568mds/mpc8568mds.c
> +++ b/board/mpc8568mds/mpc8568mds.c
> @@ -84,6 +84,13 @@ const qe_iop_conf_t qe_iop_conf_tab[] = {
>         {1, 31, 2, 0, 3}, /* GTX125 */
>         {4,  6, 3, 0, 2}, /* MDIO */
>         {4,  5, 1, 0, 2}, /* MDC */
> +
> +       /* UART1 */
> +       {2, 0, 1, 0, 2}, /* UART_SOUT1 */
> +       {2, 1, 1, 0, 2}, /* UART_RTS1 */
> +       {2, 2, 2, 0, 2}, /* UART_CTS1 */
> +       {2, 3, 2, 0, 2}, /* UART_SIN1 */
> +
>         {0,  0, 0, 0, QE_IOP_TAB_END}, /* END of table */
>  };
>
> --
> 1.5.0.6
>
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[U-Boot-Users] [PATCH] MPC8568E-MDS: set up QE pario for UART1

[Timur Tabi]

Anton Vorontsov wrote:
> To use UART1 on the MPC8568E-MDS, QE pario pins PC[0:3] should
> be set up appropriately.

On 83xx, the pario pins are configured via the DTS.  So now we have the DTS 
method for 83xx, and U-Boot for 85xx.  Unless there's a U-Boot QE UART driver 
that I don't know about, this configuration should be done in the DTS, not here.

-- 
Timur Tabi
Linux kernel developer at Freescale

[U-Boot-Users] [PATCH] MPC8568E-MDS: set up QE pario for UART1

[Anton Vorontsov]

On Wed, Jan 09, 2008 at 09:11:42AM -0600, Timur Tabi wrote:
> Anton Vorontsov wrote:
> >To use UART1 on the MPC8568E-MDS, QE pario pins PC[0:3] should
> >be set up appropriately.
> 
> On 83xx, the pario pins are configured via the DTS.

And this is wrong way to do pario setup. This was discussed already,
and the argument is "device tree isn't configuration file. fix the
firmware, and if needed place temporary fixups into the Linux board
file".

By the way, I was disagreeing and arguing about that too. ;-)

See:
http://ozlabs.org/pipermail/linuxppc-dev/2007-August/040601.html
http://ozlabs.org/pipermail/linuxppc-dev/2007-August/040691.html
[and more...]

Though there we're discussing GPIOs, but it is more than applicable
to par io configuration, i.e. setting up pins' dedicated functions.

Also see documentation update:
http://ozlabs.org/pipermail/linuxppc-dev/2008-January/049418.html

> So now we have the DTS 
> method for 83xx, and U-Boot for 85xx.  Unless there's a U-Boot QE UART 
> driver that I don't know about, this configuration should be done in the 
> DTS, not here.

UART1 on MPC8568E-MDS is second DUART, not QE UART. Though Second DUART
is using QE Par I/O pins.


Thanks,

-- 
Anton Vorontsov
email: cbou at mail.ru
backup email: ya-cbou at yandex.ru
irc://irc.freenode.net/bd2

[U-Boot-Users] [PATCH] MPC8568E-MDS: set up QE pario for UART1

[Timur Tabi]

Anton Vorontsov wrote:

> UART1 on MPC8568E-MDS is second DUART, not QE UART. Though Second DUART
> is using QE Par I/O pins.

Ok, then I guess the patch is okay.

-- 
Timur Tabi
Linux kernel developer at Freescale