[U-Boot-Users] U-Boot Ethernet Troubles

[U-Boot-Users] U-Boot Ethernet Troubles

[Kyle McDowell]

In the process of porting uboot to an MPC8280 board I've run into a problem with
Ethernet. Ping and tftpboot failed and after examining the connection with
Wireshark I noticed the initial ARP request is malformed.  

Observed malformed ARP request: 

0000  ff ff ff ff ff ff 00 80  ff ff ff ff ff ff 00 80   ........ ........
0010  ff ff ff ff ff ff 00 80  ff ff ff ff ff ff 00 80   ........ ........
0020  00 00 00 00 00 00 0a 01  00 00 00 00 00 00 00 00   ........ ........
0030  0a 01 00 00 00 00 00 00  0a 01 00 00               ........ ....    

The destination is correct along with the first 2 bytes of the source MAC
address, but the request and the info portions are corrupted.  The pattern looks
vary suspicious.  I just don't have a clue what in my configuration would cause
this type of error.


Example correct ARP request:

0000  ff ff ff ff ff ff 00 c0  CO RR EC T0 08 06 00 01   ........ ........
0010  08 00 06 04 00 01 00 c0  CO RR EC T0 0a 01 01 01   ........ ........
0020  ff ff ff ff ff ff 0a 01  01 0a 00 00 00 00 00 00   ........ ........
0030  00 00 00 00 00 00 00 00  00 00 00 00               ........ ....   


In porting uboot to other boards in the past I've witnessed memory
initialization errors causing issues during Ethernet transactions, but I'm
fairly confident in my DRAM initialization for this board.  

The board has a long track record of working with other boot loaders and
operating systems so a hardware failure is unlikely.

Here is an excerpt from the configs header:

/*
 * Select ethernet configuration
 *
 * If either CONFIG_ETHER_ON_SCC or CONFIG_ETHER_ON_FCC is selected,
 * then CONFIG_ETHER_INDEX must be set to the channel number (1-4 for
 * SCC, 1-3 for FCC)
 *
 * If CONFIG_ETHER_NONE is defined, then either the ethernet routines
 * must be defined elsewhere (as for the console), or CFG_CMD_NET must
 * be removed from CONFIG_COMMANDS to remove support for networking.
 */
#undef	CONFIG_ETHER_ON_SCC		/* Ethernet is not on SCC */
#define CONFIG_ETHER_ON_FCC		/* Ethernet is on FCC     */
#undef	CONFIG_ETHER_NONE		/* No external Ethernet   */

#ifdef CONFIG_ETHER_ON_FCC

#define CONFIG_ETHER_INDEX	1	/* FCC1 is used for Ethernet */

#if   (CONFIG_ETHER_INDEX == 1)

/* - Tx clock is CLK10
 * - Rx clock is CLK12
 * - BDs/buffers on 60x bus
 * - Full duplex
 */
#define CFG_CMXFCR_MASK	(CMXFCR_FC1 | CMXFCR_RF1CS_MSK | CMXFCR_TF1CS_MSK)
#define CFG_CMXFCR_VALUE	(CMXFCR_RF1CS_CLK12 | CMXFCR_TF1CS_CLK10)

#define CFG_CPMFCR_RAMTYPE	0
#define CFG_FCC_PSMR		(FCC_PSMR_FDE | FCC_PSMR_LPB)	

#endif /* CONFIG_ETHER_INDEX */

#define CFG_PHY_ADDR		1
#define CONFIG_MII			/* MII PHY management        */ 
#define CONFIG_BITBANGMII		/* Bit-banged MDIO interface */
#define CONFIG_RESET_PHY_R	1
/*
 * GPIO pins used for bit-banged MII communications
 */
#define MDIO_PORT		1	/* Port A */
#define PHY_RESET_PORT		1	/* Port A */

#define CFG_PHY_RESET		0x00000100 /*PC23 */
#define CFG_MDIO_PIN		0x00000080 /* PC24 */
#define CFG_MDC_PIN		0x00000040 /* PC25 */

#define MDIO_ACTIVE		(iop->pdir |= CFG_MDIO_PIN)	
#define MDIO_TRISTATE		(iop->pdir &= ~CFG_MDIO_PIN) 
#define MDIO_READ		((iop->pdat & CFG_MDIO_PIN) != 0) 

#define MDIO(bit)		if(bit) iop->pdat |= CFG_MDIO_PIN; \
 				else	iop->pdat &= ~CFG_MDIO_PIN 

#define MDC(bit)		if(bit) iop->pdat |= CFG_MDC_PIN; \
 				else	iop->pdat &= ~CFG_MDC_PIN

#define MIIDELAY		udelay(1)
#endif /* CONFIG_ETHER_ON_FCC */

I've never used the DP83843 PHY before but believe I have the reset_phy function
correct (the carrier sense and full duplex LEDs are illuminated:

void reset_phy(void)
{
	volatile ioport_t *iop = ioport_addr ((immap_t *) CFG_IMMR, PHY_RESET_PORT);

	iop->pdat |= CFG_PHY_RESET;
	MIIDELAY;
	iop->pdat &= ~CFG_PHY_RESET;

	udelay(1000);

#if 0
        unsigned short phy_data;

	bb_miiphy_read(NULL, CFG_PHY_ADDR, PHY_ANAR, &phy_data);
	bb_miiphy_read(NULL, CFG_PHY_ADDR, PHY_PHYSTS, &phy_data);
	bb_miiphy_read(NULL, CFG_PHY_ADDR, PHY_BMCR, &phy_data);
#endif

	bb_miiphy_write(NULL, CFG_PHY_ADDR, PHY_ANAR, 0x01E0);

	bb_miiphy_write(NULL, CFG_PHY_ADDR, PHY_BMCR, 0x1200);
} 


Here is what I see at the console:

Net:   FCC1 ETHERNET
Reset Ethernet PHY
### main_loop entered: bootdelay=5

### main_loop: bootcmd="<UNDEFINED>"
=> tftpboot 0x100000 image
Trying FCC1 ETHERNET
Using FCC1 ETHERNET device
TFTP from server 10.1.1.12; our IP address is 10.1.1.26
Filename 'StarsA3I2K'.
Load address: 0x100000
Loading: sending ARP for 0a01010c
ARP broadcast 1
cycles: 60 status: 6c00
T sending ARP for 0a01010c
ARP broadcast 1
cycles: 56 status: 6c00
T sending ARP for 0a01010c
ARP broadcast 1
cycles: 66 status: 6c00
T sending ARP for 0a01010c
ARP broadcast 1
cycles: 60 status: 6c00

Any ideas on potential problems or suggestions on steps for further debugging
would be greatly appreciated.

Thanks,
Kyle McDowell

[U-Boot-Users] U-Boot Ethernet Troubles

[Wolfgang Denk]

In message <loom.20080111T194955-495@post.gmane.org> you wrote:
> In the process of porting uboot to an MPC8280 board I've run into a problem with
> Ethernet. Ping and tftpboot failed and after examining the connection with
> Wireshark I noticed the initial ARP request is malformed.  
...
> In porting uboot to other boards in the past I've witnessed memory
> initialization errors causing issues during Ethernet transactions, but I'm
> fairly confident in my DRAM initialization for this board.  

My initial bet would have been RAM issues, so if  you  are  not  101%
certain I recommend to re-check the initialization sequence.

> => tftpboot 0x100000 image
-----------------------^^^^^
> Trying FCC1 ETHERNET
> Using FCC1 ETHERNET device
> TFTP from server 10.1.1.12; our IP address is 10.1.1.26
> Filename 'StarsA3I2K'.
-----------^^^^^^^^^^^^^

That doesn't match - strange!

> Any ideas on potential problems or suggestions on steps for further debugging
> would be greatly appreciated.

Don't forget to check voltages, clocks, and clock routing!

Best regards,

Wolfgang Denk

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