From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stefan Roese Date: Sat, 16 Feb 2008 06:58:11 +0100 Subject: [U-Boot-Users] [PATCH] PPC440EPx: Reconfigure PLL for 667MHz processor In-Reply-To: <1202231299-26820-1-git-send-email-mike@terascala.com> References: <1202231299-26820-1-git-send-email-mike@terascala.com> Message-ID: <200802160658.11949.sr@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Mike, sorry for the late response. On Tuesday 05 February 2008, Mike Nuss wrote: > On PPC440EPx without a bootstrap I2C EEPROM, the PLL can be reconfigured > after startup in order to change the speed of the clocks. This patch adds > the option CONFIG_667MHZ. If set, it will set the clocks to run at full > speed on a 667MHz PPC440EPx without the need for an external EEPROM. I think it makes sense to move these PLL checking/reconfiguration stuff into a separate function. Perhaps like this: In you board config file: #define CFG_PLL_RECONFIG 667 /* comment please */ And in cpu_init.c: #ifndef CFG_PLL_RECONFIG #define CFG_PLL_RECONFIG 0 #endif void reconfigure_pll(u32 new_cpu_freq) { #if defined(CONFIG_440EPX) if (new_cpu_freq == 667) { ... your code here... ... } #endif } void cpu_init_f (void) { #if defined(CONFIG_WATCHDOG) unsigned long val; #endif reconfigure_pll(CFG_PLL_RECONFIG); ... I think this is clearer. What do you think? Please clean up and resend. Thanks. Best regards, Stefan ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de =====================================================================