[U-Boot-Users] [PATCH 1/3] 83xx: nand support for MPC837XRDB boards

[U-Boot-Users] [PATCH 1/3] 83xx: nand support for MPC837XRDB boards

[Anton Vorontsov]

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
---
 include/configs/MPC837XERDB.h |   24 ++++++++++++++++++++++--
 1 files changed, 22 insertions(+), 2 deletions(-)

diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h
index 2da4f29..7c19d1e 100644
--- a/include/configs/MPC837XERDB.h
+++ b/include/configs/MPC837XERDB.h
@@ -251,9 +251,29 @@
 #define CFG_FLASH_ERASE_TOUT	60000	/* Flash Erase Timeout (ms) */
 #define CFG_FLASH_WRITE_TOUT	500	/* Flash Write Timeout (ms) */
 
-#define CFG_VSC7385_BASE	0xF0000000
+/*
+ * NAND Flash on the Local Bus
+ */
+#define CFG_NAND_BASE		0xE0600000	/* 0xE0600000 */
+#define CFG_BR1_PRELIM		(CFG_NAND_BASE | \
+				 (2 << BR_DECC_SHIFT) |	/* Use HW ECC */ \
+				 BR_PS_8 |		/* Port Size = 8 bit */ \
+				 BR_MS_FCM |		/* MSEL = FCM */ \
+				 BR_V)			/* valid */
+#define CFG_OR1_PRELIM		(0xFFFF8000 |		/* length 32K */ \
+				 OR_FCM_CSCT | \
+				 OR_FCM_CST | \
+				 OR_FCM_CHT | \
+				 OR_FCM_SCY_1 | \
+				 OR_FCM_TRLX | \
+				 OR_FCM_EHTR)
+#define CFG_LBLAWBAR1_PRELIM	CFG_NAND_BASE
+#define CFG_LBLAWAR1_PRELIM	0x8000000E	/* 32KB  */
 
-/* VSC7385 Gigabit Switch support */
+/*
+ * VSC7385 Gigabit Switch support
+ */
+#define CFG_VSC7385_BASE	0xF0000000
 #define CONFIG_VSC7385_ENET
 #define CFG_BR2_PRELIM		0xf0000801		/* Base address */
 #define CFG_OR2_PRELIM		0xfffe09ff		/* 128K bytes*/
-- 
1.5.2.2

[U-Boot-Users] [PATCH 1/3] 83xx: nand support for MPC837XRDB boards

[Scott Wood]

On Fri, Mar 07, 2008 at 06:04:54PM +0300, Anton Vorontsov wrote:
> +#define CFG_OR1_PRELIM		(0xFFFF8000 |		/* length 32K */ \
> +				 OR_FCM_CSCT | \
> +				 OR_FCM_CST | \
> +				 OR_FCM_CHT | \
> +				 OR_FCM_SCY_1 | \
> +				 OR_FCM_TRLX | \
> +				 OR_FCM_EHTR)

Are you sure that SCY_1 is correct?  The 8313erdb config sets it, and
it's too low -- I get errors if I don't increase it.  I don't know what
the minimal correct value should be, though.

-Scott

[U-Boot-Users] [PATCH 1/3] 83xx: nand support for MPC837XRDB boards

[Anton Vorontsov]

On Fri, Mar 07, 2008 at 10:26:09AM -0600, Scott Wood wrote:
> On Fri, Mar 07, 2008 at 06:04:54PM +0300, Anton Vorontsov wrote:
> > +#define CFG_OR1_PRELIM		(0xFFFF8000 |		/* length 32K */ \
> > +				 OR_FCM_CSCT | \
> > +				 OR_FCM_CST | \
> > +				 OR_FCM_CHT | \
> > +				 OR_FCM_SCY_1 | \
> > +				 OR_FCM_TRLX | \
> > +				 OR_FCM_EHTR)
> 
> Are you sure that SCY_1 is correct?  The 8313erdb config sets it, and
> it's too low -- I get errors if I don't increase it.  I don't know what
> the minimal correct value should be, though.

I'm getting errors even with SCY_7. ;-) More specifically, I'm getting
errors when writing to nand (nandwrite), reading and erasing works ok.
Writing somehow confuses elbc, and it stops sending irqs. I've tried to
increase timings, but there is no effect of doing this.

The patch below helps though, and nandwrite works ok with it, so
I strongly believe this is software issue. Ideas?

diff --git a/drivers/mtd/nand/fsl_elbc_nand.c b/drivers/mtd/nand/fsl_elbc_nand.c
index b025dfe..f1e97fb 100644
--- a/drivers/mtd/nand/fsl_elbc_nand.c
+++ b/drivers/mtd/nand/fsl_elbc_nand.c
@@ -691,6 +691,8 @@ static void fsl_elbc_write_buf(struct mtd_info *mtd, const u8 *buf, int len)
 
 	memcpy_toio(&ctrl->addr[ctrl->index], buf, len);
 	ctrl->index += len;
+
+	ndelay(100);
 }
 
 /*