[U-Boot-Users] [PATCH v4] ppc: Add CFG_MEM_TOP_HIDE option to hide memory area that doesn't get "touched"

[Wolfgang Denk <wd@denx.de>]

Dear Stefan,

in message <1206523009-18011-1-git-send-email-sr@denx.de> you wrote:
>
> It is strongly recommendet to not use the last 256 bytes on those

<nitpick> recommended </nitpick>

> --- a/README
> +++ b/README
> @@ -1854,6 +1854,27 @@ Configuration Settings:
>  		Scratch address used by the alternate memory test
>  		You only need to set this if address zero isn't writeable
>  
> +- CFG_MEM_TOP_HIDE (PPC only):
> +		If CFG_MEM_TOP_HIDE is defined in the board config header,
> +		this specified memory area will get subtracted from the top
> +		(end) of ram and won't get "touched" at all by U-Boot. By
> +		fixing up gd->ram_size the Linux kernel should gets passed
> +		the now "corrected" memory size and won't touch it either.
> +		This should work for arch/ppc and arch/powerpc. Only Linux
> +		board ports in arch/powerpc with bootwrapper support, that
> +		recalculate the memory size from the SDRAM controller setup
> +		will have to get fixed.
> +
> +		This option can be used as a workaround for the 440EPx/GRx
> +		CHIP 11 errata where the last 256 bytes in SDRAM shouldn't
> +		be touched.
> +
> +		WARNING: Please make sure that this value is a multiple of
> +		the Linux page size (normally 4k). If this is not the case,
> +		then the end address of the Linux memory will be located at a
> +		non page size aligned address and this could cause mayor

<nitpick> major </nitpick>


Will you send a pull request for the ppc4xx repo, or should I apply
this directly?

Best regards,

Wolfgang Denk

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