From mboxrd@z Thu Jan  1 00:00:00 1970
From: Stefan Roese <sr@denx.de>
Date: Fri, 28 Mar 2008 17:40:25 +0100
Subject: [U-Boot-Users] [PATCH v4] ppc: Add CFG_MEM_TOP_HIDE option to
	hide memory area that doesn't get "touched"
In-Reply-To: <341E3D7A-3355-47C8-8F24-E5291F477433@kernel.crashing.org>
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	<341E3D7A-3355-47C8-8F24-E5291F477433@kernel.crashing.org>
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On Friday 28 March 2008, Kumar Gala wrote:
> > This patch enables this config option on some PPC440EPx boards as a
> > workaround
> > for the CHIP 11 errata. Here the description from the AMCC
> > documentation:
>
> If you reduce the memory size this way does the 44x kernel have issues
> with the TLBs that are used to mapped pin kernel lowmem?

Not that I am aware of. I tested arch/ppc and arch/powerpc kernel version 
without problems.

> I know on 85xx this would be a bad thing and rather than changing gd->
> ram_size, i'd add a memreserve in the device tree that the kernel
> got passed.

This way I have no chance to "fix" arch/ppc kernels too. I know, arch/ppc is 
dead. :) But we need to support it a little while longer.

Best regards,
Stefan

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