[U-Boot-Users] [PATCH] Make MPC83xx one step closer to full relocation.

Joakim Tjernlund
2008-02-02T19:44:40Z

Remove a few absolute references to CFG_MONITOR_BASE for ppc/mpc83xx
and use GOT relative reference.
---
cpu/mpc83xx/start.S | 11 +++++++----
lib_ppc/board.c | 3 ++-
2 files changed, 9 insertions(+), 5 deletions(-)

diff --git a/cpu/mpc83xx/start.S b/cpu/mpc83xx/start.S
index 1dfbf62..56fd7ec 100644
--- a/cpu/mpc83xx/start.S
+++ b/cpu/mpc83xx/start.S
@@ -172,8 +172,11 @@ boot_warm: /* time t 5 */
/* there and deflate the flash size back to minimal size */
/*------------------------------------------------------------*/
bl map_flash_by_law1
- lis r4, (CFG_MONITOR_BASE)@h
- ori r4, r4, (CFG_MONITOR_BASE)@l
+
+ GET_GOT /* initialize GOT access */
+ lwz r4, GOT(_start)
+ addi r4, r4, -EXC_OFF_SYS_RESET
+
addi r5, r4, in_flash - _start + EXC_OFF_SYS_RESET
mtlr r5
blr
@@ -906,8 +909,8 @@ relocate_code:
mr r10, r5 /* Save copy of Destination Address */

mr r3, r5 /* Destination Address */
- lis r4, CFG_MONITOR_BASE at h /* Source Address */
- ori r4, r4, CFG_MONITOR_BASE at l
+ lwz r4, GOT(_start)
+ addi r4, r4, -EXC_OFF_SYS_RESET
lwz r5, GOT(__init_end)
sub r5, r5, r4
li r6, CFG_CACHELINE_SIZE /* Cache Line Size */
diff --git a/lib_ppc/board.c b/lib_ppc/board.c
index 45d1328..8a18350 100644
--- a/lib_ppc/board.c
+++ b/lib_ppc/board.c
@@ -117,6 +117,7 @@ DECLARE_GLOBAL_DATA_PTR;
#define TOTAL_MALLOC_LEN CFG_MALLOC_LEN
#endif

+extern ulong _start;
extern ulong __init_end;
extern ulong _end;
ulong monitor_flash_len;
@@ -417,7 +418,7 @@ void board_init_f (ulong bootflag)
* - monitor code
* - board info struct
*/
- len = (ulong)&_end - CFG_MONITOR_BASE;
+ len = (ulong)&_end - (ulong)&_start + EXC_OFF_SYS_RESET;

#ifndef CONFIG_VERY_BIG_RAM
addr = CFG_SDRAM_BASE + gd->ram_size;
--
1.5.3.8