From: Wolfgang Denk <wd@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot-Users] [MIPS] cpu/mips/cpu.c: Fix flush_cache bug
Date: Fri, 18 Apr 2008 06:14:13 +0200 [thread overview]
Message-ID: <20080418041413.F2FC0248B9@gemini.denx.de> (raw)
In-Reply-To: Your message of "Tue, 08 Apr 2008 16:20:35 +0900." <47FB1CC3.2090904@necel.com>
In message <47FB1CC3.2090904@necel.com> you wrote:
> Cache operations have to take line address (addr), not start_addr.
> I noticed this bug when debugging ping failure.
>
> Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
> ---
>
> cpu/mips/cpu.c | 4 ++--
> 1 files changed, 2 insertions(+), 2 deletions(-)
Applied, thanks.
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
It is impractical for the standard to attempt to constrain the
behavior of code that does not obey the constraints of the standard.
- Doug Gwyn
prev parent reply other threads:[~2008-04-18 4:14 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-04-08 7:20 [U-Boot-Users] [MIPS] cpu/mips/cpu.c: Fix flush_cache bug Shinya Kuribayashi
2008-04-18 4:14 ` Wolfgang Denk [this message]
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