From: Wolfgang Denk <wd@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot-Users] [PATCH] Fixed reset for syscon3
Date: Fri, 09 May 2008 19:43:13 +0200 [thread overview]
Message-ID: <20080509174313.528B424764@gemini.denx.de> (raw)
In-Reply-To: Your message of "Fri, 09 May 2008 13:38:21 EDT." <1210354701.2948.14.camel@r54964-12.am.freescale.net>
In message <1210354701.2948.14.camel@r54964-12.am.freescale.net> you wrote:
>
> I don't think this patch is necessary because for all e500v2 core,
> setting RSTCR is the right way to reset the board.
Agreed,t hat's how it should wor. But it doesn't on the syscon3 board.
> I think you should check board FPGA. I met the similar problem before.
> Since FPGA did not correctly route the HRESET_REQ signal, setting RSTCR
> did not cause reset. After hardware person fixed the FPGA code, it
> worked fine.
Ummm... This is on a custom design, the syscon3 board. There is no
FPGA there...
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
God made the integers; all else is the work of Man. - Kronecker
next prev parent reply other threads:[~2008-05-09 17:43 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-05-09 14:35 [U-Boot-Users] [PATCH] Fixed reset for syscon3 Wolfgang Denk
2008-05-09 15:51 ` Wolfgang Denk
2008-05-09 17:38 ` Haiying Wang
2008-05-09 17:43 ` Wolfgang Denk [this message]
2008-05-09 19:31 ` York Sun
2008-05-09 23:12 ` Wolfgang Denk
2008-05-18 8:44 ` HarryCheng
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