[U-Boot-Users] [PATCH RFC] ARM: Davinci: NAND fix for large page ECC and linux compatibility

[Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>]

>  #endif
> +#endif
>  
>  static void nand_davinci_enable_hwecc(struct mtd_info *mtd, int mode)
>  {
> @@ -141,12 +146,29 @@ static u_int32_t nand_davinci_readecc(st
>  
>  static int nand_davinci_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code)
>  {
> +#ifdef CFG_LINUX_COMPATIBLE_ECC
> +	unsigned int ecc_val = nand_davinci_readecc(mtd, 1);
> +	/* squeeze 0 middle bits out so that it fits in 3 bytes */
> +	unsigned int tmp = (ecc_val&0x0fff)|((ecc_val&0x0fff0000)>>4);
	unsigned int tmp = (ecc_val & 0x0fff) | ((ecc_val & 0x0fff0000) >> 4);
please and space between operator

plese use the same alignement
add an empty line
> +	/* invert so that erased block ecc is correct */
> +	tmp = ~tmp;
> +	ecc_code[0] = (u_char)(tmp);
> +	ecc_code[1] = (u_char)(tmp >> 8);
> +	ecc_code[2] = (u_char)(tmp >> 16);
> +#else
>  	u_int32_t		tmp;
>  	int			region, n;
>  	struct nand_chip	*this = mtd->priv;
>  
>  	n = (this->eccmode == NAND_ECC_HW12_2048) ? 4 : 1;
>  
> +				u_char *read_ecc, u_char *calc_ecc)
> +{
> +	struct nand_chip *chip = mtd->priv;
> +	u_int32_t ecc_nand = read_ecc[0] | (read_ecc[1] << 8) |
> +					  (read_ecc[2] << 16);
> +	u_int32_t ecc_calc = calc_ecc[0] | (calc_ecc[1] << 8) |
> +					  (calc_ecc[2] << 16);
> +	u_int32_t diff = ecc_calc ^ ecc_nand;
> +
> +	if (diff) {
> +		if ((((diff>>12)^diff) & 0xfff) == 0xfff) {
please and space between operator
> +			/* Correctable error */
please and space between operator
> +			if ((diff>>(12+3)) < chip->eccsize) {
> +				uint8_t find_bit = 1 << ((diff>>12)&7);
please and space between operator
> +				uint32_t find_byte = diff>>(12+3);
				uint32_t find_byte = diff >> 15;
please and space between operator
> +				dat[find_byte] ^= find_bit;
> +				DEBUG (MTD_DEBUG_LEVEL0, "Correcting single bit ECC error at offset: %d, bit: %d\n", find_byte, find_bit);
too long please split
> +				return 1;
> +			} else {
> +				return -1;
> +			}
> +		} else if (!(diff & (diff-1))) {
please and space between operator
> +			/* Single bit ECC error in the ECC itself,
> +			   nothing to fix */
please use this style of comment
/*
 *
 */
> +			DEBUG (MTD_DEBUG_LEVEL0, "Single bit ECC error in ECC.\n");
> +			return 1;
> +		} else {
> +			/* Uncorrectable error */
> +			DEBUG (MTD_DEBUG_LEVEL0, "ECC UNCORRECTED_ERROR 1\n");
> +			return -1;
>  	/* Set address of hardware control function */
>  	nand->hwcontrol = nand_davinci_hwcontrol;
> Index: u-boot-1.3.3/include/configs/davinci_dvevm.h
> ===================================================================
> --- u-boot-1.3.3.orig/include/configs/davinci_dvevm.h	2008-05-19 18:47:11.000000000 +0800
> +++ u-boot-1.3.3/include/configs/davinci_dvevm.h	2008-06-27 13:04:07.000000000 +0800
> @@ -46,6 +46,18 @@
>  #define CONFIG_NOR_UART_BOOT
>   */
>  
> +/*
> + * Previous versions of u-boot (1.3.3 and prior) and Montavista Linux kernels
> + * generated bogus ECCs on large-page NAND. Both large and small page NAND ECCs
> + * were incompatible with the Linux davinci git tree (since NAND was integrated
> + * in 2.6.24).
> + * Don't turn this on if you want backwards compatibility.
> + * Do turn this on if you want u-boot to be able to read and write NAND
> + * that can be written or read by the Linux davinci git kernel.
> + *
> +#define CFG_LINUX_COMPATIBLE_ECC
> + */
please move this in README.davinci
> +

Best Regards,
J.