[U-Boot-Users] Resubmit : [PATCH] Correct ARM Versatile Timer Initialization

[Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>]

On 06:30 Mon 04 Aug     , Gururaja Hebbar K R wrote:
> - According to ARM Dual-Timer Module (SP804) TRM (ARM DDI0271), 
>  -- Timer Value Register @ TIMER Base + 4 is Read-only. 
>  -- Prescale Value (Bits 3-2 of TIMER Control register) 
> 	can only be one of 00,01,10. 11 is undefined.
> 
> Signed-off-by: Gururaja Hebbar <gururajakr@sanyo.co.in>
> ---
>  cpu/arm926ejs/versatile/timer.c |    3 +--
>  1 files changed, 1 insertions(+), 2 deletions(-)
> 
> diff --git a/cpu/arm926ejs/versatile/timer.c b/cpu/arm926ejs/versatile/timer.c
> index 32872d2..9659b67 100644
> --- a/cpu/arm926ejs/versatile/timer.c
> +++ b/cpu/arm926ejs/versatile/timer.c
> @@ -50,8 +50,7 @@ static ulong lastdec;
>  int timer_init (void)
>  {
>  	*(volatile ulong *)(CFG_TIMERBASE + 0) = CFG_TIMER_RELOAD;	/* TimerLoad */
> -	*(volatile ulong *)(CFG_TIMERBASE + 4) = CFG_TIMER_RELOAD;	/* TimerValue */
> -	*(volatile ulong *)(CFG_TIMERBASE + 8) = 0x8C;
> +	*(volatile ulong *)(CFG_TIMERBASE + 8) = 0x80;

according to datasheet for the register TimerXControl

we are supposed to not modify the bits [31:8] and [4]

so we are suppose to read the register and modify only the others
register.

Best Regards,
J.