[U-Boot] [PATCH] ppc4xx - allow usage of fixed/unmanaged PHYs

Grant Erickson
2008-08-26T19:12:26Z

On 8/26/08 11:11 AM, Wolfgang Ocker wrote:
> This patch allows a managed switch like the 88E6083 to be directly
> connected to a 4xx using PHY mode.
>
> It avoids waiting for a link (it's always there) and uses fixed values
> for speed and duplex mode since both settings are hardware controlled.
>
> Should I use "FIXED" instead of "UNMANAGED" (so called in the kernel
> afair)?
>
> ---
> Support unmanaged/fixed PHYs like port 8/9 of Marvell 88E6083 on 4xx.
>
> Added config vars CONFIG_UNMANAGED_PHY, CONFIG_UNMANAGED_PHY_SPEED
> and CONFIG_UNMANAGED_PHY_FULL_DUPLEX to allow unmanaged PHYs
> and to configure the settings for speed and duplex mode.
>
> Signed-off-by: Wolfgang Ocker <weo@reccoware.de>

Wolfgang:

Are ports 8/9 truly "unmanaged" or are they like ports 4/5 on the M88E6061
in which the ports have MDIO/MII interfaces but do not follow IEEE register
conventions?

If the former, then I think it is better to just pull the speed and duplex
settings from the switch and pass them up to the 4xx Ethernet driver. In my
situation, I did as shown below. It is likely more invasive than your
approach; however, it ensures that software follows what the hardware is
strapped to.

diff -aruN u-boot-1.3.2/cpu/ppc4xx/4xx_enet.c
u-boot-1.3.2.N/cpu/ppc4xx/4xx_enet.c
--- u-boot-1.3.2/cpu/ppc4xx/4xx_enet.c 2008-05-15 16:16:22.000000000
-0700
+++ u-boot-1.3.2.N/cpu/ppc4xx/4xx_enet.c 2008-05-15 16:15:47.000000000
-0700
@@ -92,6 +92,10 @@
#include <malloc.h>
#include <asm/ppc4xx-intvec.h>

+#if defined(CONFIG_M88E6061)
+#include <m88e6061.h>
+#endif
+
/*
* Only compile for platform with AMCC EMAC ethernet controller and
* network support enabled.
@@ -903,7 +907,7 @@

/* wait for PHY to complete auto negotiation */
reg_short = 0;
-#ifndef CONFIG_CS8952_PHY
+#if !defined(CONFIG_CS8952_PHY) && !defined(CONFIG_M88E6061)
switch (devnum) {
case 0:
reg = CONFIG_PHY_ADDR;
@@ -941,7 +945,7 @@
miiphy_write (dev->name, reg, 0x18, 0x4101);
miiphy_write (dev->name, reg, 0x09, 0x0e00);
miiphy_write (dev->name, reg, 0x04, 0x01e1);
-#endif
+#endif /* defined(CONFIG_M88E1111_PHY) */
miiphy_reset (dev->name, reg);

#if defined(CONFIG_440GX) || \
@@ -960,7 +964,7 @@
miiphy_write (dev->name, reg, 23, 0x1300);
#else
miiphy_write (dev->name, reg, 23, 0x1000);
-#endif
+#endif /* defined(CONFIG_CIS8201_SHORT_ETCH) */
/*
* Vitesse VSC8201/Cicada CIS8201 errata:
* Interoperability problem with Intel 82547EI phys
@@ -978,7 +982,7 @@
miiphy_write (dev->name, reg, 0x1f, 0x0000);
/* end Vitesse/Cicada errata */
}
-#endif
+#endif /* defined(CONFIG_CIS8201_PHY) */

#if defined(CONFIG_ET1011C_PHY)
/*
@@ -997,9 +1001,8 @@

miiphy_write(dev->name, reg, 0x1c, 0x74f0);
}
-#endif
-
-#endif
+#endif /* defined(CONFIG_ET1011C_PHY) */
+#endif /*defined(CONFIG_440GX) || ... || defined(CONFIG_405EX) */
/* Start/Restart autonegotiation */
phy_setup_aneg (dev->name, reg);
udelay (1000);
@@ -1034,10 +1038,15 @@
puts (" done\n");
udelay (500000); /* another 500 ms (results in faster booting)
*/
}
-#endif /* #ifndef CONFIG_CS8952_PHY */
+#endif /* !defined(CONFIG_CS8952_PHY) && !defined(CONFIG_M88E6061) */

+#if defined(CONFIG_M88E6061)
+ speed = m88e6061_speed (dev->name, CFG_M88E6061_CPU_PORT);
+ duplex = m88e6061_duplex (dev->name, CFG_M88E6061_CPU_PORT);
+#else
speed = miiphy_speed (dev->name, reg);
duplex = miiphy_duplex (dev->name, reg);
+#endif /* defined(CONFIG_M88E6061) */

if (hw_p->print_speed) {
hw_p->print_speed = 0;

Regards,

Grant