From: Wolfgang Denk <wd@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 1/1] ppc4xx: Reset and relock memory DLL after SDRAM_CLKTR change
Date: Sat, 04 Oct 2008 01:31:22 +0200 [thread overview]
Message-ID: <20081003233122.D41522480D@gemini.denx.de> (raw)
In-Reply-To: <1222995701-7810-1-git-send-email-agraham@amcc.com>
Dear Adam Graham,
In message <1222995701-7810-1-git-send-email-agraham@amcc.com> you wrote:
> After changing SDRAM_CLKTR phase value rerun the memory preload initialization sequence (INITPLR) to reset and relock the memory DLL. Changing the SDRAM_CLKTR memory clock phase coarse timing adjustment effects the phase relationship of the internal, to the PPC chip, and external, to the PPC chip, versions of MEMCLK_OUT.
Line too long.
Best regards,
Wolfgang Denk
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DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
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next prev parent reply other threads:[~2008-10-03 23:31 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-10-03 1:01 [U-Boot] [PATCH 1/1] ppc4xx: Reset and relock memory DLL after SDRAM_CLKTR change Adam Graham
2008-10-03 23:31 ` Wolfgang Denk [this message]
2008-10-04 8:58 ` Stefan Roese
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