From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stefan Roese Date: Sat, 4 Oct 2008 10:58:30 +0200 Subject: [U-Boot] [PATCH 1/1] ppc4xx: Reset and relock memory DLL after SDRAM_CLKTR change In-Reply-To: <20081003233122.D41522480D@gemini.denx.de> References: <1222995701-7810-1-git-send-email-agraham@amcc.com> <20081003233122.D41522480D@gemini.denx.de> Message-ID: <200810041058.30467.sr@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Adam, On Saturday 04 October 2008, Wolfgang Denk wrote: > > After changing SDRAM_CLKTR phase value rerun the memory preload > > initialization sequence (INITPLR) to reset and relock the memory DLL. > > Changing the SDRAM_CLKTR memory clock phase coarse timing adjustment > > effects the phase relationship of the internal, to the PPC chip, and > > external, to the PPC chip, versions of MEMCLK_OUT. > > Line too long. Yes, please change your setup to wrap around 70 chars per line in the commit text. Please resend and I'll add this fix quickly so that it makes it into the next release. Thanks. Best regards, Stefan ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de =====================================================================