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From: Stefan Roese <sr@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 1/1 v2] ppc4xx: Reset and relock memory DLL after SDRAM_CLKTR change
Date: Wed, 8 Oct 2008 11:38:04 +0200	[thread overview]
Message-ID: <200810081138.04374.sr@denx.de> (raw)
In-Reply-To: <1223313373-12350-1-git-send-email-agraham@amcc.com>

On Monday 06 October 2008, Adam Graham wrote:
> After changing SDRAM_CLKTR phase value rerun the memory preload
> initialization sequence (INITPLR) to reset and relock the memory
> DLL. Changing the SDRAM_CLKTR memory clock phase coarse timing
> adjustment effects the phase relationship of the internal, to the
> PPC chip, and external, to the PPC chip, versions of MEMCLK_OUT.

Applied ppc4xx/master. Thanks.

Best regards,
Stefan

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  reply	other threads:[~2008-10-08  9:38 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2008-10-06 17:16 [U-Boot] [PATCH 1/1 v2] ppc4xx: Reset and relock memory DLL after SDRAM_CLKTR change Adam Graham
2008-10-08  9:38 ` Stefan Roese [this message]
2008-10-08  9:47   ` Stefan Roese
2008-10-08 13:05     ` Victor Gallardo
     [not found]       ` <200810081511.49939.sr@denx.de>
2008-10-08 14:15         ` Victor Gallardo

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