[U-Boot] amcc kilauea odd crashes

[Stefan Roese <sr@denx.de>]

Hi Wolfgang,

On Thursday 23 October 2008, Wolfgang Denk wrote:
> > > Should we not backout the autocalib patches that cause the problem
> > > until a stable working solution is found?
> >
> > Not sure. My hope is that AMCC find a solution quickly. They should
> > receive the failing board this week.
> >
> > And they already did send a "fix" (more a workaround) for this problem:
> >
> > [PATCH v2] ppc4xx: Fix DDR2 auto calibration on Kilauea 600MHz
> >
> > which you rejected. So I suggest to wait for a few days.
>
> Well, that was one full month ago, and nothing happened since.1s

That's not correct. One patch got checked in which definitely made the 
situation better:

f8a00dea841d5d75de1f8e8107e90ee1beeddf5f

    ppc4xx: Reset and relock memory DLL after SDRAM_CLKTR change
    
    After changing SDRAM_CLKTR phase value rerun the memory preload
    initialization sequence (INITPLR) to reset and relock the memory
    DLL. Changing the SDRAM_CLKTR memory clock phase coarse timing
    adjustment effects the phase relationship of the internal, to the
    PPC chip, and external, to the PPC chip, versions of MEMCLK_OUT.
    
    Signed-off-by: Adam Graham <agraham@amcc.com>
    Signed-off-by: Victor Gallardo <vgallardo@amcc.com>
    Signed-off-by: Stefan Roese <sr@denx.de>

Unfortunately it didn't fix all problems. AMCC already provided another patch 
for testing purposes. Not to the list but to me (and you) directly. Please 
find it attached again. Would be great if Markus could test it on the failing 
Kilauea.

> I see people running into problems with the current code, so I vote
> to back out the culprit until a real fix has been found.

Hmmm, "people" have been running into this problem before too. That we me.

Again, let's please wait at least for Adam and/or Victor to comment on this 
issue. It should only be a few hours until they read their mails.

Best regards,
Stefan

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