From mboxrd@z Thu Jan  1 00:00:00 1970
From: Stefan Roese <sr@denx.de>
Date: Thu, 12 Feb 2009 06:32:07 +0100
Subject: [U-Boot] [PATCH 1/1 v3] ppc4xx: Autocalibration can set RDCC to
	over aggressive value.
In-Reply-To: <1234214292-14268-1-git-send-email-agraham@amcc.com>
References: <1234214292-14268-1-git-send-email-agraham@amcc.com>
Message-ID: <200902120632.07384.sr@denx.de>
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To: u-boot@lists.denx.de

On Monday 09 February 2009, Adam Graham wrote:
> The criteria of the AMCC SDRAM Controller DDR autocalibration
> U-Boot code is to pick the largest passing write/read/compare
> window that also has the smallest SDRAM_RDCC.[RDSS] Read Sample
> Cycle Select value.

...

Applied to ppc4xx/master. Thanks.

Best regards,
Stefan

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