From: Jerry Van Baren <gvb.uboot@gmail.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v2] Add bank configuration to FSL spd_sdram.c
Date: Fri, 13 Mar 2009 11:40:10 -0400 [thread overview]
Message-ID: <20090313154010.GA2371@cideas.com> (raw)
In-Reply-To: <20090313040525.GA21993@cideas.com>
The routine assumed 4 bank SDRAMs, enhance to configure for 4 or 8
bank SDRAMs.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
---
V2: Do both sets of chip selects. D'oh!
The cpu/mpc83xx/spd_sdram.c routine /almost/ worked for me. It turns
out my DIMM stick has 8 banks which was being ignored (hard-coded for
4 banks). The enhancement below fixed that for me.
It would be Really Good to get this verified and in the pending release.
Best regards,
gvb
cpu/mpc83xx/spd_sdram.c | 16 ++++++++++------
1 files changed, 10 insertions(+), 6 deletions(-)
diff --git a/cpu/mpc83xx/spd_sdram.c b/cpu/mpc83xx/spd_sdram.c
index ecbc70c..0187ffb 100644
--- a/cpu/mpc83xx/spd_sdram.c
+++ b/cpu/mpc83xx/spd_sdram.c
@@ -219,7 +219,8 @@ long int spd_sdram()
ddr->cs_config[0] = ( 1 << 31
| (odt_rd_cfg << 20)
| (odt_wr_cfg << 16)
- | (spd.nrow_addr - 12) << 8
+ | ((spd.nbanks == 8 ? 1 : 0) << 14)
+ | ((spd.nrow_addr - 12) << 8)
| (spd.ncol_addr - 8) );
debug("\n");
debug("cs0_bnds = 0x%08x\n",ddr->csbnds[0].csbnds);
@@ -231,8 +232,9 @@ long int spd_sdram()
ddr->cs_config[1] = ( 1<<31
| (odt_rd_cfg << 20)
| (odt_wr_cfg << 16)
- | (spd.nrow_addr-12) << 8
- | (spd.ncol_addr-8) );
+ | ((spd.nbanks == 8 ? 1 : 0) << 14)
+ | ((spd.nrow_addr - 12) << 8)
+ | (spd.ncol_addr - 8) );
debug("cs1_bnds = 0x%08x\n",ddr->csbnds[1].csbnds);
debug("cs1_config = 0x%08x\n",ddr->cs_config[1]);
}
@@ -242,7 +244,8 @@ long int spd_sdram()
ddr->cs_config[2] = ( 1 << 31
| (odt_rd_cfg << 20)
| (odt_wr_cfg << 16)
- | (spd.nrow_addr - 12) << 8
+ | ((spd.nbanks == 8 ? 1 : 0) << 14)
+ | ((spd.nrow_addr - 12) << 8)
| (spd.ncol_addr - 8) );
debug("\n");
debug("cs2_bnds = 0x%08x\n",ddr->csbnds[2].csbnds);
@@ -254,8 +257,9 @@ long int spd_sdram()
ddr->cs_config[3] = ( 1<<31
| (odt_rd_cfg << 20)
| (odt_wr_cfg << 16)
- | (spd.nrow_addr-12) << 8
- | (spd.ncol_addr-8) );
+ | ((spd.nbanks == 8 ? 1 : 0) << 14)
+ | ((spd.nrow_addr - 12) << 8)
+ | (spd.ncol_addr - 8) );
debug("cs3_bnds = 0x%08x\n",ddr->csbnds[3].csbnds);
debug("cs3_config = 0x%08x\n",ddr->cs_config[3]);
}
--
1.5.6.5
next prev parent reply other threads:[~2009-03-13 15:40 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-03-13 4:05 [U-Boot] [PATCH] Add bank configuration to FSL spd_sdram.c Jerry Van Baren
2009-03-13 4:19 ` Liu Dave-R63238
2009-03-13 12:03 ` Jerry Van Baren
2009-03-13 15:40 ` Jerry Van Baren [this message]
2009-03-14 0:59 ` [U-Boot] [PATCH v2] " Liu Dave-R63238
2009-03-14 23:02 ` Kim Phillips
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