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From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] Enabling ARM DCache (and MMU setup) in U-Boot
Date: Tue, 31 Mar 2009 14:21:51 +0200	[thread overview]
Message-ID: <20090331122151.GA24923@game.jcrosoft.org> (raw)
In-Reply-To: <5ec3d7930903310520l57126a9dsee6988810cf37a0f@mail.gmail.com>

On 14:20 Tue 31 Mar     , Drasko DRASKOVIC wrote:
>    >On Mon, Mar 30, 2009 at 10:31 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
>    >before booting linux you must disable the cache which will be re-enable
>    by
>    >linux.
>    OK. Is that done in bootm.c? I can see lines :
>    /*
>         * We have reached the point of no return: we are going to
>         * overwrite all exception vector code, so we cannot easily
>         * recover from any failures any more...
>         */
> 
>        iflag = disable_interrupts();
> 
>    #ifdef CONFIG_AMIGAONEG3SE
>        /*
>         * We've possible left the caches enabled during
>         * bios emulation, so turn them off again
>         */
>        icache_disable();
>        invalidate_l1_instruction_
>    cache();
>        flush_data_cache();
>        dcache_disable();
>    #endif
AMIGAONE is a PPC

please take a look on this file
 lib_arm/bootm.c 
 and specialy on the  cleanup_before_linux (); soc implementation

>    >Could you give us more details about your soc, u-boot verison and linux
>    >version
>    u-boot-1.1.6, linux version is linux-2.6.25.10, although that is not
>    important because I have no problem with this but with slow access to
>    Flash and SDRAM, as I said before. Core is ARM926.
U-Boot 1.1.6 is quite old (more than 2 years old) please try to the current version
is your SOC in the Mainline?
if you can tell us which one it's and if it is mainline in U-Boot or Linux?
we could take a look on the code
> 
>    As I understand, these things have to be set up in the order to enable
>    DCache :
>     1. Page tables
>     2. The Translation Lookaside Buffer (TLB)
>     3. Domains and access permission
>     4. Caches and write buffer
>     5. The CP15:c1 control register
>     6. The Fast Context Switch Extension
>    Now, that seems like a lot of work to be done, and reading manual is not
>    extremely helpful, so I was wondering if somebody already done similar
>    thing in U-Boot, for ARM9 platform, so I could reuse some work or examine
>    examples to figure out how this is done.
in linux yes in u-boot some arch do it but not the arm9
IMHO your boot problem is more in linux than in U-Boot but until we can take a
look on the code it will be hard to known

Best Regards,
J.

  reply	other threads:[~2009-03-31 12:21 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2009-03-30 19:56 [U-Boot] Enabling ARM DCache (and MMU setup) in U-Boot Drasko DRASKOVIC
2009-03-30 20:31 ` Jean-Christophe PLAGNIOL-VILLARD
2009-03-31 12:20   ` Drasko DRASKOVIC
2009-03-31 12:21     ` Jean-Christophe PLAGNIOL-VILLARD [this message]
2009-03-31 13:36       ` Drasko DRASKOVIC
2009-03-31 14:09         ` Jean-Christophe PLAGNIOL-VILLARD
2009-03-31 15:13           ` Drasko DRASKOVIC
2009-04-06 17:42           ` Drasko DRASKOVIC
2009-03-31 14:09         ` Drasko DRASKOVIC
  -- strict thread matches above, loose matches on Subject: below --
2010-01-26 11:25 A. Geisreiter
2010-07-01 15:35 Rasha Eqbal
2010-07-01 15:57 ` Alessandro Rubini
     [not found]   ` <AANLkTilN2FXWrLGTAiTAeuWDIlevjISEsvE9dsihe-xq@mail.gmail.com>
     [not found]     ` <20100701175458.GA14755@morgana.i.gnudd.com>
2010-07-02  5:36       ` Rasha Eqbal
2010-07-05  5:31 ` Lv Terry-R65388

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