[U-Boot] [PATCH v2 1/3] MX31: Add NAND SPL for i.MX31.

[Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>]

On 21:56 Sun 03 May     , Magnus Lilja wrote:
> This patch adds the NAND SPL framework needed to boot i.MX31 boards
> from NAND.
> 
> The patch is based on the work by Maxim Artamonov
> <scn1874@yandex.ru > (which was signed-off-by him).
so please add it too
and please fix the @
> 
> Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
> ---
>  cpu/arm1136/start.S                   |   29 +++--
>  include/asm-arm/arch-mx31/mx31-regs.h |   90 +++++++++++++
>  nand_spl/nand_boot_mx31.c             |  223 +++++++++++++++++++++++++++++++++
>  3 files changed, 331 insertions(+), 11 deletions(-)
>  create mode 100644 nand_spl/nand_boot_mx31.c
> 
> diff --git a/cpu/arm1136/start.S b/cpu/arm1136/start.S
> index e622338..9bbbaf1 100644
> --- a/cpu/arm1136/start.S
> +++ b/cpu/arm1136/start.S
> @@ -1,6 +1,9 @@
>  /*
>   *  armboot - Startup Code for OMP2420/ARM1136 CPU-core
>   *
> + *
> + *  Copyright (c) 2008 Maxim Artamonov, <scn1874@yandex.ru>
> + *
please remove
>   *  Copyright (c) 2004	Texas Instruments <r-woodruff2@ti.com>
>   *
>   *  Copyright (c) 2001	Marius Gr?ger <mag@sysgo.de>
> @@ -32,7 +35,7 @@
>  #include <version.h>
>  .globl _start
>  _start: b	reset
> -#ifdef CONFIG_ONENAND_IPL
> +#if defined(CONFIG_ONENAND_IPL) || defined(CONFIG_NAND_SPL)
create a better CONFIG_
because we could need for other boot mode
>  	ldr	pc, _hang
>  	ldr	pc, _hang
>  	ldr	pc, _hang
> @@ -156,9 +159,9 @@ relocate:				/* relocate U-Boot to RAM	    */
>  	adr	r0, _start		/* r0 <- current position of code   */
>  	ldr	r1, _TEXT_BASE		/* test if we run from flash or RAM */
>  	cmp	r0, r1			/* don't reloc during debug	    */
> -#ifndef CONFIG_ONENAND_IPL
> +#if !defined(CONFIG_ONENAND_IPL) && !defined(CONFIG_NAND_SPL)
>  	beq	stack_setup
> -#endif	/* CONFIG_ONENAND_IPL */
> +#endif	/* !CONFIG_ONENAND_IPL && !CONFIG_NAND_SPL*/
>  
>  #endif	/* CONFIG_ONENAND_IPL */
> +
<snip>
> diff --git a/nand_spl/nand_boot_mx31.c b/nand_spl/nand_boot_mx31.c
> new file mode 100644
> index 0000000..d698d2a
> --- /dev/null
> +++ b/nand_spl/nand_boot_mx31.c
> @@ -0,0 +1,223 @@
<snip>
> +static void mx31_nand_page_address(unsigned int page_address)
> +{
> +	unsigned int page_count;
> +
> +	writew(0x00, NFC_FLASH_ADDR);
> +	writew(NFC_ADDR, NFC_CONFIG2);
> +	mx31_wait_ready();
> +
> +	/* code only for 2kb flash */
> +	if (CFG_NAND_PAGE_SIZE == 0x800) {
> +		writew(0x00, NFC_FLASH_ADDR);
> +		writew(NFC_ADDR, NFC_CONFIG2);
> +		mx31_wait_ready();
> +	}
> +
> +	page_count = CFG_NAND_CHIP_SIZE / CFG_NAND_PAGE_SIZE;
please use CONFIG_SYS_ or CONFIG_
and why not detect it?
> +
> +	if (page_address <= page_count) {
> +		page_count--; /* transform 0x01000000 to 0x00ffffff */
> +		do {
> +			writew(page_address & 0xff, NFC_FLASH_ADDR);
> +			writew(NFC_ADDR, NFC_CONFIG2);
> +			mx31_wait_ready();
> +			page_address = page_address >> 8;
> +			page_count = page_count >> 8;
> +		} while (page_count);
> +	}
> +}
> +
<snip>
> +
> +static int nand_load(unsigned int from, unsigned int size, unsigned char *buf)
> +{
> +	int i, bb;
> +
> +	mx31_nand_init();
> +
> +	/* convert from to page number */
> +	from = from / CFG_NAND_PAGE_SIZE;
> +
> +	i = 0;
> +
> +	while (i < (size/CFG_NAND_PAGE_SIZE)) {
> +		if ((from * CFG_NAND_PAGE_SIZE) >= CFG_NAND_CHIP_SIZE)
> +			return 2; /* memory segment violation */
> +
> +		bb = mx31_read_page(from, buf);
> +
> +		if (bb < 0)
> +			return -1;
> +
> +		/* checking first page of each block */
> +		/* if this page has bb marker, then skip whole block */
> +		if ((!(from % CFG_NAND_PAGES_PER_BLOCK)) && bb) {
please use CONFIG_SYS_ or CONFIG_
and why not detect it?
> +			from = from + CFG_NAND_PAGES_PER_BLOCK;
> +		} else {
> +			i++;
> +			from++;
> +			buf = buf + CFG_NAND_PAGE_SIZE;
please use CONFIG_SYS_ or CONFIG_
and why not detect it?
> +		}
> +	}
> +
> +	return 0;
> +}
> +
> +/*
> + * The main entry for NAND booting. It's necessary that SDRAM is already
> + * configured and available since this code loads the main U-Boot image
> + * from NAND into SDRAM and starts it from there.
> + */
> +void nand_boot(void)
> +{
> +	__attribute__((noreturn)) void (*uboot)(void);
> +
> +	/* CFG_NAND_U_BOOT_OFFS and CFG_NAND_U_BOOT_SIZE must */
please use CONFIG_SYS_ or CONFIG_
and so on
> +	/* be aligned to full pages */
please use this style of multiple ligne comment
/*
 *
 */

Best Regards,
J.