From mboxrd@z Thu Jan  1 00:00:00 1970
From: David Brownell <david-b@pacbell.net>
Date: Sun, 10 May 2009 21:31:02 -0700
Subject: [U-Boot] [PATCH v5] ARM DaVinci Adding DM357 Support
Message-ID: <200905102131.02592.david-b@pacbell.net>
List-Id: <u-boot.lists.denx.de>
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To: u-boot@lists.denx.de

Minor nit:  for consistency with "dvevm" and "dm355evm",
I suggest removing the underscore from "dm357_evm" in the
directory name.


> --- /dev/null
> +++ b/include/configs/davinci_dm357_evm.h
> @@ -0,0 +1,155 @@
> +...
> +
> +#ifndef __CONFIG_H
> +#define __CONFIG_H
> +#include <asm/sizes.h>
> +#include <asm/arch/hardware.h>

Breaks builds, since <config.h> is included by ASM code
and <asm/arch/hardware.h> includes C declarations (which
are invalid ASM syntax).


> +#define CONFIG_STACKSIZE               0x40000
> ...
> +#define CONFIG_STACKSIZE               /* Input clock */

Also breaks builds, for a different reason.  The second one
is clearly nonsense ...


I'd also be interested to know if the appended patchlet,
in conjunction with the NAND chipselect cleanup patch I
posted, provides proper access to the second NAND chip.
It should report a total of 2112 MBytes in the startup
message, and "nand devices" should report two chips.

Obviously I couldn't compile-test because of the above
issues ... but it looks more or less right; it's just
a copy of the dm355evm stuff that works, so the question
is whether the driver is handling both nCEO and nCE2
chipselect flavors right.

There are also a few things I'd change in the dm357 config
heade:  enabling the NAND-resident BBT (faster boot), with
MTDPART and UBIFS.

- Dave



--- u-boot-arm.orig/board/davinci/dm357_evm/dm357_evm.c	
+++ u-boot-arm/board/davinci/dm357_evm/dm357_evm.c
@@ -20,8 +20,10 @@
  */
 
 #include <common.h>
+#include <nand.h>
 #include <i2c.h>
 #include <asm/arch/hardware.h>
+#include <asm/arch/nand_defs.h>
 #include "../common/psc.h"
 #include "../common/misc.h"
 
@@ -67,3 +69,30 @@ int misc_init_r(void)
 	return 0;
 }
 
+#define BIT(x) (1 << (x))
+
+static void nand_dm357evm_select_chip2(struct mtd_info *mtd, int chip)
+{
+	struct nand_chip	*this = mtd->priv;
+	u32			wbase = (u32) this->IO_ADDR_W;
+	u32			rbase = (u32) this->IO_ADDR_R;
+
+	if (chip == 1) {
+		wbase |= BIT(3);
+		rbase |= BIT(3);
+	} else {
+		wbase &= ~BIT(3);
+		rbase &= ~BIT(3);
+	}
+	this->IO_ADDR_W = (void *)wbase;
+	this->IO_ADDR_R = (void *)rbase;
+}
+
+int board_nand_init(struct nand_chip *nand)
+{
+	davinci_nand_init(nand);
+	if (0x06000000 == (u32) this->IO_ADDR_W)
+		nand->select_chip = nand_dm357evm_select_chip2;
+	return 0;
+}
+
--- u-boot-arm.orig/include/configs/davinci_dm357_evm.h	2009-05-10 19:41:44.000000000 -0700
+++ u-boot-arm/include/configs/davinci_dm357_evm.h	2009-05-10 20:43:28.000000000 -0700
@@ -107,9 +105,16 @@
 #endif
 #define CONFIG_SKIP_LOWLEVEL_INIT	/* U-Boot is loaded by a bootloader */
 #define CONFIG_SKIP_RELOCATE_UBOOT	/* to a proper address, init done */
-#define CONFIG_SYS_NAND_BASE		DAVINCI_ASYNC_EMIF_DATA_CE0_BASE
 #define CONFIG_SYS_NAND_HW_ECC
-#define CONFIG_SYS_MAX_NAND_DEVICE	1
+/*
+ * Boot NAND, small page, has one chipselect (nCE0)
+ * Storage NAND has two chipselects, nCE2 gated by address BIT(3)
+ */
+#define CONFIG_SYS_NAND_BASE_LIST \
+	{ 0x02000000 , 0x06000000, }
+#define CONFIG_SYS_MAX_NAND_DEVICE	2
+#define CONFIG_SYS_NAND_MAX_CHIPS	2
+
 #define CONFIG_ENV_OFFSET		0x0
 #endif
 /*