From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ira Snyder Date: Tue, 2 Jun 2009 11:17:26 -0700 Subject: [U-Boot] TSEC ethernet controller problems (crc errors / corruption) In-Reply-To: <1243964114.10890.62.camel@localhost.localdomain> References: <20090602162757.GA6979@ovro.caltech.edu> <4A25568F.2080806@ovro.caltech.edu> <1243964114.10890.62.camel@localhost.localdomain> Message-ID: <20090602181726.GC6979@ovro.caltech.edu> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Tue, Jun 02, 2009 at 12:35:14PM -0500, Peter Tyser wrote: > On Tue, 2009-06-02 at 09:42 -0700, David Hawkins wrote: > > > I am unable to reproduce the corruption on my MPC8349EMDS eval board, > > > but I'm running out of ideas to try and find the source of this problem. > > > > One more piece of info: the MPC8349E-MDS board contains the > > MPC8349E processor, whereas our board contains the MPC8349EA > > (silicon v 3.1) processor. We did have a couple of MPC8349EA-MDS > > boards, however, the Xilinx CPLD on both boards spontaneously > > destructed (the CPLD sticky labels melted!). > > > > We can try putting the MPC8349EA processor from one of the > > dead boards into the MPC8349E-MDS board socket - I believe > > this is ok - feel free to warn us that its not :) > > What interface are you using between the MAC and PHY? I saw somewhat > similar weirdness at gigabit on a board when using RGMII and the clock > delays in the PHY and PCB didn't match up correctly (Section 5.12.2 from > the 88e1111 manual). If you aren't using RGMII, this wouldn't be your > issue though... > We're using GMII, exactly the same as the Freescale eval board. I did a very quick test with the board in RGMII mode as well, and the board behaved in exactly the same way it does in GMII mode. Thanks, Ira