[U-Boot] TSEC ethernet controller problems (crc errors/ corruption)

[Ira Snyder <iws@ovro.caltech.edu>]

On Wed, Jun 03, 2009 at 04:44:54AM +0800, Liu Dave-R63238 wrote:
> > What is the ACR register settings?

=> md e0000800 1
e0000800: 00030300    ....

> > What is the freq of core/csb/DDR and TSEC block?

According to U-Boot's clocks command:
=> clocks
Clock configuration:
  Core:                533.333 MHz
  Coherent System Bus: 266.667 MHz
  Local Bus Controller:266.667 MHz
  Local Bus:           33.333 MHz
  DDR:                 266.667 MHz
  SEC:                 88.889 MHz
  I2C1:                266.667 MHz
  I2C2:                266.667 MHz
  TSEC1:               266.667 MHz
  TSEC2:               266.667 MHz
  USB DR:              88.889 MHz
  USB MPH:             88.889 MHz

> 
> And what is the SICRH[30-31]?
> Did you have the matching settings for GMII with 3.3V?
> 

=> md e0000118 1
e0000118: 00000002    ....

This looks wrong. The MPC8349EMDS board has the exact same setting in
that register. Writing 0x0 to the SICRH register did not cause the
problem to go away.

I'll go find out why this is set in the MPC8349EMDS configuration as
well. It shouldn't be.

Thanks,
Ira