From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH] move L2 cache enable/disable function to cache.c in the omap3 SoC directory
Date: Sun, 7 Jun 2009 14:08:47 +0200 [thread overview]
Message-ID: <20090607120847.GG25032@game.jcrosoft.org> (raw)
In-Reply-To: <b64afca20906020516q1690c7fbj517f9e63bfd91fa3@mail.gmail.com>
On 21:16 Tue 02 Jun , Kim, Heung Jun wrote:
> CC: Dirk Behme <dirk.behme@googlemail.com>
> Signed-off-by: HeungJun, Kim <riverful.kim@samsung.com>
>
> ---
>
> The omap3 L2 cache enable/disable function in the cpu/arm_cortexa8/cpu.c moved
> to cpu/arm_cortexa8/omap3/cache.c. Because, it must be CortexA8 ARCH generic
> code below the cpu/arm_cortexa8.
>
> This patches fixes the First issue in the following
>
> http://lists.denx.de/pipermail/u-boot/2009-May/053433.html
>
> The Second issue is fixed by
>
> http://lists.denx.de/pipermail/u-boot/2009-May/053490.html
>
> cpu/arm_cortexa8/cpu.c | 70 ++---------------------------
> cpu/arm_cortexa8/omap3/Makefile | 2 +-
> cpu/arm_cortexa8/omap3/board.c | 5 +-
> cpu/arm_cortexa8/omap3/cache.c | 96 +++++++++++++++++++++++++++++++++++++++
> include/asm-arm/cache.h | 31 +++++++++++++
> 5 files changed, 135 insertions(+), 69 deletions(-)
> create mode 100644 cpu/arm_cortexa8/omap3/cache.c
> create mode 100644 include/asm-arm/cache.h
applied to arm/next with manual merge
for your next please do base your code on the arm/next
Best Regards,
J.
next prev parent reply other threads:[~2009-06-07 12:08 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-06-02 12:16 [U-Boot] [PATCH] move L2 cache enable/disable function to cache.c in the omap3 SoC directory Kim, Heung Jun
2009-06-07 12:08 ` Jean-Christophe PLAGNIOL-VILLARD [this message]
2009-06-07 12:24 ` Dirk Behme
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