From mboxrd@z Thu Jan 1 00:00:00 1970 From: Anton Vorontsov Date: Wed, 10 Jun 2009 00:41:04 +0400 Subject: [U-Boot] [PATCH 5/5] mpc85xx: Setup QE pinmux for SPI Flash on MPC8569E-MDS boards In-Reply-To: <20090609204030.GA21015@oksana.dev.rtsoft.ru> References: <20090609204030.GA21015@oksana.dev.rtsoft.ru> Message-ID: <20090609204104.GE22606@oksana.dev.rtsoft.ru> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de SPI Flash (M25P40) is connected to the SPI1 bus, we need a few qe_iop entries to actually enable SPI1 on these boards. Signed-off-by: Anton Vorontsov --- board/freescale/mpc8569mds/mpc8569mds.c | 6 ++++++ 1 files changed, 6 insertions(+), 0 deletions(-) diff --git a/board/freescale/mpc8569mds/mpc8569mds.c b/board/freescale/mpc8569mds/mpc8569mds.c index b2b7a12..760ae73 100644 --- a/board/freescale/mpc8569mds/mpc8569mds.c +++ b/board/freescale/mpc8569mds/mpc8569mds.c @@ -154,6 +154,12 @@ const qe_iop_conf_t qe_iop_conf_tab[] = { {5, 10, 2, 0, 3}, /* UART1_CTS_B */ {5, 11, 1, 0, 2}, /* UART1_RTS_B */ + /* SPI Flash, M25P40 */ + {4, 27, 3, 0, 1}, /* SPI_MOSI */ + {4, 28, 3, 0, 1}, /* SPI_MISO */ + {4, 29, 3, 0, 1}, /* SPI_CLK */ + {4, 30, 1, 0, 0}, /* SPI_SEL, GPIO */ + {0, 0, 0, 0, QE_IOP_TAB_END} /* END of table */ }; -- 1.6.3.1