[U-Boot] [PATCH v4 6/6] MX31: Add NAND SPL boot support to i.MX31 PDK board.

[Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>]

On 20:50 Sat 13 Jun     , Magnus Lilja wrote:
> Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
> ---
>  MAKEALL                                     |    1 +
>  Makefile                                    |   14 +++-
>  board/freescale/mx31pdk/config.mk           |    4 +
>  board/freescale/mx31pdk/lowlevel_init.S     |  114 +++++++++++++++++++++++++++
>  include/asm-arm/arch-mx31/mx31-regs.h       |   54 +++++++++++++
>  include/configs/mx31pdk.h                   |   21 ++++-
>  nand_spl/board/freescale/mx31pdk/Makefile   |   54 +++++++++++++
>  nand_spl/board/freescale/mx31pdk/config.mk  |    5 +
>  nand_spl/board/freescale/mx31pdk/u-boot.lds |   36 +++++++++
>  9 files changed, 297 insertions(+), 6 deletions(-)
>  create mode 100644 board/freescale/mx31pdk/lowlevel_init.S
>  create mode 100644 nand_spl/board/freescale/mx31pdk/Makefile
>  create mode 100644 nand_spl/board/freescale/mx31pdk/config.mk
>  create mode 100644 nand_spl/board/freescale/mx31pdk/u-boot.lds
> 
> diff --git a/MAKEALL b/MAKEALL
> index 0757064..1f7cab4 100755
> --- a/MAKEALL
> +++ b/MAKEALL
> @@ -553,6 +553,7 @@ LIST_ARM11="			\
>  	imx31_phycore_eet	\
>  	mx31ads			\
>  	mx31pdk			\
> +	mx31pdk_nand		\
>  	qong			\
>  	smdk6400		\
>  "
> diff --git a/Makefile b/Makefile
> index e445e51..29d1f22 100644
> --- a/Makefile
> +++ b/Makefile
> @@ -376,7 +376,7 @@ $(LDSCRIPT):	depend
>  $(NAND_SPL):	$(TIMESTAMP_FILE) $(VERSION_FILE) $(obj)include/autoconf.mk
>  		$(MAKE) -C nand_spl/board/$(BOARDDIR) all
>  
> -$(U_BOOT_NAND):	$(NAND_SPL) $(obj)u-boot.bin
> +$(U_BOOT_NAND):	$(NAND_SPL) $(obj)u-boot.bin $(obj)include/autoconf.mk
I still does not understand this as NAND_SPL already depend on $(obj)include/autoconf.mk
>  		cat $(obj)nand_spl/u-boot-spl-16k.bin $(obj)u-boot.bin > $(obj)u-boot-nand.bin
>  
>  $(ONENAND_IPL):	$(TIMESTAMP_FILE) $(VERSION_FILE) $(obj)include/autoconf.mk
> @@ -3115,8 +3115,16 @@ imx31_phycore_config	: unconfig
>  mx31ads_config		: unconfig
>  	@$(MKCONFIG) $(@:_config=) arm arm1136 mx31ads freescale mx31
>  

> +
> +.globl lowlevel_init
why twice??
> +
> +#include <asm/arch/mx31-regs.h>
> +#include <asm/macro.h>
> +
> +#define CCM_CCMR_SETUP		0x074B0BF5
> +#define CCM_PDR0_SETUP_532MHZ	(PDR0_CSI_PODF(0x1ff) | PDR0_PER_PODF(7) | \
> +				 PDR0_HSP_PODF(3) | PDR0_NFC_PODF(5) |     \
> +				 PDR0_IPG_PODF(1) | PDR0_MAX_PODF(3) |     \
> +				 PDR0_MCU_PODF(0))
> +#define CCM_MPCTL_SETUP_532MHZ	(PLL_PD(0) | PLL_MFD(51) | PLL_MFI(10) |   \
> +				 PLL_MFN(12))
> +
> +#define ESDMISC_MDDR_SETUP	0x00000004
> +#define ESDMISC_MDDR_RESET_DL	0x0000000c
> +#define ESDCFG0_MDDR_SETUP	0x006ac73a
> +
> +#define ESDCTL_ROW_COL		(ESDCTL_SDE | ESDCTL_ROW(2) | ESDCTL_COL(2))
> +#define ESDCTL_SETTINGS		(ESDCTL_ROW_COL | ESDCTL_SREFR(3) | \
> +				 ESDCTL_DSIZ(2) | ESDCTL_BL(1))
> +#define ESDCTL_PRECHARGE	(ESDCTL_ROW_COL | ESDCTL_CMD_PRECHARGE)
> +#define ESDCTL_AUTOREFRESH	(ESDCTL_ROW_COL | ESDCTL_CMD_AUTOREFRESH)
> +#define ESDCTL_LOADMODEREG	(ESDCTL_ROW_COL | ESDCTL_CMD_LOADMODEREG)
> +#define ESDCTL_RW		ESDCTL_SETTINGS
those macro need to move too config.h
> +
> +.globl lowlevel_init
> +lowlevel_init:
> +	/* Also setup the Peripheral Port Remap register inside the core */
> +	ldr	r0, =ARM_PPMRR      /* start from AIPS 2GB region */
> +	mcr	p15, 0, r0, c15, c2, 4
> +
<snip>
> +
> +# defines $(obj).depend target
> +include $(SRCTREE)/rules.mk
> +
> +sinclude $(obj).depend
> +
> +#########################################################################
> diff --git a/nand_spl/board/freescale/mx31pdk/config.mk b/nand_spl/board/freescale/mx31pdk/config.mk
> new file mode 100644
> index 0000000..198cafc
> --- /dev/null
> +++ b/nand_spl/board/freescale/mx31pdk/config.mk
> @@ -0,0 +1,5 @@
> +PAD_TO	:= 2048
> +
> +ifeq ($(debug),1)
> +PLATFORM_CPPFLAGS += -DDEBUG
> +endif
I do not think it's board specific

Best Regards,
J.