[U-Boot] [PATCH v4 6/6] MX31: Add NAND SPL boot support to i.MX31 PDK board.

[Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>]

On 21:29 Tue 30 Jun     , Magnus Lilja wrote:
> Hi
> 
> 2009/6/30 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>:
> >> >> +
> >> >> +#include <asm/arch/mx31-regs.h>
> >> >> +#include <asm/macro.h>
> >> >> +
> >> >> +#define CCM_CCMR_SETUP ? ? ? ? ? ? ? 0x074B0BF5
> >> >> +#define CCM_PDR0_SETUP_532MHZ ? ? ? ?(PDR0_CSI_PODF(0x1ff) | PDR0_PER_PODF(7) | \
> >> >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?PDR0_HSP_PODF(3) | PDR0_NFC_PODF(5) | ? ? \
> >> >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?PDR0_IPG_PODF(1) | PDR0_MAX_PODF(3) | ? ? \
> >> >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?PDR0_MCU_PODF(0))
> >> >> +#define CCM_MPCTL_SETUP_532MHZ ? ? ? (PLL_PD(0) | PLL_MFD(51) | PLL_MFI(10) | ? \
> >> >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?PLL_MFN(12))
> >> >> +
> >> >> +#define ESDMISC_MDDR_SETUP ? 0x00000004
> >> >> +#define ESDMISC_MDDR_RESET_DL ? ? ? ?0x0000000c
> >> >> +#define ESDCFG0_MDDR_SETUP ? 0x006ac73a
> >> >> +
> >> >> +#define ESDCTL_ROW_COL ? ? ? ? ? ? ? (ESDCTL_SDE | ESDCTL_ROW(2) | ESDCTL_COL(2))
> >> >> +#define ESDCTL_SETTINGS ? ? ? ? ? ? ?(ESDCTL_ROW_COL | ESDCTL_SREFR(3) | \
> >> >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?ESDCTL_DSIZ(2) | ESDCTL_BL(1))
> >> >> +#define ESDCTL_PRECHARGE ? ? (ESDCTL_ROW_COL | ESDCTL_CMD_PRECHARGE)
> >> >> +#define ESDCTL_AUTOREFRESH ? (ESDCTL_ROW_COL | ESDCTL_CMD_AUTOREFRESH)
> >> >> +#define ESDCTL_LOADMODEREG ? (ESDCTL_ROW_COL | ESDCTL_CMD_LOADMODEREG)
> >> >> +#define ESDCTL_RW ? ? ? ? ? ?ESDCTL_SETTINGS
> >> > those macro need to move too config.h
> >>
> >> Why? These are specific to this board and only used within this file.
> > yes but they are config so it's make sense to put with config and not in the
> > code as we do everytime
> > and a lot's of time we see that the code can be shared but not the define
> 
> So you mean that it should be placed in include/configs/mx31pdk.h?
yes

Best Regards,
J.