* [U-Boot] [PATCH 01/14] xpedite1k: Use standard CFI flash driver
2009-07-18 0:01 [U-Boot] [PATCH 00/14] XPedite1K updates Peter Tyser
@ 2009-07-18 0:01 ` Peter Tyser
2009-07-18 0:01 ` [U-Boot] [PATCH 02/14] xpedite1k: Remove CONFIG_SYS_DRAM_TEST support Peter Tyser
` (13 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Peter Tyser @ 2009-07-18 0:01 UTC (permalink / raw)
To: u-boot
Using the CFI flash driver will allow write access to the 16MB Intel
StrataFlash present on the XPedite1000. The 512KB socketed (non
CFI-compliant flash) will no longer be writable.
The mapping of the 16MB Strata flash was moved to 0xff000000 and the
512KB AMD socketed flash was moved to 0xfe000000.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
---
board/xpedite1k/Makefile | 2 +-
board/xpedite1k/flash.c | 607 -------------------------------------------
board/xpedite1k/xpedite1k.c | 10 +-
include/configs/XPEDITE1K.h | 10 +-
4 files changed, 12 insertions(+), 617 deletions(-)
delete mode 100644 board/xpedite1k/flash.c
diff --git a/board/xpedite1k/Makefile b/board/xpedite1k/Makefile
index 6ab1a26..b93f2c3 100644
--- a/board/xpedite1k/Makefile
+++ b/board/xpedite1k/Makefile
@@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).a
-COBJS = $(BOARD).o flash.o
+COBJS = $(BOARD).o
SOBJS = init.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
diff --git a/board/xpedite1k/flash.c b/board/xpedite1k/flash.c
deleted file mode 100644
index 0711931..0000000
--- a/board/xpedite1k/flash.c
+++ /dev/null
@@ -1,607 +0,0 @@
-/*
- * (C) Copyright 2002-2004
- * Wolfgang Denk, DENX Software Engineering, wd at denx.de.
- *
- * (C) Copyright 2002 Jun Gu <jung@artesyncp.com>
- * Add support for Am29F016D and dynamic switch setting.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * Modified 4/5/2001
- * Wait for completion of each sector erase command issued
- * 4/5/2001
- * Chris Hallinan - DS4.COM, Inc. - clh at net1plus.com
- */
-
-/*
- * Ported to XPedite1000, 1/2 mb boot flash only
- * Travis B. Sawyer, <travis.sawyer@sandburst.com>
- */
-
-#include <common.h>
-#include <ppc4xx.h>
-#include <asm/processor.h>
-
-
-#undef DEBUG
-#ifdef DEBUG
-#define DEBUGF(x...) printf(x)
-#else
-#define DEBUGF(x...)
-#endif /* DEBUG */
-
-#define BOOT_SMALL_FLASH 32 /* 00100000 */
-#define FLASH_ONBD_N 2 /* 00000010 */
-#define FLASH_SRAM_SEL 1 /* 00000001 */
-
-#define BOOT_SMALL_FLASH_VAL 4
-#define FLASH_ONBD_N_VAL 2
-#define FLASH_SRAM_SEL_VAL 1
-
-
-flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-static unsigned long flash_addr_table[8][CONFIG_SYS_MAX_FLASH_BANKS] = {
- {0xfff80000}, /* 0:000: configuraton 3 */
- {0xfff90000}, /* 1:001: configuraton 4 */
- {0xfffa0000}, /* 2:010: configuraton 7 */
- {0xfffb0000}, /* 3:011: configuraton 8 */
- {0xfffc0000}, /* 4:100: configuraton 1 */
- {0xfffd0000}, /* 5:101: configuraton 2 */
- {0xfffe0000}, /* 6:110: configuraton 5 */
- {0xffff0000} /* 7:111: configuraton 6 */
-};
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-
-
-#ifdef CONFIG_XPEDITE1K
-#define ADDR0 0x5555
-#define ADDR1 0x2aaa
-#define FLASH_WORD_SIZE unsigned char
-#endif
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- unsigned long total_b = 0;
- unsigned long size_b[CONFIG_SYS_MAX_FLASH_BANKS];
- unsigned short index = 0;
- int i;
-
-
- DEBUGF("\n");
- DEBUGF("FLASH: Index: %d\n", index);
-
- /* Init: no FLASHes known */
- for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- flash_info[i].sector_count = -1;
- flash_info[i].size = 0;
-
- /* check whether the address is 0 */
- if (flash_addr_table[index][i] == 0) {
- continue;
- }
-
- /* call flash_get_size() to initialize sector address */
- size_b[i] = flash_get_size(
- (vu_long *)flash_addr_table[index][i], &flash_info[i]);
- flash_info[i].size = size_b[i];
- if (flash_info[i].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",
- i, size_b[i], size_b[i]<<20);
- flash_info[i].sector_count = -1;
- flash_info[i].size = 0;
- }
-
- total_b += flash_info[i].size;
- }
-
- return total_b;
-}
-
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
- int k;
- int size;
- int erased;
- volatile unsigned long *flash;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
- case FLASH_MAN_SST: printf ("SST "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AMD016: printf ("AM29F016D (16 Mbit, uniform sector size)\n");
- break;
- case FLASH_AM040: printf ("AM29F040 (512 Kbit, uniform sector size)\n");
- break;
- case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n");
- break;
- case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n");
- break;
- case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n");
- break;
- case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n");
- break;
- case FLASH_SST800A: printf ("SST39LF/VF800 (8 Mbit, uniform sector size)\n");
- break;
- case FLASH_SST160A: printf ("SST39LF/VF160 (16 Mbit, uniform sector size)\n");
- break;
- default: printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld KB in %d Sectors\n",
- info->size >> 10, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- /*
- * Check if whole sector is erased
- */
- if (i != (info->sector_count-1))
- size = info->start[i+1] - info->start[i];
- else
- size = info->start[0] + info->size - info->start[i];
- erased = 1;
- flash = (volatile unsigned long *)info->start[i];
- size = size >> 2; /* divide by 4 for longword access */
- for (k=0; k<size; k++)
- {
- if (*flash++ != 0xffffffff)
- {
- erased = 0;
- break;
- }
- }
-
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s%s",
- info->start[i],
- erased ? " E" : " ",
- info->protect[i] ? "RO " : " "
- );
- }
- printf ("\n");
- return;
- }
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info)
-{
- short i;
- FLASH_WORD_SIZE value;
- ulong base = (ulong)addr;
- volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)addr;
-
- DEBUGF("FLASH ADDR: %08x\n", (unsigned)addr );
-
- /* Write auto select command: read Manufacturer ID */
- udelay(10000);
- addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
- udelay(1000);
- addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
- udelay(1000);
- addr2[ADDR0] = (FLASH_WORD_SIZE)0x00900090;
- udelay(1000);
-
-#ifdef CONFIG_ADCIOP
- value = addr2[2];
-#else
- value = addr2[0];
-#endif
-
- DEBUGF("FLASH MANUFACT: %x\n", value);
-
- switch (value) {
- case (FLASH_WORD_SIZE)AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
- case (FLASH_WORD_SIZE)FUJ_MANUFACT:
- info->flash_id = FLASH_MAN_FUJ;
- break;
- case (FLASH_WORD_SIZE)SST_MANUFACT:
- info->flash_id = FLASH_MAN_SST;
- break;
- case (FLASH_WORD_SIZE)STM_MANUFACT:
- info->flash_id = FLASH_MAN_STM;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
-
-#ifdef CONFIG_ADCIOP
- value = addr2[0]; /* device ID */
- debug ("\ndev_code=%x\n", value);
-#else
- value = addr2[1]; /* device ID */
-#endif
-
- DEBUGF("\nFLASH DEVICEID: %x\n", value);
-
- switch (value) {
- case (FLASH_WORD_SIZE)AMD_ID_LV040B:
- info->flash_id += FLASH_AM040;
- info->sector_count = 8;
- info->size = 0x00080000; /* => 512 kb */
- break;
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
-
- }
-
- /* set up sector start address table */
- if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
- (info->flash_id == FLASH_AM040) ||
- (info->flash_id == FLASH_AMD016)) {
- for (i = 0; i < info->sector_count; i++)
- info->start[i] = base + (i * 0x00010000);
- } else {
- if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00004000;
- info->start[2] = base + 0x00006000;
- info->start[3] = base + 0x00008000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00010000) - 0x00030000;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00006000;
- info->start[i--] = base + info->size - 0x00008000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00010000;
- }
- }
- }
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
-#ifdef CONFIG_ADCIOP
- addr2 = (volatile FLASH_WORD_SIZE *)(info->start[i]);
- info->protect[i] = addr2[4] & 1;
-#else
- addr2 = (volatile FLASH_WORD_SIZE *)(info->start[i]);
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST)
- info->protect[i] = 0;
- else
- info->protect[i] = addr2[2] & 1;
-#endif
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
-#if 0 /* test-only */
-#ifdef CONFIG_ADCIOP
- addr2 = (volatile unsigned char *)info->start[0];
- addr2[ADDR0] = 0xAA;
- addr2[ADDR1] = 0x55;
- addr2[ADDR0] = 0xF0; /* reset bank */
-#else
- addr2 = (FLASH_WORD_SIZE *)info->start[0];
- *addr2 = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
-#endif
-#else /* test-only */
- addr2 = (FLASH_WORD_SIZE *)info->start[0];
- *addr2 = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
-#endif /* test-only */
- }
-
- return (info->size);
-}
-
-int wait_for_DQ7(flash_info_t *info, int sect)
-{
- ulong start, now, last;
- volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[sect]);
-
- start = get_timer (0);
- last = start;
- while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) {
- if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return -1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[0]);
- volatile FLASH_WORD_SIZE *addr2;
- int flag, prot, sect, l_sect;
- int i;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("Can't erase unknown flash type - aborted\n");
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr2 = (FLASH_WORD_SIZE *)(info->start[sect]);
- printf("Erasing sector %p\n", addr2);
-
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) {
- addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
- addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
- addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080;
- addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
- addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
- addr2[0] = (FLASH_WORD_SIZE)0x00500050; /* block erase */
- for (i=0; i<50; i++)
- udelay(1000); /* wait 1 ms */
- } else {
- addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
- addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
- addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080;
- addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
- addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
- addr2[0] = (FLASH_WORD_SIZE)0x00300030; /* sector erase */
- }
- l_sect = sect;
- /*
- * Wait for each sector to complete, it's more
- * reliable. According to AMD Spec, you must
- * issue all erase commands within a specified
- * timeout. This has been seen to fail, especially
- * if printf()s are included (for debug)!!
- */
- wait_for_DQ7(info, sect);
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait@least 80us - let's wait 1 ms */
- udelay (1000);
-
-#if 0
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
- wait_for_DQ7(info, l_sect);
-
-DONE:
-#endif
- /* reset to read mode */
- addr = (FLASH_WORD_SIZE *)info->start[0];
- addr[0] = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
-
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word(info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t * info, ulong dest, ulong data)
-{
- volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *) (info->start[0]);
- volatile FLASH_WORD_SIZE *dest2 = (FLASH_WORD_SIZE *) dest;
- volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *) & data;
- ulong start;
- int i;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((volatile FLASH_WORD_SIZE *) dest) &
- (FLASH_WORD_SIZE) data) != (FLASH_WORD_SIZE) data) {
- return (2);
- }
-
- for (i = 0; i < 4 / sizeof (FLASH_WORD_SIZE); i++) {
- int flag;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- addr2[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA;
- addr2[ADDR1] = (FLASH_WORD_SIZE) 0x00550055;
- addr2[ADDR0] = (FLASH_WORD_SIZE) 0x00A000A0;
-
- dest2[i] = data2[i];
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts ();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((dest2[i] & (FLASH_WORD_SIZE) 0x00800080) !=
- (data2[i] & (FLASH_WORD_SIZE) 0x00800080)) {
-
- if (get_timer (start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- }
-
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- */
diff --git a/board/xpedite1k/xpedite1k.c b/board/xpedite1k/xpedite1k.c
index 044aeb9..bbbcdb1 100644
--- a/board/xpedite1k/xpedite1k.c
+++ b/board/xpedite1k/xpedite1k.c
@@ -50,12 +50,10 @@ int board_early_init_f(void)
/*--------------------------------------------------------------------
* Setup the external bus controller/chip selects
*-------------------------------------------------------------------*/
-
- /* set the bus controller */
- mtebc (pb0ap, 0x04055200); /* FLASH/SRAM */
- mtebc (pb0cr, 0xfff18000); /* BAS=0xfff 1MB R/W 8-bit */
- mtebc (pb1ap, 0x04055200); /* FLASH/SRAM */
- mtebc (pb1cr, 0xfe098000); /* BAS=0xff8 16MB R/W 8-bit */
+ mtebc (pb0ap, 0x04055200); /* 16MB Strata FLASH */
+ mtebc (pb0cr, 0xff098000); /* BAS=0xff0 16MB R/W 8-bit */
+ mtebc (pb1ap, 0x04055200); /* 512KB Socketed AMD FLASH */
+ mtebc (pb1cr, 0xfe018000); /* BAS=0xfe0 1MB R/W 8-bit */
/*--------------------------------------------------------------------
* Setup the interrupt controller polarities, triggers, etc.
diff --git a/include/configs/XPEDITE1K.h b/include/configs/XPEDITE1K.h
index 74e55c9..1eb638b 100644
--- a/include/configs/XPEDITE1K.h
+++ b/include/configs/XPEDITE1K.h
@@ -52,9 +52,9 @@
* actual resources get mapped (not physical addresses)
*----------------------------------------------------------------------*/
#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* _must_ be 0 */
-#define CONFIG_SYS_FLASH_BASE 0xfff80000 /* start of FLASH */
+#define CONFIG_SYS_FLASH_BASE 0xff000000 /* start of FLASH */
-#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE /* start of monitor */
+#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
#define CONFIG_SYS_PCI_MEMBASE 0x80000000 /* mapped pci memory */
#define CONFIG_SYS_PERIPHERAL_BASE 0xe0000000 /* internal peripherals */
#define CONFIG_SYS_ISRAM_BASE 0xc0000000 /* internal SRAM */
@@ -128,7 +128,11 @@ extern void out32(unsigned int, unsigned long);
* FLASH related
*----------------------------------------------------------------------*/
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */
-#define CONFIG_SYS_MAX_FLASH_SECT 8 /* sectors per device */
+#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE}
+#define CONFIG_SYS_MAX_FLASH_SECT 128 /* sectors per device */
+#define CONFIG_FLASH_CFI_DRIVER
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
#undef CONFIG_SYS_FLASH_CHECKSUM
#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
--
1.6.2.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [U-Boot] [PATCH 02/14] xpedite1k: Remove CONFIG_SYS_DRAM_TEST support
2009-07-18 0:01 [U-Boot] [PATCH 00/14] XPedite1K updates Peter Tyser
2009-07-18 0:01 ` [U-Boot] [PATCH 01/14] xpedite1k: Use standard CFI flash driver Peter Tyser
@ 2009-07-18 0:01 ` Peter Tyser
2009-07-18 0:01 ` [U-Boot] [PATCH 03/14] xpedite1k: Remove support for fixed SDRAM configuration Peter Tyser
` (12 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Peter Tyser @ 2009-07-18 0:01 UTC (permalink / raw)
To: u-boot
POST or command line tests provide similar functionality
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
---
board/xpedite1k/xpedite1k.c | 31 -------------------------------
include/configs/XPEDITE1K.h | 1 -
2 files changed, 0 insertions(+), 32 deletions(-)
diff --git a/board/xpedite1k/xpedite1k.c b/board/xpedite1k/xpedite1k.c
index bbbcdb1..9abb83f 100644
--- a/board/xpedite1k/xpedite1k.c
+++ b/board/xpedite1k/xpedite1k.c
@@ -127,37 +127,6 @@ phys_size_t initdram (int board_type)
return dram_size;
}
-
-#if defined(CONFIG_SYS_DRAM_TEST)
-int testdram (void)
-{
- uint *pstart = (uint *) 0x00000000;
- uint *pend = (uint *) 0x08000000;
- uint *p;
-
- for (p = pstart; p < pend; p++)
- *p = 0xaaaaaaaa;
-
- for (p = pstart; p < pend; p++) {
- if (*p != 0xaaaaaaaa) {
- printf ("SDRAM test fails at: %08x\n", (uint) p);
- return 1;
- }
- }
-
- for (p = pstart; p < pend; p++)
- *p = 0x55555555;
-
- for (p = pstart; p < pend; p++) {
- if (*p != 0x55555555) {
- printf ("SDRAM test fails at: %08x\n", (uint) p);
- return 1;
- }
- }
- return 0;
-}
-#endif
-
#if !defined(CONFIG_SPD_EEPROM)
/*************************************************************************
* fixed sdram init -- doesn't use serial presence detect.
diff --git a/include/configs/XPEDITE1K.h b/include/configs/XPEDITE1K.h
index 1eb638b..57878a2 100644
--- a/include/configs/XPEDITE1K.h
+++ b/include/configs/XPEDITE1K.h
@@ -39,7 +39,6 @@
#define CONFIG_440GX 1 /* 440 GX */
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
#define CONFIG_MISC_INIT_R
-#undef CONFIG_SYS_DRAM_TEST /* Disable-takes long time! */
#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
--
1.6.2.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [U-Boot] [PATCH 03/14] xpedite1k: Remove support for fixed SDRAM configuration
2009-07-18 0:01 [U-Boot] [PATCH 00/14] XPedite1K updates Peter Tyser
2009-07-18 0:01 ` [U-Boot] [PATCH 01/14] xpedite1k: Use standard CFI flash driver Peter Tyser
2009-07-18 0:01 ` [U-Boot] [PATCH 02/14] xpedite1k: Remove CONFIG_SYS_DRAM_TEST support Peter Tyser
@ 2009-07-18 0:01 ` Peter Tyser
2009-07-18 0:01 ` [U-Boot] [PATCH 04/14] xpedite1k: Remove support for reading MACs from EEPROM Peter Tyser
` (11 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Peter Tyser @ 2009-07-18 0:01 UTC (permalink / raw)
To: u-boot
All XPedite1000's have SPD EEPROMs present and no fixed configuration
parameters are currently defined or used
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
---
board/xpedite1k/xpedite1k.c | 64 +------------------------------------------
1 files changed, 1 insertions(+), 63 deletions(-)
diff --git a/board/xpedite1k/xpedite1k.c b/board/xpedite1k/xpedite1k.c
index 9abb83f..8a4e76c 100644
--- a/board/xpedite1k/xpedite1k.c
+++ b/board/xpedite1k/xpedite1k.c
@@ -29,12 +29,6 @@
DECLARE_GLOBAL_DATA_PTR;
-#define BOOT_SMALL_FLASH 32 /* 00100000 */
-#define FLASH_ONBD_N 2 /* 00000010 */
-#define FLASH_SRAM_SEL 1 /* 00000001 */
-
-long int fixed_sdram (void);
-
int board_early_init_f(void)
{
unsigned long sdrreg;
@@ -117,64 +111,8 @@ int checkboard (void)
phys_size_t initdram (int board_type)
{
- long dram_size = 0;
-
-#if defined(CONFIG_SPD_EEPROM)
- dram_size = spd_sdram ();
-#else
- dram_size = fixed_sdram ();
-#endif
- return dram_size;
-}
-
-#if !defined(CONFIG_SPD_EEPROM)
-/*************************************************************************
- * fixed sdram init -- doesn't use serial presence detect.
- *
- * Assumes: 128 MB, non-ECC, non-registered
- * PLB @ 133 MHz
- *
- ************************************************************************/
-long int fixed_sdram (void)
-{
- uint reg;
-
- /*--------------------------------------------------------------------
- * Setup some default
- *------------------------------------------------------------------*/
- mtsdram (mem_uabba, 0x00000000); /* ubba=0 (default) */
- mtsdram (mem_slio, 0x00000000); /* rdre=0 wrre=0 rarw=0 */
- mtsdram (mem_devopt, 0x00000000); /* dll=0 ds=0 (normal) */
- mtsdram (mem_wddctr, 0x00000000); /* wrcp=0 dcd=0 */
- mtsdram (mem_clktr, 0x40000000); /* clkp=1 (90 deg wr) dcdt=0 */
-
- /*--------------------------------------------------------------------
- * Setup for board-specific specific mem
- *------------------------------------------------------------------*/
- /*
- * Following for CAS Latency = 2.5 @ 133 MHz PLB
- */
- mtsdram (mem_b0cr, 0x000a4001); /* SDBA=0x000 128MB, Mode 3, enabled */
- mtsdram (mem_tr0, 0x410a4012); /* WR=2 WD=1 CL=2.5 PA=3 CP=4 LD=2 */
- /* RA=10 RD=3 */
- mtsdram (mem_tr1, 0x8080082f); /* SS=T2 SL=STAGE 3 CD=1 CT=0x02f */
- mtsdram (mem_rtr, 0x08200000); /* Rate 15.625 ns @ 133 MHz PLB */
- mtsdram (mem_cfg1, 0x00000000); /* Self-refresh exit, disable PM */
- udelay (400); /* Delay 200 usecs (min) */
-
- /*--------------------------------------------------------------------
- * Enable the controller, then wait for DCEN to complete
- *------------------------------------------------------------------*/
- mtsdram (mem_cfg0, 0x86000000); /* DCEN=1, PMUD=1, 64-bit */
- for (;;) {
- mfsdram (mem_mcsts, reg);
- if (reg & 0x80000000)
- break;
- }
-
- return (128 * 1024 * 1024); /* 128 MB */
+ return spd_sdram();
}
-#endif /* !defined(CONFIG_SPD_EEPROM) */
/*************************************************************************
--
1.6.2.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [U-Boot] [PATCH 04/14] xpedite1k: Remove support for reading MACs from EEPROM
2009-07-18 0:01 [U-Boot] [PATCH 00/14] XPedite1K updates Peter Tyser
` (2 preceding siblings ...)
2009-07-18 0:01 ` [U-Boot] [PATCH 03/14] xpedite1k: Remove support for fixed SDRAM configuration Peter Tyser
@ 2009-07-18 0:01 ` Peter Tyser
2009-07-18 0:01 ` [U-Boot] [PATCH 05/14] xpedite1k: Cleanup coding style Peter Tyser
` (10 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Peter Tyser @ 2009-07-18 0:01 UTC (permalink / raw)
To: u-boot
By default, the XPedite1000 comes installed with xMon, a proprietary
bootloader. xMon stores its MAC address in an onboard EEPROM. Rather
than requiring a non-standard location in the EEPROM to be reserved for
MAC addresses, store the MAC addresses in U-Boot's standard environment.
A U-Boot application or OS application can be used to migrate xMon MAC
addresses to U-Boot's environment if necessary.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
---
board/xpedite1k/xpedite1k.c | 62 +------------------------------------------
include/configs/XPEDITE1K.h | 1 -
2 files changed, 1 insertions(+), 62 deletions(-)
diff --git a/board/xpedite1k/xpedite1k.c b/board/xpedite1k/xpedite1k.c
index 8a4e76c..36a133f 100644
--- a/board/xpedite1k/xpedite1k.c
+++ b/board/xpedite1k/xpedite1k.c
@@ -235,64 +235,4 @@ ulong post_word_load (void)
return *save_addr;
}
-#endif
-
-/*-----------------------------------------------------------------------------
- * board_get_enetaddr -- Read the MAC Addresses in the I2C EEPROM
- *-----------------------------------------------------------------------------
- */
-static int read_i2c;
-static void board_get_enetaddr(uchar *enet)
-{
- int i;
- unsigned char buff[0x100], *cp;
-
- if (read_i2c)
- return;
-
- /* Initialize I2C */
- i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
-
- /* Read 256 bytes in EEPROM */
- i2c_read (0x50, 0, 1, buff, 0x100);
-
- cp = &buff[0xF4];
- for (i = 0; i < 6; i++,cp++)
- enet[i] = *cp;
-
- printf("MAC address = %pM\n", enet);
- read_i2c = 1;
-}
-
-int misc_init_r(void)
-{
- uchar enetaddr[6], i2c_enetaddr[6];
-
- if (!eth_getenv_enetaddr("ethaddr", enetaddr)) {
- board_get_enetaddr(i2c_enetaddr);
- eth_setenv_enetaddr("ethaddr", i2c_enetaddr);
- }
-
-#ifdef CONFIG_HAS_ETH1
- if (!eth_getenv_enetaddr("eth1addr", enetaddr)) {
- board_get_enetaddr(i2c_enetaddr);
- eth_setenv_enetaddr("eth1addr", i2c_enetaddr);
- }
-#endif
-
-#ifdef CONFIG_HAS_ETH2
- if (!eth_getenv_enetaddr("eth2addr", enetaddr)) {
- board_get_enetaddr(i2c_enetaddr);
- eth_setenv_enetaddr("eth2addr", i2c_enetaddr);
- }
-#endif
-
-#ifdef CONFIG_HAS_ETH3
- if (!eth_getenv_enetaddr("eth3addr", enetaddr)) {
- board_get_enetaddr(i2c_enetaddr);
- eth_setenv_enetaddr("eth3addr", i2c_enetaddr);
- }
-#endif
-
- return 0;
-}
+#endif
\ No newline@end of file
diff --git a/include/configs/XPEDITE1K.h b/include/configs/XPEDITE1K.h
index 57878a2..93c4b0a 100644
--- a/include/configs/XPEDITE1K.h
+++ b/include/configs/XPEDITE1K.h
@@ -38,7 +38,6 @@
#define CONFIG_440 1
#define CONFIG_440GX 1 /* 440 GX */
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
-#define CONFIG_MISC_INIT_R
#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
--
1.6.2.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [U-Boot] [PATCH 05/14] xpedite1k: Cleanup coding style
2009-07-18 0:01 [U-Boot] [PATCH 00/14] XPedite1K updates Peter Tyser
` (3 preceding siblings ...)
2009-07-18 0:01 ` [U-Boot] [PATCH 04/14] xpedite1k: Remove support for reading MACs from EEPROM Peter Tyser
@ 2009-07-18 0:01 ` Peter Tyser
2009-07-18 0:01 ` [U-Boot] [PATCH 06/14] xpedite1k: Add support for optional flashes Peter Tyser
` (9 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Peter Tyser @ 2009-07-18 0:01 UTC (permalink / raw)
To: u-boot
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
---
board/xpedite1k/init.S | 67 +++++++-------
board/xpedite1k/u-boot.lds | 3 -
board/xpedite1k/xpedite1k.c | 210 +++++++++++++++++++-----------------------
include/configs/XPEDITE1K.h | 216 ++++++++++++++++++-------------------------
4 files changed, 218 insertions(+), 278 deletions(-)
diff --git a/board/xpedite1k/init.S b/board/xpedite1k/init.S
index 8a04f4f..54371e2 100644
--- a/board/xpedite1k/init.S
+++ b/board/xpedite1k/init.S
@@ -1,5 +1,5 @@
/*
-* Copyright (C) 2002 Scott McNutt <smcnutt@artesyncp.com>
+* Copyright (C) 2002 Scott McNutt <smcnutt@artesyncp.com>
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -24,62 +24,59 @@
#include <config.h>
/* General */
-#define TLB_VALID 0x00000200
+#define TLB_VALID 0x00000200
/* Supported page sizes */
-
-#define SZ_1K 0x00000000
-#define SZ_4K 0x00000010
-#define SZ_16K 0x00000020
-#define SZ_64K 0x00000030
-#define SZ_256K 0x00000040
-#define SZ_1M 0x00000050
-#define SZ_16M 0x00000070
-#define SZ_256M 0x00000090
+#define SZ_1K 0x00000000
+#define SZ_4K 0x00000010
+#define SZ_16K 0x00000020
+#define SZ_64K 0x00000030
+#define SZ_256K 0x00000040
+#define SZ_1M 0x00000050
+#define SZ_16M 0x00000070
+#define SZ_256M 0x00000090
/* Storage attributes */
-#define SA_W 0x00000800 /* Write-through */
-#define SA_I 0x00000400 /* Caching inhibited */
-#define SA_M 0x00000200 /* Memory coherence */
-#define SA_G 0x00000100 /* Guarded */
-#define SA_E 0x00000080 /* Endian */
+#define SA_W 0x00000800 /* Write-through */
+#define SA_I 0x00000400 /* Caching inhibited */
+#define SA_M 0x00000200 /* Memory coherence */
+#define SA_G 0x00000100 /* Guarded */
+#define SA_E 0x00000080 /* Endian */
/* Access control */
-#define AC_X 0x00000024 /* Execute */
-#define AC_W 0x00000012 /* Write */
-#define AC_R 0x00000009 /* Read */
+#define AC_X 0x00000024 /* Execute */
+#define AC_W 0x00000012 /* Write */
+#define AC_R 0x00000009 /* Read */
/* Some handy macros */
-
#define EPN(e) ((e) & 0xfffffc00)
-#define TLB0(epn,sz) ( (EPN((epn)) | (sz) | TLB_VALID ) )
-#define TLB1(rpn,erpn) ( ((rpn)&0xfffffc00) | (erpn) )
-#define TLB2(a) ( (a)&0x00000fbf )
+#define TLB0(epn,sz) ((EPN((epn)) | (sz) | TLB_VALID ))
+#define TLB1(rpn,erpn) (((rpn)&0xfffffc00) | (erpn))
+#define TLB2(a) ((a)&0x00000fbf)
-#define tlbtab_start\
- mflr r1 ;\
- bl 0f ;
+#define tlbtab_start \
+ mflr r1; \
+ bl 0f;
-#define tlbtab_end\
- .long 0, 0, 0 ; \
-0: mflr r0 ; \
- mtlr r1 ; \
- blr ;
+#define tlbtab_end \
+ .long 0, 0, 0; \
+0: mflr r0; \
+ mtlr r1; \
+ blr;
#define tlbentry(epn,sz,rpn,erpn,attr)\
.long TLB0(epn,sz),TLB1(rpn,erpn),TLB2(attr)
-/**************************************************************************
+/*
* TLB TABLE
*
* This table is used by the cpu boot code to setup the initial tlb
* entries. Rather than make broad assumptions in the cpu source tree,
* this table lets each board set things up however they like.
*
- * Pointer to the table is returned in r1
- *
- *************************************************************************/
+ * Pointer to the table is returned in r1
+ */
.section .bootpg,"ax"
.globl tlbtab
diff --git a/board/xpedite1k/u-boot.lds b/board/xpedite1k/u-boot.lds
index c8f9646..fc001b2 100644
--- a/board/xpedite1k/u-boot.lds
+++ b/board/xpedite1k/u-boot.lds
@@ -78,9 +78,6 @@ SECTIONS
lib_ppc/extable.o (.text)
lib_generic/zlib.o (.text)
-/* . = env_offset;*/
-/* common/env_embedded.o(.text)*/
-
*(.text)
*(.fixup)
*(.got1)
diff --git a/board/xpedite1k/xpedite1k.c b/board/xpedite1k/xpedite1k.c
index 36a133f..dbe0bb6 100644
--- a/board/xpedite1k/xpedite1k.c
+++ b/board/xpedite1k/xpedite1k.c
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2003 Travis B. Sawyer <travis.sawyer@sandburst.com>
+ * Copyright (C) 2003 Travis B. Sawyer <travis.sawyer@sandburst.com>
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -11,7 +11,7 @@
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
@@ -20,7 +20,6 @@
* MA 02111-1307 USA
*/
-
#include <common.h>
#include <asm/processor.h>
#include <spd_sdram.h>
@@ -32,7 +31,8 @@ DECLARE_GLOBAL_DATA_PTR;
int board_early_init_f(void)
{
unsigned long sdrreg;
- /* TBS: Setup the GPIO access for the user LEDs */
+
+ /* TBS: Setup the GPIO access for the user LEDs */
mfsdr(sdr_pfc0, sdrreg);
mtsdr(sdr_pfc0, (sdrreg & ~0x00000100) | 0x00000E00);
out32(CONFIG_SYS_GPIO_BASE + 0x018, (USR_LED0 | USR_LED1 | USR_LED2 | USR_LED3));
@@ -41,18 +41,15 @@ int board_early_init_f(void)
LED2_OFF();
LED3_OFF();
- /*--------------------------------------------------------------------
- * Setup the external bus controller/chip selects
- *-------------------------------------------------------------------*/
- mtebc (pb0ap, 0x04055200); /* 16MB Strata FLASH */
- mtebc (pb0cr, 0xff098000); /* BAS=0xff0 16MB R/W 8-bit */
- mtebc (pb1ap, 0x04055200); /* 512KB Socketed AMD FLASH */
- mtebc (pb1cr, 0xfe018000); /* BAS=0xfe0 1MB R/W 8-bit */
+ /* Setup the external bus controller/chip selects */
+ mtebc(pb0ap, 0x04055200); /* 16MB Strata FLASH */
+ mtebc(pb0cr, 0xff098000); /* BAS=0xff0 16MB R/W 8-bit */
+ mtebc(pb1ap, 0x04055200); /* 512KB Socketed AMD FLASH */
+ mtebc(pb1cr, 0xfe018000); /* BAS=0xfe0 1MB R/W 8-bit */
- /*--------------------------------------------------------------------
- * Setup the interrupt controller polarities, triggers, etc.
- *-------------------------------------------------------------------*/
/*
+ * Setup the interrupt controller polarities, triggers, etc.
+ *
* Because of the interrupt handling rework to handle 440GX interrupts
* with the common code, we needed to change names of the UIC registers.
* Here the new relationship:
@@ -64,78 +61,73 @@ int board_early_init_f(void)
* UIC2 UIC1
* UIC3 UIC2
*/
- mtdcr (uic1sr, 0xffffffff); /* clear all */
- mtdcr (uic1er, 0x00000000); /* disable all */
- mtdcr (uic1cr, 0x00000003); /* SMI & UIC1 crit are critical */
- mtdcr (uic1pr, 0xfffffe00); /* per ref-board manual */
- mtdcr (uic1tr, 0x01c00000); /* per ref-board manual */
- mtdcr (uic1vr, 0x00000001); /* int31 highest, base=0x000 */
- mtdcr (uic1sr, 0xffffffff); /* clear all */
-
- mtdcr (uic2sr, 0xffffffff); /* clear all */
- mtdcr (uic2er, 0x00000000); /* disable all */
- mtdcr (uic2cr, 0x00000000); /* all non-critical */
- mtdcr (uic2pr, 0xffffc0ff); /* per ref-board manual */
- mtdcr (uic2tr, 0x00ff8000); /* per ref-board manual */
- mtdcr (uic2vr, 0x00000001); /* int31 highest, base=0x000 */
- mtdcr (uic2sr, 0xffffffff); /* clear all */
-
- mtdcr (uic3sr, 0xffffffff); /* clear all */
- mtdcr (uic3er, 0x00000000); /* disable all */
- mtdcr (uic3cr, 0x00000000); /* all non-critical */
- mtdcr (uic3pr, 0xffffffff); /* per ref-board manual */
- mtdcr (uic3tr, 0x00ff8c0f); /* per ref-board manual */
- mtdcr (uic3vr, 0x00000001); /* int31 highest, base=0x000 */
- mtdcr (uic3sr, 0xffffffff); /* clear all */
-
- mtdcr (uic0sr, 0xfc000000); /* clear all */
- mtdcr (uic0er, 0x00000000); /* disable all */
- mtdcr (uic0cr, 0x00000000); /* all non-critical */
- mtdcr (uic0pr, 0xfc000000); /* */
- mtdcr (uic0tr, 0x00000000); /* */
- mtdcr (uic0vr, 0x00000001); /* */
+ mtdcr(uic1sr, 0xffffffff); /* clear all */
+ mtdcr(uic1er, 0x00000000); /* disable all */
+ mtdcr(uic1cr, 0x00000003); /* SMI & UIC1 crit are critical */
+ mtdcr(uic1pr, 0xfffffe00); /* per ref-board manual */
+ mtdcr(uic1tr, 0x01c00000); /* per ref-board manual */
+ mtdcr(uic1vr, 0x00000001); /* int31 highest, base=0x000 */
+ mtdcr(uic1sr, 0xffffffff); /* clear all */
+
+ mtdcr(uic2sr, 0xffffffff); /* clear all */
+ mtdcr(uic2er, 0x00000000); /* disable all */
+ mtdcr(uic2cr, 0x00000000); /* all non-critical */
+ mtdcr(uic2pr, 0xffffc0ff); /* per ref-board manual */
+ mtdcr(uic2tr, 0x00ff8000); /* per ref-board manual */
+ mtdcr(uic2vr, 0x00000001); /* int31 highest, base=0x000 */
+ mtdcr(uic2sr, 0xffffffff); /* clear all */
+
+ mtdcr(uic3sr, 0xffffffff); /* clear all */
+ mtdcr(uic3er, 0x00000000); /* disable all */
+ mtdcr(uic3cr, 0x00000000); /* all non-critical */
+ mtdcr(uic3pr, 0xffffffff); /* per ref-board manual */
+ mtdcr(uic3tr, 0x00ff8c0f); /* per ref-board manual */
+ mtdcr(uic3vr, 0x00000001); /* int31 highest, base=0x000 */
+ mtdcr(uic3sr, 0xffffffff); /* clear all */
+
+ mtdcr(uic0sr, 0xfc000000); /* clear all */
+ mtdcr(uic0er, 0x00000000); /* disable all */
+ mtdcr(uic0cr, 0x00000000); /* all non-critical */
+ mtdcr(uic0pr, 0xfc000000); /* */
+ mtdcr(uic0tr, 0x00000000); /* */
+ mtdcr(uic0vr, 0x00000001); /* */
LED0_ON();
-
return 0;
}
-int checkboard (void)
+int checkboard(void)
{
- printf ("Board: XES XPedite1000 440GX\n");
+ printf("Board: XES XPedite1000 440GX\n");
- return (0);
+ return 0;
}
-
-phys_size_t initdram (int board_type)
+phys_size_t initdram(int board_type)
{
return spd_sdram();
}
-
-/*************************************************************************
- * pci_pre_init
- *
- * This routine is called just prior to registering the hose and gives
- * the board the opportunity to check things. Returning a value of zero
- * indicates that things are bad & PCI initialization should be aborted.
- *
- * Different boards may wish to customize the pci controller structure
- * (add regions, override default access routines, etc) or perform
- * certain pre-initialization actions.
+/*
+ * This routine is called just prior to registering the hose and gives
+ * the board the opportunity to check things. Returning a value of zero
+ * indicates that things are bad & PCI initialization should be aborted.
*
- ************************************************************************/
+ * Different boards may wish to customize the pci controller structure
+ * (add regions, override default access routines, etc) or perform
+ * certain pre-initialization actions.
+ */
+
#if defined(CONFIG_PCI)
-int pci_pre_init(struct pci_controller * hose )
+int pci_pre_init(struct pci_controller * hose)
{
unsigned long strap;
+
/* See if we're supposed to setup the pci */
mfsdr(sdr_sdstp1, strap);
- if ((strap & 0x00010000) == 0) {
- return (0);
- }
+ if ((strap & 0x00010000) == 0)
+ return 0;
#if defined(CONFIG_SYS_PCI_FORCE_PCI_CONV)
/* Setup System Device Register PCIX0_XCR */
@@ -143,66 +135,55 @@ int pci_pre_init(struct pci_controller * hose )
strap &= 0x0f000000;
mtsdr(sdr_xcr, strap);
#endif
+
return 1;
}
#endif /* defined(CONFIG_PCI) */
-/*************************************************************************
- * pci_target_init
- *
- * The bootstrap configuration provides default settings for the pci
- * inbound map (PIM). But the bootstrap config choices are limited and
- * may not be sufficient for a given board.
- *
- ************************************************************************/
#if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT)
-void pci_target_init(struct pci_controller * hose )
+/*
+ * The bootstrap configuration provides default settings for the pci
+ * inbound map (PIM). But the bootstrap config choices are limited and
+ * may not be sufficient for a given board.
+ */
+void pci_target_init(struct pci_controller * hose)
{
- /*--------------------------------------------------------------------------+
- * Disable everything
- *--------------------------------------------------------------------------*/
- out32r( PCIX0_PIM0SA, 0 ); /* disable */
- out32r( PCIX0_PIM1SA, 0 ); /* disable */
- out32r( PCIX0_PIM2SA, 0 ); /* disable */
- out32r( PCIX0_EROMBA, 0 ); /* disable expansion rom */
-
- /*--------------------------------------------------------------------------+
+ /* Disable everything */
+ out32r(PCIX0_PIM0SA, 0);
+ out32r(PCIX0_PIM1SA, 0);
+ out32r(PCIX0_PIM2SA, 0);
+ out32r(PCIX0_EROMBA, 0); /* disable expansion rom */
+
+ /*
* Map all of SDRAM to PCI address 0x0000_0000. Note that the 440 strapping
* options to not support sizes such as 128/256 MB.
- *--------------------------------------------------------------------------*/
- out32r( PCIX0_PIM0LAL, CONFIG_SYS_SDRAM_BASE );
- out32r( PCIX0_PIM0LAH, 0 );
- out32r( PCIX0_PIM0SA, ~(gd->ram_size - 1) | 1 );
+ */
+ out32r(PCIX0_PIM0LAL, CONFIG_SYS_SDRAM_BASE);
+ out32r(PCIX0_PIM0LAH, 0);
+ out32r(PCIX0_PIM0SA, ~(gd->ram_size - 1) | 1);
- out32r( PCIX0_BAR0, 0 );
+ out32r(PCIX0_BAR0, 0);
- /*--------------------------------------------------------------------------+
- * Program the board's subsystem id/vendor id
- *--------------------------------------------------------------------------*/
- out16r( PCIX0_SBSYSVID, CONFIG_SYS_PCI_SUBSYS_VENDORID );
- out16r( PCIX0_SBSYSID, CONFIG_SYS_PCI_SUBSYS_DEVICEID );
+ /* Program the board's subsystem id/vendor id */
+ out16r(PCIX0_SBSYSVID, CONFIG_SYS_PCI_SUBSYS_VENDORID);
+ out16r(PCIX0_SBSYSID, CONFIG_SYS_PCI_SUBSYS_DEVICEID);
- out16r( PCIX0_CMD, in16r(PCIX0_CMD) | PCI_COMMAND_MEMORY );
+ out16r(PCIX0_CMD, in16r(PCIX0_CMD) | PCI_COMMAND_MEMORY);
}
#endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT) */
-
-/*************************************************************************
- * is_pci_host
- *
- * This routine is called to determine if a pci scan should be
- * performed. With various hardware environments (especially cPCI and
- * PPMC) it's insufficient to depend on the state of the arbiter enable
- * bit in the strap register, or generic host/adapter assumptions.
- *
- * Rather than hard-code a bad assumption in the general 440 code, the
- * 440 pci code requires the board to decide at runtime.
- *
- * Return 0 for adapter mode, non-zero for host (monarch) mode.
+#if defined(CONFIG_PCI)
+/*
+ * This routine is called to determine if a pci scan should be
+ * performed. With various hardware environments (especially cPCI and
+ * PPMC) it's insufficient to depend on the state of the arbiter enable
+ * bit in the strap register, or generic host/adapter assumptions.
*
+ * Rather than hard-code a bad assumption in the general 440 code, the
+ * 440 pci code requires the board to decide at runtime.
*
- ************************************************************************/
-#if defined(CONFIG_PCI)
+ * Return 0 for adapter mode, non-zero for host (monarch) mode.
+ */
int is_pci_host(struct pci_controller *hose)
{
return ((in32(CONFIG_SYS_GPIO_BASE + 0x1C) & 0x00000800) == 0);
@@ -216,11 +197,10 @@ int is_pci_host(struct pci_controller *hose)
*/
int post_hotkeys_pressed(void)
{
-
- return (ctrlc());
+ return ctrlc();
}
-void post_word_store (ulong a)
+void post_word_store(ulong a)
{
volatile ulong *save_addr =
(volatile ulong *)(CONFIG_SYS_POST_WORD_ADDR);
@@ -228,11 +208,11 @@ void post_word_store (ulong a)
*save_addr = a;
}
-ulong post_word_load (void)
+ulong post_word_load(void)
{
volatile ulong *save_addr =
(volatile ulong *)(CONFIG_SYS_POST_WORD_ADDR);
return *save_addr;
}
-#endif
\ No newline at end of file
+#endif
diff --git a/include/configs/XPEDITE1K.h b/include/configs/XPEDITE1K.h
index 93c4b0a..f141398 100644
--- a/include/configs/XPEDITE1K.h
+++ b/include/configs/XPEDITE1K.h
@@ -20,51 +20,48 @@
* MA 02111-1307 USA
*/
-/************************************************************************
+/*
* config for XPedite1000 from XES Inc.
* Ported from EBONY config by Travis B. Sawyer <tsawyer@sandburst.com>
* (C) Copyright 2003 Sandburst Corporation
* board/config_EBONY.h - configuration for AMCC 440GP Ref (Ebony)
- ***********************************************************************/
+ */
#ifndef __CONFIG_H
#define __CONFIG_H
-/*-----------------------------------------------------------------------
- * High Level Configuration Options
- *----------------------------------------------------------------------*/
+/* High Level Configuration Options */
#define CONFIG_XPEDITE1K 1 /* Board is XPedite 1000 */
-#define CONFIG_4xx 1 /* ... PPC4xx family */
+#define CONFIG_4xx 1 /* ... PPC4xx family */
#define CONFIG_440 1
#define CONFIG_440GX 1 /* 440 GX */
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
-
/* POST support */
-#define CONFIG_POST (CONFIG_SYS_POST_RTC | \
+#define CONFIG_POST (CONFIG_SYS_POST_RTC | \
CONFIG_SYS_POST_I2C)
-/*-----------------------------------------------------------------------
+/*
* Base addresses -- Note these are effective addresses where the
* actual resources get mapped (not physical addresses)
- *----------------------------------------------------------------------*/
-#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* _must_ be 0 */
-#define CONFIG_SYS_FLASH_BASE 0xff000000 /* start of FLASH */
+ */
+#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* _must_ be 0 */
+#define CONFIG_SYS_FLASH_BASE 0xff000000 /* start of FLASH */
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
-#define CONFIG_SYS_PCI_MEMBASE 0x80000000 /* mapped pci memory */
-#define CONFIG_SYS_PERIPHERAL_BASE 0xe0000000 /* internal peripherals */
-#define CONFIG_SYS_ISRAM_BASE 0xc0000000 /* internal SRAM */
-#define CONFIG_SYS_PCI_BASE 0xd0000000 /* internal PCI regs */
+#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CONFIG_SYS_PCI_MEMBASE 0x80000000 /* mapped pci memory */
+#define CONFIG_SYS_PERIPHERAL_BASE 0xe0000000 /* internal peripherals */
+#define CONFIG_SYS_ISRAM_BASE 0xc0000000 /* internal SRAM */
+#define CONFIG_SYS_PCI_BASE 0xd0000000 /* internal PCI regs */
-#define CONFIG_SYS_NVRAM_BASE_ADDR (CONFIG_SYS_PERIPHERAL_BASE + 0x08000000)
-#define CONFIG_SYS_GPIO_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x00000700)
+#define CONFIG_SYS_NVRAM_BASE_ADDR (CONFIG_SYS_PERIPHERAL_BASE + 0x08000000)
+#define CONFIG_SYS_GPIO_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x00000700)
-#define USR_LED0 0x00000080
-#define USR_LED1 0x00000100
-#define USR_LED2 0x00000200
-#define USR_LED3 0x00000400
+#define USR_LED0 0x00000080
+#define USR_LED1 0x00000100
+#define USR_LED2 0x00000200
+#define USR_LED3 0x00000400
#ifndef __ASSEMBLY__
extern unsigned long in32(unsigned int);
@@ -81,50 +78,34 @@ extern void out32(unsigned int, unsigned long);
#define LED3_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED3))
#endif
-/*-----------------------------------------------------------------------
- * Initial RAM & stack pointer (placed in internal SRAM)
- *----------------------------------------------------------------------*/
-#define CONFIG_SYS_TEMP_STACK_OCM 1
-#define CONFIG_SYS_OCM_DATA_ADDR CONFIG_SYS_ISRAM_BASE
-#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_ISRAM_BASE /* Initial RAM address */
-#define CONFIG_SYS_INIT_RAM_END 0x2000 /* End of used area in RAM */
-#define CONFIG_SYS_GBL_DATA_SIZE 128 /* num bytes initial data */
-
+/* Initial RAM & stack pointer (placed in internal SRAM) */
+#define CONFIG_SYS_TEMP_STACK_OCM 1
+#define CONFIG_SYS_OCM_DATA_ADDR CONFIG_SYS_ISRAM_BASE
+#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_ISRAM_BASE /* Initial RAM address */
+#define CONFIG_SYS_INIT_RAM_END 0x2000 /* End of used area in RAM */
+#define CONFIG_SYS_GBL_DATA_SIZE 128 /* num bytes initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
-#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
-#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_POST_WORD_ADDR
+#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
+#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_POST_WORD_ADDR
-#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */
-#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc*/
+#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */
+#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc */
-/*-----------------------------------------------------------------------
- * Serial Port
- *----------------------------------------------------------------------*/
+/* Serial Port */
#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CONFIG_BAUDRATE 9600
+#define CONFIG_SYS_BAUDRATE_TABLE \
+ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400}
-#define CONFIG_SYS_BAUDRATE_TABLE \
- {300, 600, 1200, 2400, 4800, 9600, 19200, 38400}
+/* RTC: STMicro M41T00 */
+#define CONFIG_RTC_M41T11 1
+#define CONFIG_SYS_I2C_RTC_ADDR 0x68
+#define CONFIG_SYS_M41T11_BASE_YEAR 2000
-/*-----------------------------------------------------------------------
- * NVRAM/RTC
- *
- * NOTE: Upper 8 bytes of NVRAM is where the RTC registers are located.
- * The DS1743 code assumes this condition (i.e. -- it assumes the base
- * address for the RTC registers is:
- *
- * CONFIG_SYS_NVRAM_BASE_ADDR + CONFIG_SYS_NVRAM_SIZE
- *
- *----------------------------------------------------------------------*/
-/* TBS: Xpedite 1000 has STMicro M41T00 via IIC */
-#define CONFIG_RTC_M41T11 1
-#define CONFIG_SYS_I2C_RTC_ADDR 0x68
-#define CONFIG_SYS_M41T11_BASE_YEAR 2000
-
-/*-----------------------------------------------------------------------
+/*
* FLASH related
- *----------------------------------------------------------------------*/
+ */
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */
#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE}
#define CONFIG_SYS_MAX_FLASH_SECT 128 /* sectors per device */
@@ -133,70 +114,60 @@ extern void out32(unsigned int, unsigned long);
#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
#undef CONFIG_SYS_FLASH_CHECKSUM
-#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
-#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
-
-/*-----------------------------------------------------------------------
- * DDR SDRAM
- *----------------------------------------------------------------------*/
-#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for setup */
-#define SPD_EEPROM_ADDRESS {0x54} /* SPD i2c spd addresses */
-#define CONFIG_VERY_BIG_RAM 1
-/*-----------------------------------------------------------------------
- * I2C
- *----------------------------------------------------------------------*/
-#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
-#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
+#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
+#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
+
+/* DDR SDRAM */
+#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for setup */
+#define SPD_EEPROM_ADDRESS {0x54} /* SPD i2c spd addresses */
+#define CONFIG_VERY_BIG_RAM 1
+
+/* I2C */
+#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
+#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_SLAVE 0x7f
-#define CONFIG_SYS_I2C_NOPROBES {0x55,0x56,0x57,0x58,0x59,0x5a,0x5b,0x5c,0x69} /* Don't probe these addrs */
+#define CONFIG_SYS_I2C_NOPROBES {0x55,0x56,0x57,0x58,0x59,0x5a,0x5b,0x5c,0x69}
-/*-----------------------------------------------------------------------
- * Environment
- *----------------------------------------------------------------------*/
-#define CONFIG_ENV_IS_IN_EEPROM 1
-#define CONFIG_ENV_SIZE 0x100 /* Size of Environment vars */
+/* Environment */
+#define CONFIG_ENV_IS_IN_EEPROM 1
+#define CONFIG_ENV_SIZE 0x100 /* Size of Environment vars */
#define CONFIG_ENV_OFFSET 0x100
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* this is actually the second page of the eeprom */
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
+#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
#define CONFIG_BOOTARGS "root=/dev/hda1 "
-#define CONFIG_BOOTCOMMAND "bootm ffc00000" /* autoboot command */
-#define CONFIG_BOOTDELAY 5 /* disable autoboot */
+#define CONFIG_BOOTCOMMAND "bootm ffc00000" /* autoboot command */
+#define CONFIG_BOOTDELAY 5 /* disable autoboot */
#define CONFIG_BAUDRATE 9600
-#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
-#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
+#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
+#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
#define CONFIG_PPC4xx_EMAC
-#define CONFIG_MII 1 /* MII PHY management */
+#define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_PHY_ADDR 0 /* PHY address phy0 not populated */
#define CONFIG_PHY1_ADDR 1 /* PHY address phy1 not populated */
#define CONFIG_PHY2_ADDR 4 /* PHY address phy2 */
#define CONFIG_PHY3_ADDR 8 /* PHY address phy3 */
#define CONFIG_NET_MULTI 1
#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */
-#define CONFIG_PHY_RESET 1 /* reset phy upon startup */
-#define CONFIG_SYS_RX_ETH_BUFFER 32 /* Number of ethernet rx buffers & descriptors */
-
-#define CONFIG_HAS_ETH1 1 /* add support for "eth1addr" */
-#define CONFIG_HAS_ETH2 1 /* add support for "eth2addr" */
-#define CONFIG_HAS_ETH3 1 /* add support for "eth3addr" */
+#define CONFIG_PHY_RESET 1 /* reset phy upon startup */
+#define CONFIG_SYS_RX_ETH_BUFFER 32 /* Number of ethernet rx buffers & descriptors */
+#define CONFIG_HAS_ETH1 1 /* add support for "eth1addr" */
+#define CONFIG_HAS_ETH2 1 /* add support for "eth2addr" */
+#define CONFIG_HAS_ETH3 1 /* add support for "eth3addr" */
-/*
- * BOOTP options
- */
+/* BOOTP options */
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
-
/*
- * Command line configuration.
+ * Command line configuration
*/
#include <config_cmd_default.h>
@@ -212,48 +183,45 @@ extern void out32(unsigned int, unsigned long);
#define CONFIG_CMD_DIAG
#define CONFIG_CMD_FAT
-
-#undef CONFIG_WATCHDOG /* watchdog disabled */
+#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
+#define CONFIG_SYS_LONGHELP /* undef to save memory */
+#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
+#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
-#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
+#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
#endif
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
+#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
+#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
+#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
-/*-----------------------------------------------------------------------
- * PCI stuff
- *-----------------------------------------------------------------------
+/*
+ * PCI
*/
/* General PCI */
-#define CONFIG_PCI /* include pci support */
-#define CONFIG_PCI_PNP /* do pci plug-and-play */
-#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
-#define CONFIG_SYS_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CONFIG_SYS_PCI_MEMBASE */
+#define CONFIG_PCI /* include pci support */
+#define CONFIG_PCI_PNP /* do pci plug-and-play */
+#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
+#define CONFIG_SYS_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CONFIG_SYS_PCI_MEMBASE */
/* Board-specific PCI */
-#define CONFIG_SYS_PCI_TARGET_INIT /* let board init pci target */
-
+#define CONFIG_SYS_PCI_TARGET_INIT /* let board init pci target */
#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x1014 /* IBM */
#define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0xcafe /* Whatever */
-#define CONFIG_SYS_PCI_FORCE_PCI_CONV /* Force PCI Conventional Mode */
+#define CONFIG_SYS_PCI_FORCE_PCI_CONV /* Force PCI Conventional Mode */
+
/*
* For booting Linux, the board info and command line data
* have to be in the first 8 MB of memory, since this is
@@ -263,11 +231,9 @@ extern void out32(unsigned int, unsigned long);
/*
* Internal Definitions
- *
- * Boot Flags
*/
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
+#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
+#define BOOTFLAG_WARM 0x02 /* Software reboot */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
--
1.6.2.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [U-Boot] [PATCH 06/14] xpedite1k: Add support for optional flashes
2009-07-18 0:01 [U-Boot] [PATCH 00/14] XPedite1K updates Peter Tyser
` (4 preceding siblings ...)
2009-07-18 0:01 ` [U-Boot] [PATCH 05/14] xpedite1k: Cleanup coding style Peter Tyser
@ 2009-07-18 0:01 ` Peter Tyser
2009-07-18 0:01 ` [U-Boot] [PATCH 07/14] xpedite1k: Add support for additional GPIO pins Peter Tyser
` (8 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Peter Tyser @ 2009-07-18 0:01 UTC (permalink / raw)
To: u-boot
The XPedite1000 can be built with 4 total flashes:
- 512KB AMD socketed
- 16MB Intel soldered
- 2 x 32MB AMD MirrorBit flashes
Add support for the optional 2 32MB CFI-compliant AMD flashes
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
---
board/xpedite1k/xpedite1k.c | 4 ++++
include/configs/XPEDITE1K.h | 7 ++++---
2 files changed, 8 insertions(+), 3 deletions(-)
diff --git a/board/xpedite1k/xpedite1k.c b/board/xpedite1k/xpedite1k.c
index dbe0bb6..55b1f31 100644
--- a/board/xpedite1k/xpedite1k.c
+++ b/board/xpedite1k/xpedite1k.c
@@ -46,6 +46,10 @@ int board_early_init_f(void)
mtebc(pb0cr, 0xff098000); /* BAS=0xff0 16MB R/W 8-bit */
mtebc(pb1ap, 0x04055200); /* 512KB Socketed AMD FLASH */
mtebc(pb1cr, 0xfe018000); /* BAS=0xfe0 1MB R/W 8-bit */
+ mtebc(pb6ap, 0x05006400); /* 32-64MB AMD MirrorBit FLASH */
+ mtebc(pb6cr, 0xf00da000); /* BAS=0xf00 64MB R/W i6-bit */
+ mtebc(pb7ap, 0x05006400); /* 32-64MB AMD MirrorBit FLASH */
+ mtebc(pb7cr, 0xf40da000); /* BAS=0xf40 64MB R/W 16-bit */
/*
* Setup the interrupt controller polarities, triggers, etc.
diff --git a/include/configs/XPEDITE1K.h b/include/configs/XPEDITE1K.h
index f141398..0aebe27 100644
--- a/include/configs/XPEDITE1K.h
+++ b/include/configs/XPEDITE1K.h
@@ -106,12 +106,13 @@ extern void out32(unsigned int, unsigned long);
/*
* FLASH related
*/
-#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */
-#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE}
-#define CONFIG_SYS_MAX_FLASH_SECT 128 /* sectors per device */
+#define CONFIG_SYS_MAX_FLASH_BANKS 3
+#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE, 0xf0000000, 0xf4000000 }
+#define CONFIG_SYS_MAX_FLASH_SECT 512 /* sectors per device */
#define CONFIG_FLASH_CFI_DRIVER
#define CONFIG_SYS_FLASH_CFI
#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
+#define CONFIG_SYS_FLASH_QUIET_TEST /* MirrorBit flashes are optional */
#undef CONFIG_SYS_FLASH_CHECKSUM
#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
--
1.6.2.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [U-Boot] [PATCH 07/14] xpedite1k: Add support for additional GPIO pins
2009-07-18 0:01 [U-Boot] [PATCH 00/14] XPedite1K updates Peter Tyser
` (5 preceding siblings ...)
2009-07-18 0:01 ` [U-Boot] [PATCH 06/14] xpedite1k: Add support for optional flashes Peter Tyser
@ 2009-07-18 0:01 ` Peter Tyser
2009-07-18 0:01 ` [U-Boot] [PATCH 08/14] xpedite1k: Store environment in flash Peter Tyser
` (7 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Peter Tyser @ 2009-07-18 0:01 UTC (permalink / raw)
To: u-boot
Enable GPIO pins for an I2C EEPROM write protect, a system reset pin,
and a PMC #MONARCH pin. These pins are not currently used in U-Boot,
but are used in OSes and may be used in U-Boot in the future.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
---
board/xpedite1k/xpedite1k.c | 13 +++++++++++--
1 files changed, 11 insertions(+), 2 deletions(-)
diff --git a/board/xpedite1k/xpedite1k.c b/board/xpedite1k/xpedite1k.c
index 55b1f31..33d4ac8 100644
--- a/board/xpedite1k/xpedite1k.c
+++ b/board/xpedite1k/xpedite1k.c
@@ -32,9 +32,18 @@ int board_early_init_f(void)
{
unsigned long sdrreg;
- /* TBS: Setup the GPIO access for the user LEDs */
+ /*
+ * Enable GPIO for pins 18 - 24
+ * 18 = SEEPROM_WP
+ * 19 = #M_RST
+ * 20 = #MONARCH
+ * 21 = #LED_ALARM
+ * 22 = #LED_ACT
+ * 23 = #LED_STATUS1
+ * 24 = #LED_STATUS2
+ */
mfsdr(sdr_pfc0, sdrreg);
- mtsdr(sdr_pfc0, (sdrreg & ~0x00000100) | 0x00000E00);
+ mtsdr(sdr_pfc0, (sdrreg & ~SDR0_PFC0_TRE_ENABLE) | 0x00003e00);
out32(CONFIG_SYS_GPIO_BASE + 0x018, (USR_LED0 | USR_LED1 | USR_LED2 | USR_LED3));
LED0_OFF();
LED1_OFF();
--
1.6.2.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [U-Boot] [PATCH 08/14] xpedite1k: Store environment in flash
2009-07-18 0:01 [U-Boot] [PATCH 00/14] XPedite1K updates Peter Tyser
` (6 preceding siblings ...)
2009-07-18 0:01 ` [U-Boot] [PATCH 07/14] xpedite1k: Add support for additional GPIO pins Peter Tyser
@ 2009-07-18 0:01 ` Peter Tyser
2009-07-18 0:01 ` [U-Boot] [PATCH 09/14] xpedite1k: Disable unused ethernet port 1 Peter Tyser
` (6 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Peter Tyser @ 2009-07-18 0:01 UTC (permalink / raw)
To: u-boot
Previously an I2C EEPROM was used. The EEPROM had size, reliability,
and access issues which are resolved by storing the environment in
flash.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
---
include/configs/XPEDITE1K.h | 13 +++++++++----
1 files changed, 9 insertions(+), 4 deletions(-)
diff --git a/include/configs/XPEDITE1K.h b/include/configs/XPEDITE1K.h
index 0aebe27..df02d7b 100644
--- a/include/configs/XPEDITE1K.h
+++ b/include/configs/XPEDITE1K.h
@@ -129,10 +129,15 @@ extern void out32(unsigned int, unsigned long);
#define CONFIG_SYS_I2C_SLAVE 0x7f
#define CONFIG_SYS_I2C_NOPROBES {0x55,0x56,0x57,0x58,0x59,0x5a,0x5b,0x5c,0x69}
-/* Environment */
-#define CONFIG_ENV_IS_IN_EEPROM 1
-#define CONFIG_ENV_SIZE 0x100 /* Size of Environment vars */
-#define CONFIG_ENV_OFFSET 0x100
+/*
+ * Environment Configuration
+ */
+#define CONFIG_ENV_IS_IN_FLASH 1
+#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128k (one sector) for env */
+#define CONFIG_ENV_SIZE 0x8000
+#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - (256 * 1024))
+
+/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
--
1.6.2.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [U-Boot] [PATCH 09/14] xpedite1k: Disable unused ethernet port 1
2009-07-18 0:01 [U-Boot] [PATCH 00/14] XPedite1K updates Peter Tyser
` (7 preceding siblings ...)
2009-07-18 0:01 ` [U-Boot] [PATCH 08/14] xpedite1k: Store environment in flash Peter Tyser
@ 2009-07-18 0:01 ` Peter Tyser
2009-07-18 0:01 ` [U-Boot] [PATCH 10/14] xpedite1k: Sync up commands and environment with other X-ES boards Peter Tyser
` (5 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Peter Tyser @ 2009-07-18 0:01 UTC (permalink / raw)
To: u-boot
The XPedite1000 only has 2 available ethernet ports:
ppc_4xx_eth2 (EMAC2) and ppc_4xx_eth3 (EMAC3)
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
---
include/configs/XPEDITE1K.h | 4 +---
1 files changed, 1 insertions(+), 3 deletions(-)
diff --git a/include/configs/XPEDITE1K.h b/include/configs/XPEDITE1K.h
index df02d7b..d8eccd8 100644
--- a/include/configs/XPEDITE1K.h
+++ b/include/configs/XPEDITE1K.h
@@ -153,8 +153,7 @@ extern void out32(unsigned int, unsigned long);
#define CONFIG_PPC4xx_EMAC
#define CONFIG_MII 1 /* MII PHY management */
-#define CONFIG_PHY_ADDR 0 /* PHY address phy0 not populated */
-#define CONFIG_PHY1_ADDR 1 /* PHY address phy1 not populated */
+#define CONFIG_PHY_ADDR 4 /* PHY address phy0 not populated */
#define CONFIG_PHY2_ADDR 4 /* PHY address phy2 */
#define CONFIG_PHY3_ADDR 8 /* PHY address phy3 */
#define CONFIG_NET_MULTI 1
@@ -162,7 +161,6 @@ extern void out32(unsigned int, unsigned long);
#define CONFIG_PHY_RESET 1 /* reset phy upon startup */
#define CONFIG_SYS_RX_ETH_BUFFER 32 /* Number of ethernet rx buffers & descriptors */
-#define CONFIG_HAS_ETH1 1 /* add support for "eth1addr" */
#define CONFIG_HAS_ETH2 1 /* add support for "eth2addr" */
#define CONFIG_HAS_ETH3 1 /* add support for "eth3addr" */
--
1.6.2.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [U-Boot] [PATCH 10/14] xpedite1k: Sync up commands and environment with other X-ES boards
2009-07-18 0:01 [U-Boot] [PATCH 00/14] XPedite1K updates Peter Tyser
` (8 preceding siblings ...)
2009-07-18 0:01 ` [U-Boot] [PATCH 09/14] xpedite1k: Disable unused ethernet port 1 Peter Tyser
@ 2009-07-18 0:01 ` Peter Tyser
2009-07-18 0:01 ` [U-Boot] [PATCH 11/14] xpedite1k: Sync organization of board config " Peter Tyser
` (4 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Peter Tyser @ 2009-07-18 0:01 UTC (permalink / raw)
To: u-boot
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
---
include/configs/XPEDITE1K.h | 122 ++++++++++++++++++++++++++++++++++++++----
1 files changed, 110 insertions(+), 12 deletions(-)
diff --git a/include/configs/XPEDITE1K.h b/include/configs/XPEDITE1K.h
index d8eccd8..c67350a 100644
--- a/include/configs/XPEDITE1K.h
+++ b/include/configs/XPEDITE1K.h
@@ -143,11 +143,6 @@ extern void out32(unsigned int, unsigned long);
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
-#define CONFIG_BOOTARGS "root=/dev/hda1 "
-#define CONFIG_BOOTCOMMAND "bootm ffc00000" /* autoboot command */
-#define CONFIG_BOOTDELAY 5 /* disable autoboot */
-#define CONFIG_BAUDRATE 9600
-
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
@@ -175,17 +170,21 @@ extern void out32(unsigned int, unsigned long);
*/
#include <config_cmd_default.h>
-#define CONFIG_CMD_PCI
-#define CONFIG_CMD_IRQ
-#define CONFIG_CMD_I2C
+#define CONFIG_CMD_ASKENV
#define CONFIG_CMD_DATE
-#define CONFIG_CMD_BEDBUG
+#define CONFIG_CMD_DHCP
#define CONFIG_CMD_EEPROM
-#define CONFIG_CMD_PING
#define CONFIG_CMD_ELF
+#define CONFIG_CMD_SAVEENV
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_JFFS2
#define CONFIG_CMD_MII
-#define CONFIG_CMD_DIAG
-#define CONFIG_CMD_FAT
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_SNTP
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -243,4 +242,103 @@ extern void out32(unsigned int, unsigned long);
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
+
+/*
+ * Flash memory map:
+ * fff80000 - ffffffff U-Boot (512 KB)
+ * fff40000 - fff7ffff U-Boot Environment (256 KB)
+ * fff00000 - fff3ffff FDT (256KB)
+ * ffc00000 - ffefffff OS image (3MB)
+ * ff000000 - ffbfffff OS Use/Filesystem (12MB)
+ */
+
+#define CONFIG_UBOOT_ENV_ADDR MK_STR(TEXT_BASE)
+#define CONFIG_FDT_ENV_ADDR MK_STR(0xfff00000)
+#define CONFIG_OS_ENV_ADDR MK_STR(0xffc00000)
+
+#define CONFIG_PROG_UBOOT \
+ "$download_cmd $loadaddr $ubootfile; " \
+ "if test $? -eq 0; then " \
+ "protect off "CONFIG_UBOOT_ENV_ADDR" +80000; " \
+ "erase "CONFIG_UBOOT_ENV_ADDR" +80000; " \
+ "cp.w $loadaddr "CONFIG_UBOOT_ENV_ADDR" 40000; " \
+ "protect on "CONFIG_UBOOT_ENV_ADDR" +80000; " \
+ "cmp.b $loadaddr "CONFIG_UBOOT_ENV_ADDR" 80000; " \
+ "if test $? -ne 0; then " \
+ "echo PROGRAM FAILED; " \
+ "else; " \
+ "echo PROGRAM SUCCEEDED; " \
+ "fi; " \
+ "else; " \
+ "echo DOWNLOAD FAILED; " \
+ "fi;"
+
+#define CONFIG_BOOT_OS_NET \
+ "$download_cmd $osaddr $osfile; " \
+ "if test $? -eq 0; then " \
+ "if test -n $fdtaddr; then " \
+ "$download_cmd $fdtaddr $fdtfile; " \
+ "if test $? -eq 0; then " \
+ "bootm $osaddr - $fdtaddr; " \
+ "else; " \
+ "echo FDT DOWNLOAD FAILED; " \
+ "fi; " \
+ "else; " \
+ "bootm $osaddr; " \
+ "fi; " \
+ "else; " \
+ "echo OS DOWNLOAD FAILED; " \
+ "fi;"
+
+#define CONFIG_PROG_OS \
+ "$download_cmd $osaddr $osfile; " \
+ "if test $? -eq 0; then " \
+ "erase "CONFIG_OS_ENV_ADDR" +$filesize; " \
+ "cp.b $osaddr "CONFIG_OS_ENV_ADDR" $filesize; " \
+ "cmp.b $osaddr "CONFIG_OS_ENV_ADDR" $filesize; " \
+ "if test $? -ne 0; then " \
+ "echo OS PROGRAM FAILED; " \
+ "else; " \
+ "echo OS PROGRAM SUCCEEDED; " \
+ "fi; " \
+ "else; " \
+ "echo OS DOWNLOAD FAILED; " \
+ "fi;"
+
+#define CONFIG_PROG_FDT \
+ "$download_cmd $fdtaddr $fdtfile; " \
+ "if test $? -eq 0; then " \
+ "erase "CONFIG_FDT_ENV_ADDR" +$filesize;" \
+ "cp.b $fdtaddr "CONFIG_FDT_ENV_ADDR" $filesize; " \
+ "cmp.b $fdtaddr "CONFIG_FDT_ENV_ADDR" $filesize; " \
+ "if test $? -ne 0; then " \
+ "echo FDT PROGRAM FAILED; " \
+ "else; " \
+ "echo FDT PROGRAM SUCCEEDED; " \
+ "fi; " \
+ "else; " \
+ "echo FDT DOWNLOAD FAILED; " \
+ "fi;"
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "autoload=yes\0" \
+ "download_cmd=tftp\0" \
+ "console_args=console=ttyS0,115200\0" \
+ "root_args=root=/dev/nfs rw\0" \
+ "misc_args=ip=on\0" \
+ "set_bootargs=setenv bootargs ${console_args} ${root_args} ${misc_args}\0" \
+ "bootfile=/home/user/file\0" \
+ "osfile=/home/user/uImage-XPedite1000\0" \
+ "fdtfile=/home/user/xpedite1000.dtb\0" \
+ "ubootfile=/home/user/u-boot.bin\0" \
+ "fdtaddr=c00000\0" \
+ "osaddr=0x1000000\0" \
+ "loadaddr=0x1000000\0" \
+ "prog_uboot="CONFIG_PROG_UBOOT"\0" \
+ "prog_os="CONFIG_PROG_OS"\0" \
+ "prog_fdt="CONFIG_PROG_FDT"\0" \
+ "bootcmd_net=run set_bootargs; "CONFIG_BOOT_OS_NET"\0" \
+ "bootcmd_flash=run set_bootargs; " \
+ "bootm "CONFIG_OS_ENV_ADDR" - "CONFIG_FDT_ENV_ADDR"\0" \
+ "bootcmd=run bootcmd_flash\0"
#endif /* __CONFIG_H */
--
1.6.2.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [U-Boot] [PATCH 11/14] xpedite1k: Sync organization of board config with other X-ES boards
2009-07-18 0:01 [U-Boot] [PATCH 00/14] XPedite1K updates Peter Tyser
` (9 preceding siblings ...)
2009-07-18 0:01 ` [U-Boot] [PATCH 10/14] xpedite1k: Sync up commands and environment with other X-ES boards Peter Tyser
@ 2009-07-18 0:01 ` Peter Tyser
2009-07-18 0:01 ` [U-Boot] [PATCH 12/14] xpedite1k: Sync up board config options " Peter Tyser
` (3 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Peter Tyser @ 2009-07-18 0:01 UTC (permalink / raw)
To: u-boot
This change should have no functional effect
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
---
include/configs/XPEDITE1K.h | 159 +++++++++++++++++++++++--------------------
1 files changed, 85 insertions(+), 74 deletions(-)
diff --git a/include/configs/XPEDITE1K.h b/include/configs/XPEDITE1K.h
index c67350a..391d041 100644
--- a/include/configs/XPEDITE1K.h
+++ b/include/configs/XPEDITE1K.h
@@ -38,26 +38,40 @@
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
-/* POST support */
-#define CONFIG_POST (CONFIG_SYS_POST_RTC | \
- CONFIG_SYS_POST_I2C)
+/*
+ * DDR config
+ */
+#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for setup */
+#define SPD_EEPROM_ADDRESS {0x54} /* SPD i2c spd addresses */
+#define CONFIG_VERY_BIG_RAM 1
/*
* Base addresses -- Note these are effective addresses where the
* actual resources get mapped (not physical addresses)
*/
-#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* _must_ be 0 */
-#define CONFIG_SYS_FLASH_BASE 0xff000000 /* start of FLASH */
-
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
-#define CONFIG_SYS_PCI_MEMBASE 0x80000000 /* mapped pci memory */
-#define CONFIG_SYS_PERIPHERAL_BASE 0xe0000000 /* internal peripherals */
-#define CONFIG_SYS_ISRAM_BASE 0xc0000000 /* internal SRAM */
-#define CONFIG_SYS_PCI_BASE 0xd0000000 /* internal PCI regs */
-
+#define CONFIG_SYS_SDRAM_BASE 0x00000000
+#define CONFIG_SYS_FLASH_BASE 0xff000000 /* start of FLASH */
+#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CONFIG_SYS_PCI_MEMBASE 0x80000000 /* mapped pci memory */
+#define CONFIG_SYS_PERIPHERAL_BASE 0xe0000000 /* internal peripherals */
+#define CONFIG_SYS_ISRAM_BASE 0xc0000000 /* internal SRAM */
+#define CONFIG_SYS_PCI_BASE 0xd0000000 /* internal PCI regs */
#define CONFIG_SYS_NVRAM_BASE_ADDR (CONFIG_SYS_PERIPHERAL_BASE + 0x08000000)
#define CONFIG_SYS_GPIO_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x00000700)
+/*
+ * Diagnostics
+ */
+#define CONFIG_SYS_MEMTEST_START 0x0400000
+#define CONFIG_SYS_MEMTEST_END 0x0C00000
+
+/* POST support */
+#define CONFIG_POST (CONFIG_SYS_POST_RTC | \
+ CONFIG_SYS_POST_I2C)
+
+/*
+ * LED support
+ */
#define USR_LED0 0x00000080
#define USR_LED1 0x00000100
#define USR_LED2 0x00000200
@@ -78,13 +92,14 @@ extern void out32(unsigned int, unsigned long);
#define LED3_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED3))
#endif
-/* Initial RAM & stack pointer (placed in internal SRAM) */
+/*
+ * Use internal SRAM for initial stack
+ */
#define CONFIG_SYS_TEMP_STACK_OCM 1
#define CONFIG_SYS_OCM_DATA_ADDR CONFIG_SYS_ISRAM_BASE
#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_ISRAM_BASE /* Initial RAM address */
#define CONFIG_SYS_INIT_RAM_END 0x2000 /* End of used area in RAM */
#define CONFIG_SYS_GBL_DATA_SIZE 128 /* num bytes initial data */
-
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_POST_WORD_ADDR
@@ -92,19 +107,17 @@ extern void out32(unsigned int, unsigned long);
#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */
#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc */
-/* Serial Port */
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
-#define CONFIG_BAUDRATE 9600
+/*
+ * Serial Port
+ */
#define CONFIG_SYS_BAUDRATE_TABLE \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400}
-
-/* RTC: STMicro M41T00 */
-#define CONFIG_RTC_M41T11 1
-#define CONFIG_SYS_I2C_RTC_ADDR 0x68
-#define CONFIG_SYS_M41T11_BASE_YEAR 2000
+#define CONFIG_BAUDRATE 9600
+#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
+#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
/*
- * FLASH related
+ * NOR flash configuration
*/
#define CONFIG_SYS_MAX_FLASH_BANKS 3
#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE, 0xf0000000, 0xf4000000 }
@@ -118,45 +131,54 @@ extern void out32(unsigned int, unsigned long);
#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
-/* DDR SDRAM */
-#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for setup */
-#define SPD_EEPROM_ADDRESS {0x54} /* SPD i2c spd addresses */
-#define CONFIG_VERY_BIG_RAM 1
-
-/* I2C */
+/*
+ * I2C
+ */
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_SLAVE 0x7f
#define CONFIG_SYS_I2C_NOPROBES {0x55,0x56,0x57,0x58,0x59,0x5a,0x5b,0x5c,0x69}
-/*
- * Environment Configuration
- */
-#define CONFIG_ENV_IS_IN_FLASH 1
-#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128k (one sector) for env */
-#define CONFIG_ENV_SIZE 0x8000
-#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - (256 * 1024))
-
-/* EEPROM */
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
+/* I2C EEPROM */
+#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
-#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
-#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
+/* I2C RTC: STMicro M41T00 */
+#define CONFIG_RTC_M41T11 1
+#define CONFIG_SYS_I2C_RTC_ADDR 0x68
+#define CONFIG_SYS_M41T11_BASE_YEAR 2000
+
+/*
+ * PCI
+ */
+/* General PCI */
+#define CONFIG_PCI /* include pci support */
+#define CONFIG_PCI_PNP /* do pci plug-and-play */
+#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
+#define CONFIG_SYS_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CONFIG_SYS_PCI_MEMBASE */
+
+/* Board-specific PCI */
+#define CONFIG_SYS_PCI_TARGET_INIT /* let board init pci target */
+#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x1014 /* IBM */
+#define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0xcafe /* Whatever */
+#define CONFIG_SYS_PCI_FORCE_PCI_CONV /* Force PCI Conventional Mode */
+/*
+ * Networking options
+ */
#define CONFIG_PPC4xx_EMAC
-#define CONFIG_MII 1 /* MII PHY management */
-#define CONFIG_PHY_ADDR 4 /* PHY address phy0 not populated */
-#define CONFIG_PHY2_ADDR 4 /* PHY address phy2 */
-#define CONFIG_PHY3_ADDR 8 /* PHY address phy3 */
-#define CONFIG_NET_MULTI 1
#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */
+#define CONFIG_NET_MULTI 1
+#define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_PHY_RESET 1 /* reset phy upon startup */
#define CONFIG_SYS_RX_ETH_BUFFER 32 /* Number of ethernet rx buffers & descriptors */
-
+#define CONFIG_ETHPRIME "ppc_4xx_eth2"
+#define CONFIG_PHY_ADDR 4 /* PHY address phy0 not populated */
+#define CONFIG_PHY2_ADDR 4 /* PHY address phy2 */
#define CONFIG_HAS_ETH2 1 /* add support for "eth2addr" */
+#define CONFIG_PHY3_ADDR 8 /* PHY address phy3 */
#define CONFIG_HAS_ETH3 1 /* add support for "eth3addr" */
/* BOOTP options */
@@ -166,7 +188,7 @@ extern void out32(unsigned int, unsigned long);
#define CONFIG_BOOTP_HOSTNAME
/*
- * Command line configuration
+ * Command configuration
*/
#include <config_cmd_default.h>
@@ -175,7 +197,6 @@ extern void out32(unsigned int, unsigned long);
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_ELF
-#define CONFIG_CMD_SAVEENV
#define CONFIG_CMD_FLASH
#define CONFIG_CMD_I2C
#define CONFIG_CMD_IRQ
@@ -184,14 +205,14 @@ extern void out32(unsigned int, unsigned long);
#define CONFIG_CMD_NET
#define CONFIG_CMD_PCI
#define CONFIG_CMD_PING
+#define CONFIG_CMD_SAVEENV
#define CONFIG_CMD_SNTP
-#undef CONFIG_WATCHDOG /* watchdog disabled */
-
/*
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
+#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
@@ -201,29 +222,8 @@ extern void out32(unsigned int, unsigned long);
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-
-#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
-
-#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
-
#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
-/*
- * PCI
- */
-/* General PCI */
-#define CONFIG_PCI /* include pci support */
-#define CONFIG_PCI_PNP /* do pci plug-and-play */
-#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
-#define CONFIG_SYS_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CONFIG_SYS_PCI_MEMBASE */
-
-/* Board-specific PCI */
-#define CONFIG_SYS_PCI_TARGET_INIT /* let board init pci target */
-#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x1014 /* IBM */
-#define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0xcafe /* Whatever */
-#define CONFIG_SYS_PCI_FORCE_PCI_CONV /* Force PCI Conventional Mode */
+#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
/*
* For booting Linux, the board info and command line data
@@ -233,17 +233,28 @@ extern void out32(unsigned int, unsigned long);
#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
/*
- * Internal Definitions
+ * Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
+/*
+ * KGDB configuration
+ */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
/*
+ * Environment Configuration
+ */
+#define CONFIG_ENV_IS_IN_FLASH 1
+#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128k (one sector) for env */
+#define CONFIG_ENV_SIZE 0x8000
+#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - (256 * 1024))
+
+/*
* Flash memory map:
* fff80000 - ffffffff U-Boot (512 KB)
* fff40000 - fff7ffff U-Boot Environment (256 KB)
--
1.6.2.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [U-Boot] [PATCH 12/14] xpedite1k: Sync up board config options with other X-ES boards
2009-07-18 0:01 [U-Boot] [PATCH 00/14] XPedite1K updates Peter Tyser
` (10 preceding siblings ...)
2009-07-18 0:01 ` [U-Boot] [PATCH 11/14] xpedite1k: Sync organization of board config " Peter Tyser
@ 2009-07-18 0:01 ` Peter Tyser
2009-07-18 0:01 ` [U-Boot] [PATCH 13/14] xpedite1k: Sync checkboard() " Peter Tyser
` (2 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Peter Tyser @ 2009-07-18 0:01 UTC (permalink / raw)
To: u-boot
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
---
include/configs/XPEDITE1K.h | 38 +++++++++++++++++++-------------------
1 files changed, 19 insertions(+), 19 deletions(-)
diff --git a/include/configs/XPEDITE1K.h b/include/configs/XPEDITE1K.h
index 391d041..016fa8a 100644
--- a/include/configs/XPEDITE1K.h
+++ b/include/configs/XPEDITE1K.h
@@ -62,6 +62,7 @@
/*
* Diagnostics
*/
+#define CONFIG_SYS_ALT_MEMTEST
#define CONFIG_SYS_MEMTEST_START 0x0400000
#define CONFIG_SYS_MEMTEST_END 0x0C00000
@@ -104,19 +105,25 @@ extern void out32(unsigned int, unsigned long);
#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_POST_WORD_ADDR
-#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */
-#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc */
+#define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 KB for Mon */
+#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserved for malloc */
/*
* Serial Port
*/
#define CONFIG_SYS_BAUDRATE_TABLE \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400}
-#define CONFIG_BAUDRATE 9600
+#define CONFIG_BAUDRATE 115200
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
/*
+ * Use the HUSH parser
+ */
+#define CONFIG_SYS_HUSH_PARSER
+#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
+
+/*
* NOR flash configuration
*/
#define CONFIG_SYS_MAX_FLASH_BANKS 3
@@ -126,8 +133,6 @@ extern void out32(unsigned int, unsigned long);
#define CONFIG_SYS_FLASH_CFI
#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
#define CONFIG_SYS_FLASH_QUIET_TEST /* MirrorBit flashes are optional */
-
-#undef CONFIG_SYS_FLASH_CHECKSUM
#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
@@ -137,7 +142,7 @@ extern void out32(unsigned int, unsigned long);
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_SLAVE 0x7f
-#define CONFIG_SYS_I2C_NOPROBES {0x55,0x56,0x57,0x58,0x59,0x5a,0x5b,0x5c,0x69}
+#define CONFIG_I2C_MULTI_BUS
/* I2C EEPROM */
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
@@ -214,16 +219,19 @@ extern void out32(unsigned int, unsigned long);
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
-#else
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
-#endif
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
+#define CONFIG_CMDLINE_EDITING 1 /* Command-line editing */
+#define CONFIG_BOOTDELAY 3 /* -1 disables auto-boot */
+#define CONFIG_PANIC_HANG /* do not reset board on panic */
+#define CONFIG_PREBOOT /* enable preboot variable */
+#define CONFIG_FIT 1
+#define CONFIG_FIT_VERBOSE 1
+#define CONFIG_INTEGRITY /* support booting INTEGRITY OS */
+#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
/*
* For booting Linux, the board info and command line data
@@ -239,14 +247,6 @@ extern void out32(unsigned int, unsigned long);
#define BOOTFLAG_WARM 0x02 /* Software reboot */
/*
- * KGDB configuration
- */
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
-#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
-#endif
-
-/*
* Environment Configuration
*/
#define CONFIG_ENV_IS_IN_FLASH 1
--
1.6.2.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [U-Boot] [PATCH 13/14] xpedite1k: Sync checkboard() with other X-ES boards
2009-07-18 0:01 [U-Boot] [PATCH 00/14] XPedite1K updates Peter Tyser
` (11 preceding siblings ...)
2009-07-18 0:01 ` [U-Boot] [PATCH 12/14] xpedite1k: Sync up board config options " Peter Tyser
@ 2009-07-18 0:01 ` Peter Tyser
2009-07-18 0:01 ` [U-Boot] [PATCH 14/14] xpedite1k: Move to X-ES vendor directory Peter Tyser
2009-07-20 9:04 ` [U-Boot] [PATCH 00/14] XPedite1K updates Stefan Roese
14 siblings, 0 replies; 16+ messages in thread
From: Peter Tyser @ 2009-07-18 0:01 UTC (permalink / raw)
To: u-boot
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
---
board/xpedite1k/xpedite1k.c | 15 ++++++++++++++-
include/configs/XPEDITE1K.h | 1 +
2 files changed, 15 insertions(+), 1 deletions(-)
diff --git a/board/xpedite1k/xpedite1k.c b/board/xpedite1k/xpedite1k.c
index 33d4ac8..6926c1c 100644
--- a/board/xpedite1k/xpedite1k.c
+++ b/board/xpedite1k/xpedite1k.c
@@ -112,7 +112,20 @@ int board_early_init_f(void)
int checkboard(void)
{
- printf("Board: XES XPedite1000 440GX\n");
+ char *s;
+
+ printf("Board: X-ES %s PMC SBC\n", CONFIG_SYS_BOARD_NAME);
+ printf(" ");
+ s = getenv("board_rev");
+ if (s)
+ printf("Rev %s, ", s);
+ s = getenv("serial#");
+ if (s)
+ printf("Serial# %s, ", s);
+ s = getenv("board_cfg");
+ if (s)
+ printf("Cfg %s", s);
+ printf("\n");
return 0;
}
diff --git a/include/configs/XPEDITE1K.h b/include/configs/XPEDITE1K.h
index 016fa8a..bb6208c 100644
--- a/include/configs/XPEDITE1K.h
+++ b/include/configs/XPEDITE1K.h
@@ -32,6 +32,7 @@
/* High Level Configuration Options */
#define CONFIG_XPEDITE1K 1 /* Board is XPedite 1000 */
+#define CONFIG_SYS_BOARD_NAME "XPedite1000"
#define CONFIG_4xx 1 /* ... PPC4xx family */
#define CONFIG_440 1
#define CONFIG_440GX 1 /* 440 GX */
--
1.6.2.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [U-Boot] [PATCH 14/14] xpedite1k: Move to X-ES vendor directory
2009-07-18 0:01 [U-Boot] [PATCH 00/14] XPedite1K updates Peter Tyser
` (12 preceding siblings ...)
2009-07-18 0:01 ` [U-Boot] [PATCH 13/14] xpedite1k: Sync checkboard() " Peter Tyser
@ 2009-07-18 0:01 ` Peter Tyser
2009-07-20 9:04 ` [U-Boot] [PATCH 00/14] XPedite1K updates Stefan Roese
14 siblings, 0 replies; 16+ messages in thread
From: Peter Tyser @ 2009-07-18 0:01 UTC (permalink / raw)
To: u-boot
The XPedite1000 is an X-ES product thus it can be put in board/xes along
with other X-ES boards. Along with the move, the board was renamed to
XPedite1000 from XPedite1K to fit X-ES's standard naming convention.
Maintainership was also transfered to Peter Tyser.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
---
MAINTAINERS | 2 +-
MAKEALL | 2 +-
Makefile | 4 ++--
board/{xpedite1k => xes/xpedite1000}/Makefile | 0
board/{xpedite1k => xes/xpedite1000}/config.mk | 0
board/{xpedite1k => xes/xpedite1000}/init.S | 0
board/{xpedite1k => xes/xpedite1000}/u-boot.lds | 2 +-
.../xpedite1000}/u-boot.lds.debug | 2 +-
.../xpedite1k.c => xes/xpedite1000/xpedite1000.c} | 0
include/configs/{XPEDITE1K.h => XPEDITE1000.h} | 2 +-
10 files changed, 7 insertions(+), 7 deletions(-)
rename board/{xpedite1k => xes/xpedite1000}/Makefile (100%)
rename board/{xpedite1k => xes/xpedite1000}/config.mk (100%)
rename board/{xpedite1k => xes/xpedite1000}/init.S (100%)
rename board/{xpedite1k => xes/xpedite1000}/u-boot.lds (98%)
rename board/{xpedite1k => xes/xpedite1000}/u-boot.lds.debug (98%)
rename board/{xpedite1k/xpedite1k.c => xes/xpedite1000/xpedite1000.c} (100%)
rename include/configs/{XPEDITE1K.h => XPEDITE1000.h} (99%)
diff --git a/MAINTAINERS b/MAINTAINERS
index 575a7ec..12a3e5d 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -381,7 +381,6 @@ Travis Sawyer (travis.sawyer at sandburst.com>
KAREF PPC440GX
METROBOX PPC440GX
- XPEDITE1K PPC440GX
Georg Schardt <schardt@team-ctech.de>
@@ -436,6 +435,7 @@ Rune Torgersen <runet@innovsys.com>
Peter Tyser <ptyser@xes-inc.com>
+ XPEDITE1000 PPC440GX
XPEDITE5170 MPC8640
XPEDITE5200 MPC8548
XPEDITE5370 MPC8572
diff --git a/MAKEALL b/MAKEALL
index 020ff73..65a891f 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -258,7 +258,7 @@ LIST_4xx=" \
WUH405 \
xilinx-ppc440-generic \
xilinx-ppc440-generic_flash \
- XPEDITE1K \
+ XPEDITE1000 \
yellowstone \
yosemite \
yucca \
diff --git a/Makefile b/Makefile
index 090e645..9b8554f 100644
--- a/Makefile
+++ b/Makefile
@@ -1640,8 +1640,8 @@ xilinx-ppc440-generic_config: unconfig
>> $(obj)board/xilinx/ppc440-generic/config.tmp
@$(MKCONFIG) xilinx-ppc440-generic ppc ppc4xx ppc440-generic xilinx
-XPEDITE1K_config: unconfig
- @$(MKCONFIG) $(@:_config=) ppc ppc4xx xpedite1k
+XPEDITE1000_config: unconfig
+ @$(MKCONFIG) $(@:_config=) ppc ppc4xx xpedite1000 xes
yosemite_config \
yellowstone_config: unconfig
diff --git a/board/xpedite1k/Makefile b/board/xes/xpedite1000/Makefile
similarity index 100%
rename from board/xpedite1k/Makefile
rename to board/xes/xpedite1000/Makefile
diff --git a/board/xpedite1k/config.mk b/board/xes/xpedite1000/config.mk
similarity index 100%
rename from board/xpedite1k/config.mk
rename to board/xes/xpedite1000/config.mk
diff --git a/board/xpedite1k/init.S b/board/xes/xpedite1000/init.S
similarity index 100%
rename from board/xpedite1k/init.S
rename to board/xes/xpedite1000/init.S
diff --git a/board/xpedite1k/u-boot.lds b/board/xes/xpedite1000/u-boot.lds
similarity index 98%
rename from board/xpedite1k/u-boot.lds
rename to board/xes/xpedite1000/u-boot.lds
index fc001b2..46b52fc 100644
--- a/board/xpedite1k/u-boot.lds
+++ b/board/xes/xpedite1000/u-boot.lds
@@ -66,7 +66,7 @@ SECTIONS
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/ppc4xx/start.o (.text)
- board/xpedite1k/init.o (.text)
+ board/xes/xpedite1000/init.o (.text)
cpu/ppc4xx/kgdb.o (.text)
cpu/ppc4xx/traps.o (.text)
cpu/ppc4xx/interrupts.o (.text)
diff --git a/board/xpedite1k/u-boot.lds.debug b/board/xes/xpedite1000/u-boot.lds.debug
similarity index 98%
rename from board/xpedite1k/u-boot.lds.debug
rename to board/xes/xpedite1000/u-boot.lds.debug
index 5824cd9..68cd72d 100644
--- a/board/xpedite1k/u-boot.lds.debug
+++ b/board/xes/xpedite1000/u-boot.lds.debug
@@ -56,7 +56,7 @@ SECTIONS
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/ppc4xx/start.o (.text)
- board/xpedite1k/init.o (.text)
+ board/xes/xpedite1000/init.o (.text)
cpu/ppc4xx/kgdb.o (.text)
cpu/ppc4xx/traps.o (.text)
cpu/ppc4xx/interrupts.o (.text)
diff --git a/board/xpedite1k/xpedite1k.c b/board/xes/xpedite1000/xpedite1000.c
similarity index 100%
rename from board/xpedite1k/xpedite1k.c
rename to board/xes/xpedite1000/xpedite1000.c
diff --git a/include/configs/XPEDITE1K.h b/include/configs/XPEDITE1000.h
similarity index 99%
rename from include/configs/XPEDITE1K.h
rename to include/configs/XPEDITE1000.h
index bb6208c..658e947 100644
--- a/include/configs/XPEDITE1K.h
+++ b/include/configs/XPEDITE1000.h
@@ -31,7 +31,7 @@
#define __CONFIG_H
/* High Level Configuration Options */
-#define CONFIG_XPEDITE1K 1 /* Board is XPedite 1000 */
+#define CONFIG_XPEDITE1000 1
#define CONFIG_SYS_BOARD_NAME "XPedite1000"
#define CONFIG_4xx 1 /* ... PPC4xx family */
#define CONFIG_440 1
--
1.6.2.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [U-Boot] [PATCH 00/14] XPedite1K updates
2009-07-18 0:01 [U-Boot] [PATCH 00/14] XPedite1K updates Peter Tyser
` (13 preceding siblings ...)
2009-07-18 0:01 ` [U-Boot] [PATCH 14/14] xpedite1k: Move to X-ES vendor directory Peter Tyser
@ 2009-07-20 9:04 ` Stefan Roese
14 siblings, 0 replies; 16+ messages in thread
From: Stefan Roese @ 2009-07-20 9:04 UTC (permalink / raw)
To: u-boot
On Saturday 18 July 2009 02:01:02 Peter Tyser wrote:
> The XPedite1000 is a 440gx-based PMC made by X-ES. Support was added
> for XPedite100 to U-Boot > 5 years ago by Travis Sawyer
> (travis.sawyer at sandburst.com) independent of X-ES. Sandburst was
> bought out by Broadcom some time ago. I attempted to contact
> Travis at both his old Sandburst and Broadcom email addresses
> but neither account still exist.
>
> We never sold any XPedite1000's to Sandburst, so I'm not quite sure
> how Travis initially got his hands on one (ebay?). In any case,
> now that other X-ES products are supported by U-Boot I thought
> it would make sense to sync up the XPedite1000 with other X-ES
> boards. In my opinion, these changes add some functionality and
> are generally an improvement. No one is currently using U-Boot
> on the XPedite1000 that I'm aware of so I hope the changes don't
> affect others in a negative way.
>
> In any case, I was hoping to take over maintainership for the board,
> but was never able to get the OK from Travis. I hope this is OK...
It's ok with me.
> Peter Tyser (14):
> xpedite1k: Use standard CFI flash driver
> xpedite1k: Remove CONFIG_SYS_DRAM_TEST support
> xpedite1k: Remove support for fixed SDRAM configuration
> xpedite1k: Remove support for reading MACs from EEPROM
> xpedite1k: Cleanup coding style
> xpedite1k: Add support for optional flashes
> xpedite1k: Add support for additional GPIO pins
> xpedite1k: Store environment in flash
> xpedite1k: Disable unused ethernet port 1
> xpedite1k: Sync up commands and environment with other X-ES boards
> xpedite1k: Sync organization of board config with other X-ES boards
> xpedite1k: Sync up board config options with other X-ES boards
> xpedite1k: Sync checkboard() with other X-ES boards
> xpedite1k: Move to X-ES vendor directory
All 14 patches applied to ppc4xx. Thanks.
Best regards,
Stefan
=====================================================================
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de
=====================================================================
^ permalink raw reply [flat|nested] 16+ messages in thread