* [U-Boot] [PATCH] mpc83xx: Add esd VME8349 board support
@ 2009-06-10 17:09 Stefan Roese
2009-06-11 15:15 ` Kim Phillips
0 siblings, 1 reply; 6+ messages in thread
From: Stefan Roese @ 2009-06-10 17:09 UTC (permalink / raw)
To: u-boot
From: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
From: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
This patch adds support for the esd VME8349 board equipped with the
MPC8349. It's a VME PMC carrier board equipped with the Tundra
TSI148 VME-bridge.
Signed-off-by: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
Signed-off-by: Stefan Roese <sr@denx.de>
---
MAINTAINERS | 2 +
MAKEALL | 1 +
Makefile | 2 +
board/esd/vme8349/Makefile | 49 ++++
board/esd/vme8349/aduc.c | 522 +++++++++++++++++++++++++++++++++++
board/esd/vme8349/caddy.c | 203 ++++++++++++++
board/esd/vme8349/caddy.h | 78 ++++++
board/esd/vme8349/config.mk | 27 ++
board/esd/vme8349/pci.c | 409 +++++++++++++++++++++++++++
board/esd/vme8349/vme8349.c | 129 +++++++++
drivers/pci/pci_auto.c | 2 +
include/configs/vme8349.h | 638 +++++++++++++++++++++++++++++++++++++++++++
12 files changed, 2062 insertions(+), 0 deletions(-)
create mode 100644 board/esd/vme8349/Makefile
create mode 100644 board/esd/vme8349/aduc.c
create mode 100644 board/esd/vme8349/caddy.c
create mode 100644 board/esd/vme8349/caddy.h
create mode 100644 board/esd/vme8349/config.mk
create mode 100644 board/esd/vme8349/pci.c
create mode 100644 board/esd/vme8349/vme8349.c
create mode 100644 include/configs/vme8349.h
diff --git a/MAINTAINERS b/MAINTAINERS
index bba6ce9..861ff33 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -31,6 +31,8 @@ Reinhard Arlt <reinhard.arlt@esd-electronics.com>
mecp5200 MPC5200
pf5200 MPC5200
+ vme8349 MPC8349
+
CPCI750 PPC750FX/GX
Yuli Barcohen <yuli@arabellasw.com>
diff --git a/MAKEALL b/MAKEALL
index fd31252..6e139bd 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -360,6 +360,7 @@ LIST_83xx=" \
sbc8349 \
SIMPC8313_LP \
TQM834x \
+ vme8349 \
"
diff --git a/Makefile b/Makefile
index 64b7fbd..f6c2181 100644
--- a/Makefile
+++ b/Makefile
@@ -2396,6 +2396,8 @@ SIMPC8313_SP_config: unconfig
TQM834x_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc83xx tqm834x tqc
+vme8349_config: unconfig
+ @$(MKCONFIG) $(@:_config=) ppc mpc83xx vme8349 esd
#########################################################################
## MPC85xx Systems
diff --git a/board/esd/vme8349/Makefile b/board/esd/vme8349/Makefile
new file mode 100644
index 0000000..fb199bd
--- /dev/null
+++ b/board/esd/vme8349/Makefile
@@ -0,0 +1,49 @@
+#
+# Copyright (c) 2009 esd gmbh hannover germany.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).a
+
+COBJS := $(BOARD).o pci.o aduc.o caddy.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak $(obj).depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/esd/vme8349/aduc.c b/board/esd/vme8349/aduc.c
new file mode 100644
index 0000000..0a31241
--- /dev/null
+++ b/board/esd/vme8349/aduc.c
@@ -0,0 +1,522 @@
+/*
+ * aduc.c -- esd VME8349 board support for aduc848 monitor.
+ * Copyright (c) 2008-2009 esd gmbh.
+ *
+ * Reinhard Arlt <reinhard.arlt@esd-electronics.com>
+ * Based on board/mpc8349emds/mpc8349emds.c (and previous 834x releases.)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <common.h>
+#include <ioports.h>
+#include <mpc83xx.h>
+#include <i2c.h>
+
+static char aductab[10][10] = {{"12.0 Volt"},
+ {" 5.0 Volt"},
+ {" 3.3 Volt"},
+ {" 1.8 Volt"},
+ {" 1.2 Volt"},
+ {" 1.0 Volt"},
+ {" TSI TMP"},
+ {" CPU TMP"},
+ {" 2.5 Volt"},
+ {" 3.3 VAux"}};
+
+static long long aducfac[10] = {((2560 * (4700 + 1000)) / 1000),
+ ((2560 * (4700 + 3300)) / 3300),
+ ((2560 * (1500 + 1000)) / 1500),
+ ((2560 * (1000 )) / 1000),
+ ((2560 * (1000 )) / 1000),
+ ((2560 * (1000 )) / 1000),
+ ((2560 * (1000 )) / 1000),
+ ((2560 * (1000 )) / 1000),
+ ((2560 * (4700 + 1000)) / 4700),
+ ((2560 * (1500 + 1000)) / 1500)};
+
+static uchar aducmode[10] = {0, 0, 0, 0, 0, 0, 1, 2, 0, 0};
+
+static int old_bus;
+
+static uint8_t aduc_execute_long(uint8_t par0, uint8_t par1, uint8_t cmd, uint32_t timeout)
+{
+ uint32_t l;
+ unsigned char cmmd[8];
+
+ cmmd[0] = 0;
+ cmmd[1] = 3;
+ cmmd[2] = par0;
+ cmmd[3] = par1;
+ cmmd[4] = cmd;
+
+ if (i2c_write(0x78, 0x40, 1, (unsigned char *)cmmd, 5) != 0) {
+ printf("i2c_write cmmd failed\n");
+ I2C_SET_BUS(old_bus);
+ return 0xfe;
+ }
+ i2c_read(0x78, 0x40, 1, (unsigned char *)cmmd, 1);
+ cmmd[0] = 0x00;
+ for (l = 1; (l < timeout) && (cmmd[0] == 0); l++) {
+ if (i2c_read(0x78, 0x40, 1, (unsigned char *)cmmd, 1) != 0) {
+ printf("i2c_read status failed\n");
+ I2C_SET_BUS(old_bus);
+ return 0xfe;
+ }
+ if ((l % 10) == 0)
+ putc('.');
+ udelay(10000);
+ }
+
+ return cmmd[0];
+}
+
+static uint8_t aduc_execute(uint8_t par0, uint8_t par1, uint8_t cmd)
+{
+ return aduc_execute_long(par0, par1, cmd, 600);
+}
+
+int aduc_download_block(unsigned long addr, unsigned long len)
+{
+ unsigned char buf[10];
+ unsigned long m;
+
+ m = addr;
+ buf[4] = m & 0x0ff; m >>= 8;
+ buf[3] = m & 0x0ff; m >>= 8;
+ buf[2] = m & 0x0ff; m >>= 8;
+ buf[1] = m & 0x0ff;
+
+ m = len;
+ buf[8] = m & 0x0ff; m >>= 8;
+ buf[7] = m & 0x0ff; m >>= 8;
+ buf[6] = m & 0x0ff; m >>= 8;
+ buf[5] = m & 0x0ff;
+
+ buf[0] = 0xff;
+
+ if (i2c_write(0x78, 0x40, 1, buf, 9) != 0) {
+ printf("i2c_write addr failed\n");
+ return 1;
+ }
+
+ if (i2c_write(0x78, 0x50, 1, (unsigned char *)addr, len) != 0) {
+ printf("i2c_write data failed\n");
+ return 2;
+ }
+
+ for (m = 0; m < 50; m++) {
+ if (i2c_read(0x78, 0x40, 1, buf, 1) != 0) {
+ printf("i2c_read status failed\n");
+ return 3;
+ }
+ if (buf[0] == 0xff)
+ udelay(100000);
+ else if (buf[0] == 0)
+ return 0;
+ else
+ return 4;
+ }
+ return 5;
+}
+
+int do_show_aduc(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ uchar buf[32];
+ int old_bus;
+
+ old_bus = I2C_GET_BUS();
+ I2C_SET_BUS(1);
+
+ if (i2c_read(0x78, 0, 1, buf, 32) != 0) {
+ printf("Error reading from ADUC\n");
+ } else {
+ unsigned int l;
+
+ for (l = 0; l < 20; l += 2) {
+ u64 l0;
+ u32 l1;
+
+ l0 = ((buf[l] << 8) & 0x0ff00) | (buf[l + 1] & 0x0ff);
+ switch (aducmode[l >> 1]) {
+ case 0:
+ l0 = l0 * aducfac[l >> 1];
+ l1 = l0 >> 16;
+ break;
+ case 1:
+ l1 = l0 >> 16;
+ break;
+ case 2:
+ l1 = l0 >> 16;
+ break;
+ default:
+ l1 = 0xffffffff;
+ break;
+ }
+ printf("[%10s] : %7d.%03d %02x %02x\n",
+ aductab[l >> 1], l1 / 1000, l1 % 1000,
+ buf[l], buf[l + 1]);
+ }
+ }
+ printf("%02x %02x %02x\n", buf[29], buf[30], buf[31]);
+
+ I2C_SET_BUS(old_bus);
+ printf("\n");
+
+ return 0;
+}
+
+int do_cmd_aduc(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ uint8_t par0, par1, cmd, stat;
+
+ if (argc < 4) {
+ puts("Missing parameter\n");
+ return 1;
+ }
+
+ par0 = simple_strtoul(argv[1], NULL, 16);
+ par1 = simple_strtoul(argv[2], NULL, 16);
+ cmd = simple_strtoul(argv[3], NULL, 16);
+
+ printf("%02x %02x %02x\n", par0, par1, cmd);
+
+ old_bus = I2C_GET_BUS();
+ I2C_SET_BUS(1);
+
+ stat = aduc_execute(par0, par1, cmd);
+
+ printf("\n");
+ if (stat != 0x01)
+ printf("Got status %02x\n", stat);
+ I2C_SET_BUS(old_bus);
+ return 0;
+}
+
+
+int do_fpga_aduc(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ uint8_t stat;
+ uint8_t buffer[512 + 16];
+ unsigned long addr;
+ unsigned long size;
+ const unsigned char *fpgadata;
+ int i, index, len;
+
+ if (argc < 2)
+ addr = load_addr;
+ else
+ addr = simple_strtoul(argv[1], NULL, 16);
+
+ if (argc < 3) {
+ char *tmp;
+
+ if ((tmp = getenv("filesize")) != NULL) {
+ size = simple_strtoul(tmp, NULL, 16);
+ } else {
+ puts("No filesize provided\n");
+ return 1;
+ }
+ } else {
+ size = simple_strtoul(argv[2], NULL, 16);
+ }
+
+ fpgadata = (const unsigned char *)addr;
+/* display infos on fpgaimage */
+ index = 15;
+ for (i = 0; i < 4; i++) {
+ len = fpgadata[index];
+ printf("FPGA: %s\n", &(fpgadata[index + 1]));
+ index += len + 3;
+ }
+
+/* search for preamble 0xFFFFFFFF */
+ while (1) {
+ if ((fpgadata[index] == 0xff) && (fpgadata[index + 1] == 0xff)
+ && (fpgadata[index + 2] == 0xff)
+ && (fpgadata[index + 3] == 0xff))
+ break; /* preamble found */
+ else
+ index++;
+ }
+
+ printf("FPGA: configdata starts at position 0x%x\n", index);
+ printf("FPGA: length of fpga-data %d\n", (int)(size - index));
+
+ old_bus = I2C_GET_BUS();
+ I2C_SET_BUS(1);
+
+ stat = aduc_execute(0x00, 0x00, 0x01);
+
+ printf("\n");
+ if (stat != 0x01) {
+ printf("Got status@START:%02x\n", stat);
+ I2C_SET_BUS(old_bus);
+ return 1;
+ }
+
+ i = index;
+
+ while (i < size) {
+ int blen, j;
+
+ blen = size - i;
+ if (blen > 512)
+ blen = 512;
+
+ buffer[0] = blen / 0x100;
+ buffer[1] = blen % 0x100;
+ for (j = 0; j < blen; j++)
+ buffer[j + 2] = fpgadata[i + j];
+ i = i + blen;
+ if (i2c_write(0x78, 0x20, 1, (unsigned char *)buffer, blen + 2)
+ != 0) {
+ printf("i2c_write data block failed\n");
+ I2C_SET_BUS(old_bus);
+ return 2;
+ }
+
+ stat = aduc_execute(blen / 0x100, blen % 0x100, 0x02);
+ if (stat != 0x01) {
+ printf("\nGot status at BLOCK:%02x\n", stat);
+ I2C_SET_BUS(old_bus);
+ return 1;
+ }
+ if ((i % (1024 * 32)) < 512)
+ printf("+");
+ }
+
+ stat = aduc_execute(0x00, 0x00, 0x03);
+
+ printf("\n");
+ if (stat != 0x01) {
+ printf("Got status at END:%02x\n", stat);
+ I2C_SET_BUS(old_bus);
+ return 1;
+ }
+ I2C_SET_BUS(old_bus);
+ return 0;
+}
+
+int do_image_aduc(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ uint8_t stat;
+ uint8_t buffer[512+16];
+ unsigned long addr;
+ unsigned long size;
+ const unsigned char *fpgadata;
+ int i, index, len, slot;
+
+ slot = simple_strtoul(argv[1], NULL, 16);
+
+ if (argc < 3)
+ addr = load_addr;
+ else
+ addr = simple_strtoul(argv[2], NULL, 16);
+
+ if (argc < 4) {
+ char *tmp;
+
+ if ((tmp = getenv("filesize")) != NULL) {
+ size = simple_strtoul(tmp, NULL, 16);
+ } else {
+ puts("No filesize provided\n");
+ return 1;
+ }
+ } else {
+ size = simple_strtoul(argv[3], NULL, 16);
+ }
+
+ fpgadata = (const unsigned char *)addr;
+/* display infos on fpgaimage */
+ index = 15;
+ for (i = 0; i < 4; i++) {
+ len = fpgadata[index];
+ printf("FPGA: %s\n", &(fpgadata[index + 1]));
+ index += len + 3;
+ }
+
+/* search for preamble 0xFFFFFFFF */
+ while (1) {
+ if ((fpgadata[index] == 0xff) && (fpgadata[index + 1] == 0xff)
+ && (fpgadata[index + 2] == 0xff)
+ && (fpgadata[index + 3] == 0xff))
+ break; /* preamble found */
+ else
+ index++;
+ }
+
+ printf("FPGA: configdata starts at position 0x%x\n", index);
+ printf("FPGA: length of fpga-data %d\n", (int)(size - index));
+
+ memset(buffer, 0, sizeof(buffer));
+
+ old_bus = I2C_GET_BUS();
+ I2C_SET_BUS(1);
+
+ stat = aduc_execute(slot, 0x00, 0x07); /* Prepare write */
+ printf("\n");
+ if (stat != 0x01) {
+ printf("Got status at PREPARE(1):%02x\n", stat);
+ I2C_SET_BUS(old_bus);
+ return 1;
+ }
+
+ stat = aduc_execute(slot, 0x00, 0x06); /* Erase slot */
+ printf("\n");
+ if (stat != 0x01) {
+ printf("Got status at ERASE:%02x\n", stat);
+ I2C_SET_BUS(old_bus);
+ return 1;
+ }
+
+ stat = aduc_execute(slot, 0x00, 0x07); /* Prepare write */
+ printf("\n");
+ if (stat != 0x01) {
+ printf("Got status@PREPARE(2):%02x\n", stat);
+ I2C_SET_BUS(old_bus);
+ return 1;
+ }
+
+ i = size - index;
+ buffer[ 0] = 0x02;
+ buffer[ 1] = 0x00;
+ buffer[ 2] = (i >> 24) & 0x0ff;
+ buffer[ 3] = (i >> 16) & 0x0ff;
+ buffer[ 4] = (i >> 8) & 0x0ff;
+ buffer[ 5] = (i >> 0) & 0x0ff;
+ buffer[ 6] = ~buffer[2];
+ buffer[ 7] = ~buffer[3];
+ buffer[ 8] = ~buffer[4];
+ buffer[ 9] = ~buffer[5];
+ buffer[ 10] = 'e';
+ buffer[ 11] = 's';
+ buffer[ 12] = 'd';
+ buffer[ 13] = 0 ;
+ buffer[512] = 0x55;
+ buffer[513] = 0xaa;
+ if (i2c_write(0x78, 0x20, 1, (unsigned char *)buffer, 512+2) != 0) {
+ printf("i2c_write data block failed\n");
+ I2C_SET_BUS(old_bus);
+ return 2;
+ }
+
+ stat = aduc_execute(0x00, 0x00, 0x05); /* write block to flash */
+ if (stat != 0x01) {
+ printf("\nGot status at WRITE_BLOCK(1):%02x\n", stat);
+ I2C_SET_BUS(old_bus);
+ return 1;
+ }
+
+ i = index;
+ while (i < size) {
+ int blen, j;
+
+ blen = size - i;
+ if (blen > 512)
+ blen = 512;
+
+ buffer[0] = blen / 0x100;
+ buffer[1] = blen % 0x100;
+ for (j = 0; j < blen; j++)
+ buffer[j + 2] = fpgadata[i + j];
+ i = i + blen;
+ if (i2c_write(0x78, 0x20, 1, (unsigned char *)buffer, blen+2)
+ != 0) {
+ printf("i2c_write data block failed\n");
+ I2C_SET_BUS(old_bus);
+ return 2;
+ }
+
+ /* Write block to FLASH */
+ stat = aduc_execute(0x00, 0x00, 0x05);
+ if (stat != 0x01) {
+ printf("\nGot status at WRITE_BLOCK(2):%02x\n", stat);
+ I2C_SET_BUS(old_bus);
+ return 1;
+ }
+ if ((i % (1024 * 32)) < 512)
+ printf("+");
+ }
+
+ stat = aduc_execute(0x00, 0x00, 0x08); /* Disable write */
+ printf("\n");
+ if (stat != 0x01) {
+ printf("Got status at DISABLE:%02x\n", stat);
+ I2C_SET_BUS(old_bus);
+ return 1;
+ }
+
+ I2C_SET_BUS(old_bus);
+ return 0;
+}
+
+
+int do_load_aduc(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ int slot;
+ uint8_t stat;
+
+ slot = simple_strtoul(argv[1], NULL, 16);
+
+ old_bus = I2C_GET_BUS();
+ I2C_SET_BUS(1);
+
+/* Load slot from FLASH to FPGA */
+ stat = aduc_execute_long(slot, 0x00, 0x04, 30000);
+ printf("\n");
+ if (stat != 0x01) {
+ printf("Got status@LOAD_SLOT:%02x\n", stat);
+ I2C_SET_BUS(old_bus);
+ return 1;
+ }
+ I2C_SET_BUS(old_bus);
+ return 0;
+}
+
+U_BOOT_CMD(
+ aducshow, 1, 1, do_show_aduc,
+ "Show ADUC ADC values",
+ "Show values of ADUC ADC (Board supply voltages)\n"
+ );
+
+U_BOOT_CMD(
+ aduccmd, 4, 0, do_cmd_aduc,
+ "Issue a command to ADUC",
+ "Issue Command to ADUC <byte0> <byte1> <byte2>\n"
+ );
+
+U_BOOT_CMD(
+ aducfpga, 2, 0, do_fpga_aduc,
+ "Boot FPGA via ADUC",
+ "Download Image from ${loadaddr} to FPGA\n"
+ );
+
+U_BOOT_CMD(
+ aducimage, 3, 0, do_image_aduc,
+ "Write FPGA image to FLASH via ADUC",
+ "Write Image from ${loadaddr} to [slot] in FLASH\n"
+ );
+
+U_BOOT_CMD(
+ aducload, 2, 1, do_load_aduc,
+ "Load image from FLASH to FPGA via ADUC",
+ "Load Image from [slot] in FLASH to FPGA\n"
+ );
diff --git a/board/esd/vme8349/caddy.c b/board/esd/vme8349/caddy.c
new file mode 100644
index 0000000..e817853
--- /dev/null
+++ b/board/esd/vme8349/caddy.c
@@ -0,0 +1,203 @@
+/*
+ * caddy.c -- esd VME8349 support for "missing" access modes in TSI148.
+ * Copyright (c) 2009 esd gmbh.
+ *
+ * Reinhard Arlt <reinhard.arlt@esd-electronics.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <common.h>
+#include <ioports.h>
+#include <mpc83xx.h>
+#include <asm/mpc8349_pci.h>
+#include <pci.h>
+#include <asm/mmu.h>
+#include <asm/io.h>
+
+#include "caddy.h"
+
+static CADDY_INTERFACE *caddy_interface;
+
+void generate_answer(CADDY_CMD *cmd, uint32_t status, uint32_t *result)
+{
+ CADDY_ANSWER *answer;
+ uint32_t ptr;
+
+ answer = &caddy_interface->answer[caddy_interface->answer_in];
+ memset((void *) answer, 0, sizeof(CADDY_ANSWER));
+ answer->answer = cmd->cmd;
+ answer->issue = cmd->issue;
+ answer->status = status;
+ answer->par[0] = result[0];
+ answer->par[1] = result[1];
+ answer->par[2] = result[2];
+ answer->par[3] = result[3];
+ answer->par[4] = result[4];
+ ptr = caddy_interface->answer_in + 1;
+ ptr = ptr & (ANSWER_SIZE - 1);
+ if (ptr != caddy_interface->answer_out)
+ caddy_interface->answer_in = ptr;
+}
+
+
+int do_caddy(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ unsigned long base_addr;
+ uint32_t ptr;
+
+ if (argc < 2) {
+ puts("Missing parameter\n");
+ return 1;
+ }
+
+ base_addr = simple_strtoul(argv[1], NULL, 16);
+ caddy_interface = (CADDY_INTERFACE *) base_addr;
+
+ memset((void *)caddy_interface, 0, sizeof(CADDY_INTERFACE));
+ memcpy((void *)&caddy_interface->magic[0], &CADDY_MAGIC, 16);
+ while (ctrlc() == 0) {
+ if (caddy_interface->cmd_in != caddy_interface->cmd_out) {
+ CADDY_CMD *caddy_cmd;
+ uint32_t result[5];
+ uint16_t data16;
+ uint8_t data8;
+ uint32_t status;
+ pci_dev_t dev;
+
+ result[0] = 0;
+ result[1] = 0;
+ result[2] = 0;
+ result[3] = 0;
+ result[4] = 0;
+ status = 0;
+ caddy_cmd = &caddy_interface->cmd[caddy_interface->cmd_out];
+ switch (caddy_cmd->cmd) {
+ case CADDY_CMD_IO_READ_8:
+ result[0] = in_8((void *)CONFIG_SYS_PCI1_IO_PHYS +
+ (caddy_cmd->addr & 0x001fffff));
+ generate_answer(caddy_cmd, status, &result[0]);
+ break;
+ case CADDY_CMD_IO_READ_16:
+ result[0] = in_be16((void *)CONFIG_SYS_PCI1_IO_PHYS +
+ (caddy_cmd->addr & 0x001fffff));
+ generate_answer(caddy_cmd, status, &result[0]);
+ break;
+ case CADDY_CMD_IO_READ_32:
+ result[0] = in_be32((void *)CONFIG_SYS_PCI1_IO_PHYS +
+ (caddy_cmd->addr & 0x001fffff));
+ generate_answer(caddy_cmd, status, &result[0]);
+ break;
+ case CADDY_CMD_IO_WRITE_8:
+ data8 = caddy_cmd->par[0] & 0x000000ff;
+ out_8((void *)CONFIG_SYS_PCI1_IO_PHYS +
+ (caddy_cmd->addr & 0x001fffff), data8);
+ generate_answer(caddy_cmd, status, &result[0]);
+ break;
+ case CADDY_CMD_IO_WRITE_16:
+ data16 = caddy_cmd->par[0] & 0x0000ffff;
+ out_be16((void *)CONFIG_SYS_PCI1_IO_PHYS +
+ (caddy_cmd->addr & 0x001fffff),
+ data16);
+ generate_answer(caddy_cmd, status, &result[0]);
+ break;
+ case CADDY_CMD_IO_WRITE_32:
+ out_be32((void *)CONFIG_SYS_PCI1_IO_PHYS +
+ (caddy_cmd->addr & 0x001fffff),
+ caddy_cmd->par[0]);
+ generate_answer(caddy_cmd, status, &result[0]);
+ break;
+ case CADDY_CMD_CONFIG_READ_8:
+ dev = PCI_BDF(caddy_cmd->par[0],
+ caddy_cmd->par[1],
+ caddy_cmd->par[2]);
+ status = pci_read_config_byte(dev,
+ caddy_cmd->addr,
+ &data8);
+ result[0] = data8;
+ generate_answer(caddy_cmd, status, &result[0]);
+ break;
+ case CADDY_CMD_CONFIG_READ_16:
+ dev = PCI_BDF(caddy_cmd->par[0],
+ caddy_cmd->par[1],
+ caddy_cmd->par[2]);
+ status = pci_read_config_word(dev,
+ caddy_cmd->addr,
+ &data16);
+ result[0] = data16;
+ generate_answer(caddy_cmd, status, &result[0]);
+ break;
+ case CADDY_CMD_CONFIG_READ_32:
+ dev = PCI_BDF(caddy_cmd->par[0],
+ caddy_cmd->par[1],
+ caddy_cmd->par[2]);
+ status = pci_read_config_dword(dev,
+ caddy_cmd->addr,
+ &result[0]);
+ generate_answer(caddy_cmd, status, &result[0]);
+ break;
+ case CADDY_CMD_CONFIG_WRITE_8:
+ dev = PCI_BDF(caddy_cmd->par[0],
+ caddy_cmd->par[1],
+ caddy_cmd->par[2]);
+ data8 = caddy_cmd->par[3] & 0x000000ff;
+ status = pci_write_config_byte(dev,
+ caddy_cmd->addr,
+ data8);
+ generate_answer(caddy_cmd, status, &result[0]);
+ break;
+ case CADDY_CMD_CONFIG_WRITE_16:
+ dev = PCI_BDF(caddy_cmd->par[0],
+ caddy_cmd->par[1],
+ caddy_cmd->par[2]);
+ data16 = caddy_cmd->par[3] & 0x0000ffff;
+ status = pci_write_config_word(dev,
+ caddy_cmd->addr,
+ data16);
+ generate_answer(caddy_cmd, status, &result[0]);
+ break;
+ case CADDY_CMD_CONFIG_WRITE_32:
+ dev = PCI_BDF(caddy_cmd->par[0],
+ caddy_cmd->par[1],
+ caddy_cmd->par[2]);
+ status = pci_write_config_dword(dev,
+ caddy_cmd->addr,
+ caddy_cmd->par[3]);
+ generate_answer(caddy_cmd, status, &result[0]);
+ break;
+ default:
+ status = 0xffffffff;
+ generate_answer(caddy_cmd, status, &result[0]);
+ break;
+ }
+ ptr = caddy_interface->cmd_out + 1;
+ ptr = ptr & (CMD_SIZE - 1);
+ caddy_interface->cmd_out = ptr;
+ }
+ caddy_interface->heartbeat++;
+ }
+ return 0;
+}
+
+U_BOOT_CMD(
+ caddy, 2, 0, do_caddy,
+ "Start Caddy server.",
+ "Start Caddy server with Data structure a given addr\n"
+ );
diff --git a/board/esd/vme8349/caddy.h b/board/esd/vme8349/caddy.h
new file mode 100644
index 0000000..d962a25
--- /dev/null
+++ b/board/esd/vme8349/caddy.h
@@ -0,0 +1,78 @@
+/*
+ * caddy.c -- esd VME8349 support for "missing" access modes in TSI148.
+ * Copyright (c) 2009 esd gmbh.
+ *
+ * Reinhard Arlt <reinhard.arlt@esd-electronics.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#ifndef __CADDY_H__
+#define __CADDY_H__
+
+#define CMD_SIZE 1024
+#define ANSWER_SIZE 1024
+#define CADDY_MAGIC "esd vme8349 V1.0"
+
+typedef enum {
+ CADDY_CMD_IO_READ_8,
+ CADDY_CMD_IO_READ_16,
+ CADDY_CMD_IO_READ_32,
+ CADDY_CMD_IO_WRITE_8,
+ CADDY_CMD_IO_WRITE_16,
+ CADDY_CMD_IO_WRITE_32,
+ CADDY_CMD_CONFIG_READ_8,
+ CADDY_CMD_CONFIG_READ_16,
+ CADDY_CMD_CONFIG_READ_32,
+ CADDY_CMD_CONFIG_WRITE_8,
+ CADDY_CMD_CONFIG_WRITE_16,
+ CADDY_CMD_CONFIG_WRITE_32,
+} CADDY_CMDS;
+
+
+typedef struct {
+ uint32_t cmd;
+ uint32_t issue;
+ uint32_t addr;
+ uint32_t par[5];
+} CADDY_CMD;
+
+typedef struct {
+ uint32_t answer;
+ uint32_t issue;
+ uint32_t status;
+ uint32_t par[5];
+} CADDY_ANSWER;
+
+typedef struct {
+ uint8_t magic[16];
+ uint32_t cmd_in;
+ uint32_t cmd_out;
+ uint32_t heartbeat;
+ uint32_t reserved1;
+ CADDY_CMD cmd[CMD_SIZE];
+ uint32_t answer_in;
+ uint32_t answer_out;
+ uint32_t reserved2;
+ uint32_t reserved3;
+ CADDY_ANSWER answer[CMD_SIZE];
+} CADDY_INTERFACE;
+
+#endif /* of __CADDY_H__ */
diff --git a/board/esd/vme8349/config.mk b/board/esd/vme8349/config.mk
new file mode 100644
index 0000000..db81061
--- /dev/null
+++ b/board/esd/vme8349/config.mk
@@ -0,0 +1,27 @@
+#
+# Copyright (c) 2009 esd gmbh hannover germany.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+#
+# VME8349E
+#
+
+TEXT_BASE = 0xFFF00000
diff --git a/board/esd/vme8349/pci.c b/board/esd/vme8349/pci.c
new file mode 100644
index 0000000..da6c183
--- /dev/null
+++ b/board/esd/vme8349/pci.c
@@ -0,0 +1,409 @@
+/*
+ * pci.c -- WindRiver SBC8349 PCI board support.
+ * Copyright (c) 2006 Wind River Systems, Inc.
+ *
+ * Based on MPC8349 PCI support but w/o PIB related code.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <asm/mmu.h>
+#include <common.h>
+#include <asm/global_data.h>
+#include <pci.h>
+#include <asm/mpc8349_pci.h>
+#include <i2c.h>
+#if defined(CONFIG_OF_LIBFDT)
+#include <libfdt.h>
+#include <fdt_support.h>
+#endif
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_PCI
+
+/* System RAM mapped to PCI space */
+#define CONFIG_PCI_SYS_MEM_BUS CONFIG_SYS_SDRAM_BASE
+#define CONFIG_PCI_SYS_MEM_PHYS CONFIG_SYS_SDRAM_BASE
+
+#ifndef CONFIG_PCI_PNP
+static struct pci_config_table pci_mpc8349emds_config_table[] = {
+ {PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
+ PCI_IDSEL_NUMBER, PCI_ANY_ID,
+ pci_cfgfunc_config_device, {PCI_ENET0_IOADDR,
+ PCI_ENET0_MEMADDR,
+ PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER
+ }
+ },
+ {}
+};
+#endif
+
+static struct pci_controller pci_hose[] = {
+ {
+#ifndef CONFIG_PCI_PNP
+ config_table:pci_mpc8349emds_config_table,
+#endif
+ },
+ {
+#ifndef CONFIG_PCI_PNP
+ config_table:pci_mpc8349emds_config_table,
+#endif
+ }
+};
+
+/**************************************************************************
+ * pci_init_board()
+ *
+ * NOTICE: PCI2 is not supported. There is only one
+ * physical PCI slot on the board.
+ *
+ */
+void
+pci_init_board(void)
+{
+ volatile immap_t *immr;
+ volatile clk83xx_t *clk;
+ volatile law83xx_t *pci_law;
+ volatile pot83xx_t *pci_pot;
+ volatile pcictrl83xx_t *pci_ctrl;
+ volatile pciconf83xx_t *pci_conf;
+ u8 reg8;
+ u16 reg16;
+ u32 reg32;
+ u32 dev;
+ u32 monarch;
+ struct pci_controller *hose;
+ int i;
+
+ immr = (immap_t *)CONFIG_SYS_IMMR;
+ monarch = 0;
+
+ clk = (clk83xx_t *)&immr->clk;
+ pci_law = immr->sysconf.pcilaw;
+ pci_pot = immr->ios.pot;
+ pci_ctrl = immr->pci_ctrl;
+ pci_conf = immr->pci_conf;
+
+ hose = &pci_hose[0];
+
+ /*
+ * Configure PCI controller and PCI_CLK_OUTPUT both in 66M mode
+ */
+
+ reg32 = clk->occr;
+ udelay(2000);
+
+ i2c_set_bus_num(1);
+ /* Read the PCI_M66EN jumper setting */
+ if ((i2c_read(CONFIG_SYS_I2C_8574_ADDR2, 0, 0, ®8, sizeof(reg8)) == 0) ||
+ (i2c_read(0x38 , 0, 0, ®8, sizeof(reg8)) == 0)) {
+ if (reg8 & 0x40) {
+ clk->occr = 0xff000000; /* 66 MHz PCI */
+ printf("PCI: 66MHz\n");
+ } else {
+ clk->occr = 0xffff0003; /* 33 MHz PCI */
+ printf("PCI: 33MHz\n");
+ }
+ if (((reg8 & 0x01) == 0) || ((reg8 & 0x02) == 0))
+ monarch = 1;
+ } else {
+ clk->occr = 0xffff0003; /* 33 MHz PCI */
+ printf("PCI: 33MHz (I2C read failed)\n");
+ }
+ udelay(2000);
+
+ immr->gpio[0].dat |= 0x00800000;
+ immr->gpio[1].dat |= 0x00000000;
+ immr->gpio[0].dir |= 0x00800000;
+ immr->gpio[1].dir |= 0x08800000;
+ udelay(200);
+ immr->gpio[1].dat |= 0x08000000;
+ udelay(200);
+ immr->gpio[1].dat |= 0x08800000;
+ udelay(600000);
+ immr->gpio[1].dat &= ~0x00100000;
+
+ /*
+ * Release PCI RST Output signal
+ */
+ pci_ctrl[0].gcr = 0;
+ udelay(2000);
+ pci_ctrl[0].gcr = 1;
+
+#ifdef CONFIG_MPC83XX_PCI2
+ pci_ctrl[1].gcr = 0;
+ udelay(2000);
+ pci_ctrl[1].gcr = 1;
+#endif
+
+ /* We need to wait at least a 1sec based on PCI specs */
+ for (i = 0; i < 1000; ++i)
+ udelay(1000);
+
+ /*
+ * Configure PCI Local Access Windows
+ */
+ pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR;
+ pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_1G;
+
+ pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR;
+ pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_4M;
+
+ /*
+ * Configure PCI Outbound Translation Windows
+ */
+
+ /* PCI1 mem space - prefetch */
+ pci_pot[0].potar = (CONFIG_SYS_PCI1_MEM_BASE >> 12) & POTAR_TA_MASK;
+ pci_pot[0].pobar = (CONFIG_SYS_PCI1_MEM_PHYS >> 12) & POBAR_BA_MASK;
+ pci_pot[0].pocmr = POCMR_EN | POCMR_PREFETCH_EN |
+ (POCMR_CM_256M & POCMR_CM_MASK);
+
+ /* PCI1 IO space */
+ pci_pot[1].potar = (CONFIG_SYS_PCI1_IO_BASE >> 12) & POTAR_TA_MASK;
+ pci_pot[1].pobar = (CONFIG_SYS_PCI1_IO_PHYS >> 12) & POBAR_BA_MASK;
+ pci_pot[1].pocmr = POCMR_EN | POCMR_IO |
+ (POCMR_CM_1M & POCMR_CM_MASK);
+
+ /* PCI1 mmio - non-prefetch mem space */
+ pci_pot[2].potar = (CONFIG_SYS_PCI1_MMIO_BASE >> 12) & POTAR_TA_MASK;
+ pci_pot[2].pobar = (CONFIG_SYS_PCI1_MMIO_PHYS >> 12) & POBAR_BA_MASK;
+ pci_pot[2].pocmr = POCMR_EN |
+ (POCMR_CM_256M & POCMR_CM_MASK);
+
+ /*
+ * Configure PCI Inbound Translation Windows
+ */
+
+ /* we need RAM mapped to PCI space for the devices to
+ * access main memory */
+ pci_ctrl[0].pitar1 = 0x0;
+ pci_ctrl[0].pibar1 = 0x0;
+ pci_ctrl[0].piebar1 = 0x0;
+ pci_ctrl[0].piwar1 = PIWAR_EN | PIWAR_PF | PIWAR_RTT_SNOOP |
+ PIWAR_WTT_SNOOP | (__ilog2(gd->ram_size) - 1);
+
+ hose->first_busno = 0;
+ hose->last_busno = 0xff;
+
+ /* PCI memory prefetch space */
+ pci_set_region(hose->regions + 0,
+ CONFIG_SYS_PCI1_MEM_BASE,
+ CONFIG_SYS_PCI1_MEM_PHYS,
+ CONFIG_SYS_PCI1_MEM_SIZE,
+ PCI_REGION_MEM|PCI_REGION_PREFETCH);
+
+ /* PCI memory space */
+ pci_set_region(hose->regions + 1,
+ CONFIG_SYS_PCI1_MMIO_BASE,
+ CONFIG_SYS_PCI1_MMIO_PHYS,
+ CONFIG_SYS_PCI1_MMIO_SIZE,
+ PCI_REGION_MEM);
+
+ /* PCI IO space */
+ pci_set_region(hose->regions + 2,
+ CONFIG_SYS_PCI1_IO_BASE,
+ CONFIG_SYS_PCI1_IO_PHYS,
+ CONFIG_SYS_PCI1_IO_SIZE,
+ PCI_REGION_IO);
+
+ /* System memory space */
+ pci_set_region(hose->regions + 3,
+ CONFIG_PCI_SYS_MEM_BUS,
+ CONFIG_PCI_SYS_MEM_PHYS,
+ gd->ram_size,
+ PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
+
+ hose->region_count = 4;
+
+ pci_setup_indirect(hose,
+ (CONFIG_SYS_IMMR+0x8300),
+ (CONFIG_SYS_IMMR+0x8304));
+
+ pci_register_hose(hose);
+
+ /*
+ * Write to Command register
+ */
+ reg16 = 0xff;
+ dev = PCI_BDF(hose->first_busno, 0, 0);
+ pci_hose_read_config_word(hose, dev, PCI_COMMAND, ®16);
+ reg16 |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
+ pci_hose_write_config_word(hose, dev, PCI_COMMAND, reg16);
+
+ /*
+ * Clear non-reserved bits in status register.
+ */
+ pci_hose_write_config_word(hose, dev, PCI_STATUS, 0xffff);
+ pci_hose_write_config_byte(hose, dev, PCI_LATENCY_TIMER, 0x80);
+ pci_hose_write_config_byte(hose, dev, PCI_CACHE_LINE_SIZE, 0x08);
+
+
+ if (monarch == 0) {
+#ifdef CONFIG_PCI_SCAN_SHOW
+ printf("PCI: Bus Dev VenId DevId Class Int\n");
+#endif
+ /*
+ * Hose scan.
+ */
+ hose->last_busno = pci_hose_scan(hose);
+ pci_hose_write_config_dword(hose, 0, PCI_BASE_ADDRESS_0,
+ (u32)(CONFIG_SYS_PCI1_MEM_PHYS +
+ CONFIG_SYS_PCI1_MEM_SIZE -
+ 0x00100000));
+ }
+#ifdef CONFIG_MPC83XX_PCI2
+ hose = &pci_hose[1];
+
+ /*
+ * Configure PCI Outbound Translation Windows
+ */
+
+ /* PCI2 mem space - prefetch */
+ pci_pot[3].potar = (CONFIG_SYS_PCI2_MEM_BASE >> 12) & POTAR_TA_MASK;
+ pci_pot[3].pobar = (CONFIG_SYS_PCI2_MEM_PHYS >> 12) & POBAR_BA_MASK;
+ pci_pot[3].pocmr = POCMR_EN | POCMR_PCI2 | POCMR_PREFETCH_EN |
+ (POCMR_CM_256M & POCMR_CM_MASK);
+
+ /* PCI2 IO space */
+ pci_pot[4].potar = (CONFIG_SYS_PCI2_IO_BASE >> 12) & POTAR_TA_MASK;
+ pci_pot[4].pobar = (CONFIG_SYS_PCI2_IO_PHYS >> 12) & POBAR_BA_MASK;
+ pci_pot[4].pocmr = POCMR_EN | POCMR_PCI2 | POCMR_IO |
+ (POCMR_CM_1M & POCMR_CM_MASK);
+
+ /* PCI2 mmio - non-prefetch mem space */
+ pci_pot[5].potar = (CONFIG_SYS_PCI2_MMIO_BASE >> 12) & POTAR_TA_MASK;
+ pci_pot[5].pobar = (CONFIG_SYS_PCI2_MMIO_PHYS >> 12) & POBAR_BA_MASK;
+ pci_pot[5].pocmr = POCMR_EN | POCMR_PCI2 |
+ (POCMR_CM_256M & POCMR_CM_MASK);
+
+ /*
+ * Configure PCI Inbound Translation Windows
+ */
+
+ /* we need RAM mapped to PCI space for the devices to
+ * access main memory */
+ pci_ctrl[1].pitar1 = 0x0;
+ pci_ctrl[1].pibar1 = 0x0;
+ pci_ctrl[1].piebar1 = 0x0;
+ pci_ctrl[1].piwar1 = PIWAR_EN | PIWAR_PF | PIWAR_RTT_SNOOP |
+ PIWAR_WTT_SNOOP | (__ilog2(gd->ram_size) - 1);
+
+ hose->first_busno = pci_hose[0].last_busno + 1;
+ hose->last_busno = 0xff;
+
+ /* PCI memory prefetch space */
+ pci_set_region(hose->regions + 0,
+ CONFIG_SYS_PCI2_MEM_BASE,
+ CONFIG_SYS_PCI2_MEM_PHYS,
+ CONFIG_SYS_PCI2_MEM_SIZE,
+ PCI_REGION_MEM|PCI_REGION_PREFETCH);
+
+ /* PCI memory space */
+ pci_set_region(hose->regions + 1,
+ CONFIG_SYS_PCI2_MMIO_BASE,
+ CONFIG_SYS_PCI2_MMIO_PHYS,
+ CONFIG_SYS_PCI2_MMIO_SIZE,
+ PCI_REGION_MEM);
+
+ /* PCI IO space */
+ pci_set_region(hose->regions + 2,
+ CONFIG_SYS_PCI2_IO_BASE,
+ CONFIG_SYS_PCI2_IO_PHYS,
+ CONFIG_SYS_PCI2_IO_SIZE,
+ PCI_REGION_IO);
+
+ /* System memory space */
+ pci_set_region(hose->regions + 3,
+ CONFIG_PCI_SYS_MEM_BUS,
+ CONFIG_PCI_SYS_MEM_PHYS,
+ gd->ram_size,
+ PCI_REGION_MEM | PCI_REGION_MEMORY);
+
+ hose->region_count = 4;
+
+ pci_setup_indirect(hose,
+ (CONFIG_SYS_IMMR+0x8380),
+ (CONFIG_SYS_IMMR+0x8384));
+
+ pci_register_hose(hose);
+
+ /*
+ * Write to Command register
+ */
+ reg16 = 0xff;
+ dev = PCI_BDF(hose->first_busno, 0, 0);
+ pci_hose_read_config_word(hose, dev, PCI_COMMAND, ®16);
+ reg16 |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
+ pci_hose_write_config_word(hose, dev, PCI_COMMAND, reg16);
+
+ /*
+ * Clear non-reserved bits in status register.
+ */
+ pci_hose_write_config_word(hose, dev, PCI_STATUS, 0xffff);
+ pci_hose_write_config_byte(hose, dev, PCI_LATENCY_TIMER, 0x80);
+ pci_hose_write_config_byte(hose, dev, PCI_CACHE_LINE_SIZE, 0x08);
+
+ /*
+ * Hose scan.
+ */
+ hose->last_busno = pci_hose_scan(hose);
+#endif
+
+}
+
+#if defined(CONFIG_OF_LIBFDT)
+void ft_pci_setup(void *blob, bd_t *bd)
+{
+ int nodeoffset;
+ int tmp[2];
+ const char *path;
+
+ nodeoffset = fdt_path_offset(blob, "/aliases");
+ if (nodeoffset >= 0) {
+ path = fdt_getprop(blob, nodeoffset, "pci0", NULL);
+ if (path) {
+ tmp[0] = cpu_to_be32(pci_hose[0].first_busno);
+ tmp[1] = cpu_to_be32(pci_hose[0].last_busno);
+ do_fixup_by_path(blob, path, "bus-range",
+ &tmp, sizeof(tmp), 1);
+
+ tmp[0] = cpu_to_be32(gd->pci_clk);
+ do_fixup_by_path(blob, path, "clock-frequency",
+ &tmp, sizeof(tmp[0]), 1);
+ }
+#ifdef CONFIG_MPC83XX_PCI2
+ path = fdt_getprop(blob, nodeoffset, "pci1", NULL);
+ if (path) {
+ tmp[0] = cpu_to_be32(pci_hose[0].first_busno);
+ tmp[1] = cpu_to_be32(pci_hose[0].last_busno);
+ do_fixup_by_path(blob, path, "bus-range",
+ &tmp, sizeof(tmp), 1);
+
+ tmp[0] = cpu_to_be32(gd->pci_clk);
+ do_fixup_by_path(blob, path, "clock-frequency",
+ &tmp, sizeof(tmp[0]), 1);
+ }
+#endif
+ }
+}
+#endif /* CONFIG_OF_LIBFDT */
+#endif /* CONFIG_PCI */
diff --git a/board/esd/vme8349/vme8349.c b/board/esd/vme8349/vme8349.c
new file mode 100644
index 0000000..cd3d684
--- /dev/null
+++ b/board/esd/vme8349/vme8349.c
@@ -0,0 +1,129 @@
+/*
+ * vme8349.c -- esd VME8349 board support.
+ * Copyright (c) 2008-2009 esd gmbh.
+ *
+ * Reinhard Arlt <reinhard.arlt@esd-electronics.com>
+ * Based on board/mpc8349emds/mpc8349emds.c (and previous 834x releases.)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <common.h>
+#include <ioports.h>
+#include <mpc83xx.h>
+#include <asm/mpc8349_pci.h>
+#if defined(CONFIG_OF_LIBFDT)
+#include <libfdt.h>
+#endif
+#include <asm/mmu.h>
+
+void ddr_enable_ecc(unsigned int dram_size);
+
+int fixed_sdram(void)
+{
+ volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
+ u32 msize = 0;
+ u32 ddr_size;
+ u32 ddr_size_log2;
+
+ msize = CONFIG_SYS_DDR_SIZE;
+ for (ddr_size = msize << 20, ddr_size_log2 = 0;
+ (ddr_size > 1);
+ ddr_size = ddr_size>>1, ddr_size_log2++) {
+ if (ddr_size & 1)
+ return -1;
+ }
+
+ im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_SDRAM_BASE & 0xfffff000;
+ im->sysconf.ddrlaw[0].ar = LAWAR_EN | ((ddr_size_log2 - 1) & LAWAR_SIZE);
+
+#if (CONFIG_SYS_DDR_SIZE == 512)
+ im->ddr.csbnds[0].csbnds = 0x0000001f;
+#else
+#warning Currently any DDR size other than 512MiB is not supported
+#endif
+ im->ddr.cs_config[0] = CONFIG_SYS_DDR_CONFIG | 0x00330000;
+
+ /* currently we use only one CS, so disable the other banks */
+ im->ddr.csbnds[1].csbnds = 0x00000000;
+ im->ddr.csbnds[2].csbnds = 0x00000000;
+ im->ddr.csbnds[3].csbnds = 0x00000000;
+ im->ddr.cs_config[1] = 0;
+ im->ddr.cs_config[2] = 0;
+ im->ddr.cs_config[3] = 0;
+
+ im->ddr.timing_cfg_0 = CONFIG_SYS_DDR_TIMING_0;
+ im->ddr.timing_cfg_1 = CONFIG_SYS_DDR_TIMING_1;
+ im->ddr.timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2;
+ im->ddr.timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3;
+
+ im->ddr.sdram_cfg = 0x63000000;
+ im->ddr.sdram_cfg2 = 0x04061000;
+ im->ddr.sdram_mode = 0x07940242;
+ im->ddr.sdram_mode2 = 0x00000000;
+
+ im->ddr.sdram_interval = CONFIG_SYS_DDR_INTERVAL;
+ udelay(200);
+
+ /* enable DDR controller */
+ im->ddr.sdram_cfg |= SDRAM_CFG_MEM_EN;
+ return msize;
+}
+
+phys_size_t initdram(int board_type)
+{
+ volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
+ u32 msize = 0;
+
+ if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32)im)
+ return -1;
+
+ /* DDR SDRAM - Main SODIMM */
+ im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_BASE & LAWBAR_BAR;
+
+ msize = get_ram_size(0, fixed_sdram());
+
+#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
+ /*
+ * Initialize and enable DDR ECC.
+ */
+ ddr_enable_ecc(msize * 1024 * 1024);
+#endif
+
+ /* return total bus SDRAM size(bytes) -- DDR */
+ return msize * 1024 * 1024;
+}
+
+int checkboard(void)
+{
+ puts("Board: esd VME8349\n");
+
+ return 0;
+}
+
+#if defined(CONFIG_OF_BOARD_SETUP)
+void ft_board_setup(void *blob, bd_t *bd)
+{
+ ft_cpu_setup(blob, bd);
+#ifdef CONFIG_PCI
+ ft_pci_setup(blob, bd);
+#endif
+}
+#endif
diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c
index c20b981..393e44d 100644
--- a/drivers/pci/pci_auto.c
+++ b/drivers/pci/pci_auto.c
@@ -403,6 +403,7 @@ int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev)
PCI_DEV(dev));
break;
#endif
+#ifndef CONFIG_VME8349
#ifdef CONFIG_MPC834X
case PCI_CLASS_BRIDGE_OTHER:
/*
@@ -415,6 +416,7 @@ int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev)
pciauto_setup_device(hose, dev, 0, hose->pci_mem, hose->pci_prefetch, hose->pci_io);
break;
#endif
+#endif
default:
pciauto_setup_device(hose, dev, 6, hose->pci_mem, hose->pci_prefetch, hose->pci_io);
break;
diff --git a/include/configs/vme8349.h b/include/configs/vme8349.h
new file mode 100644
index 0000000..e7b4f35
--- /dev/null
+++ b/include/configs/vme8349.h
@@ -0,0 +1,638 @@
+/*
+ * esd vme8349 U-Boot configuration file.
+ * Copyright (c) 2008, 2009 esd gmbh Hannover Germany
+ *
+ * reinhard.arlt at esd-electronics.cd
+ * Based on the MPC8349EMDS config.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * vme8349 board configuration file.
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * High Level Configuration Options
+ */
+#define CONFIG_E300 1 /* E300 Family */
+#define CONFIG_MPC83XX 1 /* MPC83XX family */
+#define CONFIG_MPC834X 1 /* MPC834X family */
+#define CONFIG_MPC8349 1 /* MPC8349 specific */
+#define CONFIG_VME8349 1 /* ESD VME8349 board specific */
+
+#define CONFIG_PCI
+/* Don't enable PCI2 on vme834x - it doesn't exist physically. */
+#undef CONFIG_MPC83XX_PCI2 /* support for 2nd PCI controller */
+
+#define PCI_66M
+#ifdef PCI_66M
+#define CONFIG_83XX_CLKIN 66000000 /* in Hz */
+#else
+#define CONFIG_83XX_CLKIN 33000000 /* in Hz */
+#endif
+
+#ifndef CONFIG_SYS_CLK_FREQ
+#ifdef PCI_66M
+#define CONFIG_SYS_CLK_FREQ 66000000
+#define HRCWL_CSB_TO_CLKIN HRCWL_CSB_TO_CLKIN_4X1
+#else
+#define CONFIG_SYS_CLK_FREQ 33000000
+#define HRCWL_CSB_TO_CLKIN HRCWL_CSB_TO_CLKIN_8X1
+#endif
+#endif
+
+#define CONFIG_SYS_IMMR 0xE0000000
+
+#undef CONFIG_SYS_DRAM_TEST /* memory test, takes time */
+#define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest region */
+#define CONFIG_SYS_MEMTEST_END 0x00100000
+
+/*
+ * DDR Setup
+ */
+#define CONFIG_DDR_ECC /* only for ECC DDR module */
+#define CONFIG_DDR_ECC_CMD /* use DDR ECC user commands */
+#undef CONFIG_SPD_EEPROM /* dont use SPD EEPROM for DDR setup*/
+#define CONFIG_SYS_83XX_DDR_USES_CS0 /* esd; Fsl board uses CS2/CS3 */
+
+/*
+ * 32-bit data path mode.
+ *
+ * Please note that using this mode for devices with the real density of 64-bit
+ * effectively reduces the amount of available memory due to the effect of
+ * wrapping around while translating address to row/columns, for example in the
+ * 256MB module the upper 128MB get aliased with contents of the lower
+ * 128MB); normally this define should be used for devices with real 32-bit
+ * data path.
+ */
+#undef CONFIG_DDR_32BIT
+
+#define CONFIG_SYS_DDR_BASE 0x00000000 /* DDR is sys memory*/
+#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE
+#define CONFIG_SYS_DDR_SDRAM_BASE CONFIG_SYS_DDR_BASE
+#define CONFIG_SYS_DDR_SDRAM_CLK_CNTL (DDR_SDRAM_CLK_CNTL_SS_EN | \
+ DDR_SDRAM_CLK_CNTL_CLK_ADJUST_075)
+#define CONFIG_DDR_2T_TIMING
+
+/*
+ * Manually set up DDR parameters
+ */
+#define CONFIG_SYS_DDR_SIZE 512 /* MB */
+
+#if (CONFIG_SYS_DDR_SIZE == 512)
+#define CONFIG_SYS_DDR_CONFIG (CSCONFIG_EN | CSCONFIG_ROW_BIT_13 | \
+ CSCONFIG_COL_BIT_10 | CSCONFIG_BANK_BIT_3)
+#endif
+
+#define CONFIG_SYS_DDR_TIMING_0 0x00220802
+#define CONFIG_SYS_DDR_TIMING_1 0x39377322
+#define CONFIG_SYS_DDR_TIMING_2 0x2f9848ca /* P9-45,may need tuning */
+#define CONFIG_SYS_DDR_TIMING_3 0x00000000
+#define CONFIG_SYS_DDR_CONTROL 0xc2000000 /* unbuffered,no DYN_PWR */
+#define CONFIG_SYS_DDR_INTERVAL 0x04060100 /* autocharge,no open page */
+
+/* the default burst length is 4 - for 64-bit data path */
+#define CONFIG_SYS_DDR_MODE 0x00000022 /* DLL,normal,seq,4/2.5, 4 burst len */
+
+/*
+ * FLASH on the Local Bus
+ */
+#define CONFIG_SYS_FLASH_CFI /* use the Common Flash Interface */
+#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */
+#define CONFIG_SYS_FLASH_BASE 0xf8000000 /* start of FLASH */
+#define CONFIG_SYS_FLASH_SIZE 128 /* flash size in MB */
+/* #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
+
+#define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE | \
+ (2 << BR_PS_SHIFT) | /* 32bit wide */ \
+ BR_V) /* valid */
+
+#define CONFIG_SYS_OR0_PRELIM 0xF8006FF7 /* 128 MB flash size */
+#define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE
+#define CONFIG_SYS_LBLAWAR0_PRELIM 0x8000001A /* 128 MB window size */
+
+#define CONFIG_SYS_BR1_PRELIM (0xf0000000 | 0x00001801)
+#define CONFIG_SYS_OR1_PRELIM (0xffff8000 | 0x00000200)
+#define CONFIG_SYS_LBLAWBAR1_PRELIM 0xf0000000
+#define CONFIG_SYS_LBLAWAR1_PRELIM (0x80000000 | 0x0000000e)
+
+#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */
+#define CONFIG_SYS_MAX_FLASH_SECT 1024 /* sectors per device*/
+
+#undef CONFIG_SYS_FLASH_CHECKSUM
+#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase TO (ms) */
+#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write TO (ms) */
+
+#define CONFIG_SYS_MID_FLASH_JUMP 0x7F000000
+#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
+
+#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
+#define CONFIG_SYS_RAMBOOT
+#else
+#undef CONFIG_SYS_RAMBOOT
+#endif
+
+#define CONFIG_SYS_INIT_RAM_LOCK 1
+#define CONFIG_SYS_INIT_RAM_ADDR 0xF7000000 /* Initial RAM addr */
+#define CONFIG_SYS_INIT_RAM_END 0x1000 /* size */
+
+#define CONFIG_SYS_GBL_DATA_SIZE 0x100 /* size init data */
+#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - \
+ CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
+
+#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB */
+#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Malloc size */
+
+/*
+ * Local Bus LCRR and LBCR regs
+ * LCRR: DLL bypass, Clock divider is 4
+ * External Local Bus rate is
+ * CLKIN * HRCWL_CSB_TO_CLKIN / HRCWL_LCL_BUS_TO_SCB_CLK / LCRR_CLKDIV
+ */
+#define CONFIG_SYS_LCRR (LCRR_DBYP | LCRR_CLKDIV_4)
+#define CONFIG_SYS_LBC_LBCR 0x00000000
+
+#undef CONFIG_SYS_LB_SDRAM /* if board has SDRAM on local bus */
+
+/*
+ * Serial Port
+ */
+#define CONFIG_CONS_INDEX 1
+#undef CONFIG_SERIAL_SOFTWARE_FIFO
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
+
+#define CONFIG_SYS_BAUDRATE_TABLE \
+ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200}
+
+#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR + 0x4500)
+#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR + 0x4600)
+
+#define CONFIG_CMDLINE_EDITING /* add command line history */
+/* Use the HUSH parser */
+#define CONFIG_SYS_HUSH_PARSER
+#ifdef CONFIG_SYS_HUSH_PARSER
+#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
+#endif
+
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT
+#define CONFIG_OF_BOARD_SETUP
+#define CONFIG_OF_STDOUT_VIA_ALIAS
+
+/* I2C */
+#define CONFIG_I2C_MULTI_BUS
+#define CONFIG_HARD_I2C /* I2C with hardware support*/
+#undef CONFIG_SOFT_I2C /* I2C bit-banged */
+#define CONFIG_FSL_I2C
+#define CONFIG_I2C_CMD_TREE
+#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
+#define CONFIG_SYS_I2C_SLAVE 0x7F
+#define CONFIG_SYS_I2C_NOPROBES {{0, 0x69}} /* Don't probe these addrs */
+#define CONFIG_SYS_I2C1_OFFSET 0x3000
+#define CONFIG_SYS_I2C2_OFFSET 0x3100
+#define CONFIG_SYS_I2C_OFFSET CONFIG_SYS_I2C1_OFFSET
+/* could also use CONFIG_I2C_MULTI_BUS and CONFIG_SPD_BUS_NUM... */
+
+#define CONFIG_SYS_I2C_8574_ADDR2 0x20 /* I2C1, PCF8574 */
+
+/* TSEC */
+#define CONFIG_SYS_TSEC1_OFFSET 0x24000
+#define CONFIG_SYS_TSEC1 (CONFIG_SYS_IMMR + CONFIG_SYS_TSEC1_OFFSET)
+#define CONFIG_SYS_TSEC2_OFFSET 0x25000
+#define CONFIG_SYS_TSEC2 (CONFIG_SYS_IMMR + CONFIG_SYS_TSEC2_OFFSET)
+
+/*
+ * General PCI
+ * Addresses are mapped 1-1.
+ */
+#define CONFIG_SYS_PCI1_MEM_BASE 0x80000000
+#define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BASE
+#define CONFIG_SYS_PCI1_MEM_SIZE 0x10000000 /* 256M */
+#define CONFIG_SYS_PCI1_MMIO_BASE 0x90000000
+#define CONFIG_SYS_PCI1_MMIO_PHYS CONFIG_SYS_PCI1_MMIO_BASE
+#define CONFIG_SYS_PCI1_MMIO_SIZE 0x10000000 /* 256M */
+#define CONFIG_SYS_PCI1_IO_BASE 0x00000000
+#define CONFIG_SYS_PCI1_IO_PHYS 0xE2000000
+#define CONFIG_SYS_PCI1_IO_SIZE 0x00100000 /* 1M */
+
+#define CONFIG_SYS_PCI2_MEM_BASE 0xA0000000
+#define CONFIG_SYS_PCI2_MEM_PHYS CONFIG_SYS_PCI2_MEM_BASE
+#define CONFIG_SYS_PCI2_MEM_SIZE 0x10000000 /* 256M */
+#define CONFIG_SYS_PCI2_MMIO_BASE 0xB0000000
+#define CONFIG_SYS_PCI2_MMIO_PHYS CONFIG_SYS_PCI2_MMIO_BASE
+#define CONFIG_SYS_PCI2_MMIO_SIZE 0x10000000 /* 256M */
+#define CONFIG_SYS_PCI2_IO_BASE 0x00000000
+#define CONFIG_SYS_PCI2_IO_PHYS 0xE2100000
+#define CONFIG_SYS_PCI2_IO_SIZE 0x00100000 /* 1M */
+
+#if defined(CONFIG_PCI)
+
+#define PCI_64BIT
+#define PCI_ONE_PCI1
+#if defined(PCI_64BIT)
+#undef PCI_ALL_PCI1
+#undef PCI_TWO_PCI1
+#undef PCI_ONE_PCI1
+#endif
+
+#define CONFIG_NET_MULTI
+#define CONFIG_PCI_PNP /* do pci plug-and-play */
+
+#undef CONFIG_EEPRO100
+#undef CONFIG_TULIP
+
+#if !defined(CONFIG_PCI_PNP)
+ #define PCI_ENET0_IOADDR 0xFIXME
+ #define PCI_ENET0_MEMADDR 0xFIXME
+ #define PCI_IDSEL_NUMBER 0xFIXME
+#endif
+
+#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
+#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x1057 /* Motorola */
+
+#endif /* CONFIG_PCI */
+
+/*
+ * TSEC configuration
+ */
+#define CONFIG_TSEC_ENET /* TSEC ethernet support */
+
+#if defined(CONFIG_TSEC_ENET)
+#ifndef CONFIG_NET_MULTI
+#define CONFIG_NET_MULTI 1
+#endif
+
+#define CONFIG_GMII 1 /* MII PHY management */
+#define CONFIG_TSEC1 1
+#define CONFIG_TSEC1_NAME "TSEC0"
+#define CONFIG_TSEC2 1
+#define CONFIG_TSEC2_NAME "TSEC1"
+#define CONFIG_PHY_M88E1111 1
+#define TSEC1_PHY_ADDR 0x08
+#define TSEC2_PHY_ADDR 0x10
+#define TSEC1_PHYIDX 0
+#define TSEC2_PHYIDX 0
+#define TSEC1_FLAGS TSEC_GIGABIT
+#define TSEC2_FLAGS TSEC_GIGABIT
+
+/* Options are: TSEC[0-1] */
+#define CONFIG_ETHPRIME "TSEC0"
+
+#endif /* CONFIG_TSEC_ENET */
+
+/*
+ * Environment
+ */
+#ifndef CONFIG_SYS_RAMBOOT
+ #define CONFIG_ENV_IS_IN_FLASH
+ #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + 0xc0000)
+ #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K(one sector) for env */
+ #define CONFIG_ENV_SIZE 0x2000
+
+/* Address and size of Redundant Environment Sector */
+#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
+#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
+
+#else
+ #define CONFIG_SYS_NO_FLASH /* Flash is not usable now */
+ #define CONFIG_ENV_IS_NOWHERE /* Store ENV in memory only */
+ #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - 0x1000)
+ #define CONFIG_ENV_SIZE 0x2000
+#endif
+
+#define CONFIG_LOADS_ECHO /* echo on for serial download */
+#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DATE
+#define CONFIG_SYS_RTC_BUS_NUM 0x01
+#define CONFIG_SYS_I2C_RTC_ADDR 0x32
+#define CONFIG_RTC_RX8025
+#define CONFIG_CMD_TSI148
+
+#if defined(CONFIG_PCI)
+ #define CONFIG_CMD_PCI
+#endif
+
+#if defined(CONFIG_SYS_RAMBOOT)
+ #undef CONFIG_CMD_ENV
+ #undef CONFIG_CMD_LOADS
+#endif
+
+#define CONFIG_CMD_ELF
+/* Pass Ethernet MAC to VxWorks */
+#define CONFIG_SYS_VXWORKS_MAC_PTR 0x000043f0
+
+#undef CONFIG_WATCHDOG /* watchdog disabled */
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CONFIG_SYS_LONGHELP /* undef to save memory */
+#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
+#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
+
+#if defined(CONFIG_CMD_KGDB)
+ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
+#else
+ #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
+#endif
+
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_MAXARGS 16 /* max num of command args */
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buf Size */
+#define CONFIG_SYS_HZ 1000 /* decr freq: 1ms ticks */
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization.
+ */
+#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Init Memory map for Linux*/
+
+#define CONFIG_SYS_RCWH_PCIHOST 0x80000000 /* PCIHOST */
+
+#if 1 /*528/264*/
+#define CONFIG_SYS_HRCW_LOW (\
+ HRCWL_LCL_BUS_TO_SCB_CLK_1X1 |\
+ HRCWL_DDR_TO_SCB_CLK_1X1 |\
+ HRCWL_CSB_TO_CLKIN |\
+ HRCWL_VCO_1X2 |\
+ HRCWL_CORE_TO_CSB_2X1)
+#elif 0 /*396/132*/
+#define CONFIG_SYS_HRCW_LOW (\
+ HRCWL_LCL_BUS_TO_SCB_CLK_1X1 |\
+ HRCWL_DDR_TO_SCB_CLK_1X1 |\
+ HRCWL_CSB_TO_CLKIN |\
+ HRCWL_VCO_1X4 |\
+ HRCWL_CORE_TO_CSB_3X1)
+#elif 0 /*264/132*/
+#define CONFIG_SYS_HRCW_LOW (\
+ HRCWL_LCL_BUS_TO_SCB_CLK_1X1 |\
+ HRCWL_DDR_TO_SCB_CLK_1X1 |\
+ HRCWL_CSB_TO_CLKIN |\
+ HRCWL_VCO_1X4 |\
+ HRCWL_CORE_TO_CSB_2X1)
+#elif 0 /*132/132*/
+#define CONFIG_SYS_HRCW_LOW (\
+ HRCWL_LCL_BUS_TO_SCB_CLK_1X1 |\
+ HRCWL_DDR_TO_SCB_CLK_1X1 |\
+ HRCWL_CSB_TO_CLKIN |\
+ HRCWL_VCO_1X4 |\
+ HRCWL_CORE_TO_CSB_1X1)
+#elif 0 /*264/264 */
+#define CONFIG_SYS_HRCW_LOW (\
+ HRCWL_LCL_BUS_TO_SCB_CLK_1X1 |\
+ HRCWL_DDR_TO_SCB_CLK_1X1 |\
+ HRCWL_CSB_TO_CLKIN |\
+ HRCWL_VCO_1X4 |\
+ HRCWL_CORE_TO_CSB_1X1)
+#endif
+
+#if defined(PCI_64BIT)
+#define CONFIG_SYS_HRCW_HIGH (\
+ HRCWH_PCI_HOST |\
+ HRCWH_64_BIT_PCI |\
+ HRCWH_PCI1_ARBITER_ENABLE |\
+ HRCWH_PCI2_ARBITER_DISABLE |\
+ HRCWH_CORE_ENABLE |\
+ HRCWH_FROM_0X00000100 |\
+ HRCWH_BOOTSEQ_DISABLE |\
+ HRCWH_SW_WATCHDOG_DISABLE |\
+ HRCWH_ROM_LOC_LOCAL_16BIT |\
+ HRCWH_TSEC1M_IN_GMII |\
+ HRCWH_TSEC2M_IN_GMII)
+#else
+#define CONFIG_SYS_HRCW_HIGH (\
+ HRCWH_PCI_HOST |\
+ HRCWH_32_BIT_PCI |\
+ HRCWH_PCI1_ARBITER_ENABLE |\
+ HRCWH_PCI2_ARBITER_ENABLE |\
+ HRCWH_CORE_ENABLE |\
+ HRCWH_FROM_0X00000100 |\
+ HRCWH_BOOTSEQ_DISABLE |\
+ HRCWH_SW_WATCHDOG_DISABLE |\
+ HRCWH_ROM_LOC_LOCAL_16BIT |\
+ HRCWH_TSEC1M_IN_GMII |\
+ HRCWH_TSEC2M_IN_GMII)
+#endif
+
+/* System IO Config */
+#define CONFIG_SYS_SICRH SICRH_TSOBI1
+#define CONFIG_SYS_SICRL SICRL_LDP_A
+
+#define CONFIG_SYS_HID0_INIT 0x000000000
+#define CONFIG_SYS_HID0_FINAL HID0_ENABLE_MACHINE_CHECK
+
+#define CONFIG_SYS_HID2 HID2_HBE
+
+#define CONFIG_SYS_GPIO1_PRELIM
+#define CONFIG_SYS_GPIO1_DIR 0x00100000
+#define CONFIG_SYS_GPIO1_DAT 0x00100000
+
+#define CONFIG_SYS_GPIO2_PRELIM
+#define CONFIG_SYS_GPIO2_DIR 0x78900000
+#define CONFIG_SYS_GPIO2_DAT 0x70100000
+
+#define CONFIG_HIGH_BATS /* High BATs supported */
+
+/* DDR @ 0x00000000 */
+#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_10 | \
+ BATL_MEMCOHERENCE)
+#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE | BATU_BL_256M | \
+ BATU_VS | BATU_VP)
+
+/* PCI @ 0x80000000 */
+#ifdef CONFIG_PCI
+#define CONFIG_SYS_IBAT1L (CONFIG_SYS_PCI1_MEM_BASE | BATL_PP_10 | \
+ BATL_MEMCOHERENCE)
+#define CONFIG_SYS_IBAT1U (CONFIG_SYS_PCI1_MEM_BASE | BATU_BL_256M | \
+ BATU_VS | BATU_VP)
+#define CONFIG_SYS_IBAT2L (CONFIG_SYS_PCI1_MMIO_BASE | BATL_PP_10 | \
+ BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
+#define CONFIG_SYS_IBAT2U (CONFIG_SYS_PCI1_MMIO_BASE | BATU_BL_256M | \
+ BATU_VS | BATU_VP)
+#else
+#define CONFIG_SYS_IBAT1L (0)
+#define CONFIG_SYS_IBAT1U (0)
+#define CONFIG_SYS_IBAT2L (0)
+#define CONFIG_SYS_IBAT2U (0)
+#endif
+
+#ifdef CONFIG_MPC83XX_PCI2
+#define CONFIG_SYS_IBAT3L (CONFIG_SYS_PCI2_MEM_BASE | BATL_PP_10 | \
+ BATL_MEMCOHERENCE)
+#define CONFIG_SYS_IBAT3U (CONFIG_SYS_PCI2_MEM_BASE | BATU_BL_256M | \
+ BATU_VS | BATU_VP)
+#define CONFIG_SYS_IBAT4L (CONFIG_SYS_PCI2_MMIO_BASE | BATL_PP_10 | \
+ BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
+#define CONFIG_SYS_IBAT4U (CONFIG_SYS_PCI2_MMIO_BASE | BATU_BL_256M | \
+ BATU_VS | BATU_VP)
+#else
+#define CONFIG_SYS_IBAT3L (0)
+#define CONFIG_SYS_IBAT3U (0)
+#define CONFIG_SYS_IBAT4L (0)
+#define CONFIG_SYS_IBAT4U (0)
+#endif
+
+/* IMMRBAR @ 0xE0000000, PCI IO @ 0xE2000000 */
+#define CONFIG_SYS_IBAT5L (CONFIG_SYS_IMMR | BATL_PP_10 | \
+ BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
+#define CONFIG_SYS_IBAT5U (CONFIG_SYS_IMMR | BATU_BL_256M | \
+ BATU_VS | BATU_VP)
+
+#define CONFIG_SYS_IBAT6L (0xF0000000 | BATL_PP_10 | BATL_MEMCOHERENCE)
+#define CONFIG_SYS_IBAT6U (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP)
+
+#if (CONFIG_SYS_DDR_SIZE == 512)
+#define CONFIG_SYS_IBAT7L (CONFIG_SYS_SDRAM_BASE+0x10000000 | \
+ BATL_PP_10 | BATL_MEMCOHERENCE)
+#define CONFIG_SYS_IBAT7U (CONFIG_SYS_SDRAM_BASE+0x10000000 | \
+ BATU_BL_256M | BATU_VS | BATU_VP)
+#else
+#define CONFIG_SYS_IBAT7L (0)
+#define CONFIG_SYS_IBAT7U (0)
+#endif
+
+#define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
+#define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U
+#define CONFIG_SYS_DBAT1L CONFIG_SYS_IBAT1L
+#define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U
+#define CONFIG_SYS_DBAT2L CONFIG_SYS_IBAT2L
+#define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U
+#define CONFIG_SYS_DBAT3L CONFIG_SYS_IBAT3L
+#define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U
+#define CONFIG_SYS_DBAT4L CONFIG_SYS_IBAT4L
+#define CONFIG_SYS_DBAT4U CONFIG_SYS_IBAT4U
+#define CONFIG_SYS_DBAT5L CONFIG_SYS_IBAT5L
+#define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U
+#define CONFIG_SYS_DBAT6L CONFIG_SYS_IBAT6L
+#define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U
+#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
+#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
+
+/*
+ * Internal Definitions
+ *
+ * Boot Flags
+ */
+#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
+#define BOOTFLAG_WARM 0x02 /* Software reboot */
+
+#if defined(CONFIG_CMD_KGDB)
+#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
+#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
+#endif
+
+/*
+ * Environment Configuration
+ */
+#define CONFIG_ENV_OVERWRITE
+
+#if defined(CONFIG_TSEC_ENET)
+#define CONFIG_HAS_ETH0
+#define CONFIG_ETHADDR 00:a0:1e:a0:13:8d
+#define CONFIG_HAS_ETH1
+#define CONFIG_ETH1ADDR 00:a0:1e:a0:13:8e
+#endif
+
+#define CONFIG_IPADDR 192.168.1.234
+
+#define CONFIG_HOSTNAME VME8349
+#define CONFIG_ROOTPATH /tftpboot/rootfs
+#define CONFIG_BOOTFILE uImage
+
+#define CONFIG_SERVERIP 192.168.1.1
+#define CONFIG_GATEWAYIP 192.168.1.1
+#define CONFIG_NETMASK 255.255.255.0
+
+#define CONFIG_LOADADDR 500000 /* def location for tftp and bootm */
+
+#define CONFIG_BOOTDELAY 6 /* -1 disables auto-boot */
+#undef CONFIG_BOOTARGS /* boot command will set bootargs */
+
+#define CONFIG_BAUDRATE 115200
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "netdev=eth0\0" \
+ "hostname=vme8349\0" \
+ "nfsargs=setenv bootargs root=/dev/nfs rw " \
+ "nfsroot=${serverip}:${rootpath}\0" \
+ "ramargs=setenv bootargs root=/dev/ram rw\0" \
+ "addip=setenv bootargs ${bootargs} " \
+ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
+ ":${hostname}:${netdev}:off panic=1\0" \
+ "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0"\
+ "flash_nfs=run nfsargs addip addtty;" \
+ "bootm ${kernel_addr}\0" \
+ "flash_self=run ramargs addip addtty;" \
+ "bootm ${kernel_addr} ${ramdisk_addr}\0" \
+ "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addtty;" \
+ "bootm\0" \
+ "load=tftp 100000 /tftpboot/bdi2000/vme8349.bin\0" \
+ "update=protect off fff00000 fff3ffff; " \
+ "era fff00000 fff3ffff; cp.b 100000 fff00000 ${filesize}\0" \
+ "upd=run load update\0" \
+ "fdtaddr=400000\0" \
+ "fdtfile=vme8349.dtb\0" \
+ ""
+
+#define CONFIG_NFSBOOTCOMMAND \
+ "setenv bootargs root=/dev/nfs rw " \
+ "nfsroot=$serverip:$rootpath " \
+ "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
+ "console=$consoledev,$baudrate $othbootargs;" \
+ "tftp $loadaddr $bootfile;" \
+ "tftp $fdtaddr $fdtfile;" \
+ "bootm $loadaddr - $fdtaddr"
+
+#define CONFIG_RAMBOOTCOMMAND \
+ "setenv bootargs root=/dev/ram rw " \
+ "console=$consoledev,$baudrate $othbootargs;" \
+ "tftp $ramdiskaddr $ramdiskfile;" \
+ "tftp $loadaddr $bootfile;" \
+ "tftp $fdtaddr $fdtfile;" \
+ "bootm $loadaddr $ramdiskaddr $fdtaddr"
+
+#define CONFIG_BOOTCOMMAND "run flash_self"
+
+#endif /* __CONFIG_H */
--
1.6.3.2
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH] mpc83xx: Add esd VME8349 board support
2009-06-10 17:09 [U-Boot] [PATCH] mpc83xx: Add esd VME8349 board support Stefan Roese
@ 2009-06-11 15:15 ` Kim Phillips
2009-07-21 9:38 ` Stefan Roese
0 siblings, 1 reply; 6+ messages in thread
From: Kim Phillips @ 2009-06-11 15:15 UTC (permalink / raw)
To: u-boot
On Wed, 10 Jun 2009 19:09:48 +0200
Stefan Roese <sr@denx.de> wrote:
> From: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
>
> From: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
>
> This patch adds support for the esd VME8349 board equipped with the
> MPC8349. It's a VME PMC carrier board equipped with the Tundra
> TSI148 VME-bridge.
>
> Signed-off-by: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
> Signed-off-by: Stefan Roese <sr@denx.de>
> ---
> MAINTAINERS | 2 +
> MAKEALL | 1 +
> Makefile | 2 +
> board/esd/vme8349/Makefile | 49 ++++
> board/esd/vme8349/aduc.c | 522 +++++++++++++++++++++++++++++++++++
> board/esd/vme8349/caddy.c | 203 ++++++++++++++
> board/esd/vme8349/caddy.h | 78 ++++++
> board/esd/vme8349/config.mk | 27 ++
> board/esd/vme8349/pci.c | 409 +++++++++++++++++++++++++++
> board/esd/vme8349/vme8349.c | 129 +++++++++
> drivers/pci/pci_auto.c | 2 +
> include/configs/vme8349.h | 638 +++++++++++++++++++++++++++++++++++++++++++
might want to add a doc/README.vme8349 at some point.
> +++ b/board/esd/vme8349/Makefile
> @@ -0,0 +1,49 @@
> +#
> +# Copyright (c) 2009 esd gmbh hannover germany.
I sincerely doubt esd wrote this file from scratch - please retain
original copyrights.
> +++ b/board/esd/vme8349/aduc.c
> @@ -0,0 +1,522 @@
> +/*
> + * aduc.c -- esd VME8349 board support for aduc848 monitor.
> + * Copyright (c) 2008-2009 esd gmbh.
> + *
> + * Reinhard Arlt <reinhard.arlt@esd-electronics.com>
> + * Based on board/mpc8349emds/mpc8349emds.c (and previous 834x releases.)
this suggests a similar comment to mine above...and, er...there were no
'previous 834x releases' -- that was the first (it was renamed from
ads). Now it'sunder board/freescale, btw.
> +static uint8_t aduc_execute_long(uint8_t par0, uint8_t par1, uint8_t cmd, uint32_t timeout)
> +{
> + uint32_t l;
> + unsigned char cmmd[8];
> +
> + cmmd[0] = 0;
> + cmmd[1] = 3;
> + cmmd[2] = par0;
> + cmmd[3] = par1;
> + cmmd[4] = cmd;
> +
> + if (i2c_write(0x78, 0x40, 1, (unsigned char *)cmmd, 5) != 0) {
too many magic numbers...please use macros to define these constants.
> + printf("i2c_write cmmd failed\n");
> + I2C_SET_BUS(old_bus);
> + return 0xfe;
ditto
> + }
> + i2c_read(0x78, 0x40, 1, (unsigned char *)cmmd, 1);
ditto
> + cmmd[0] = 0x00;
> + for (l = 1; (l < timeout) && (cmmd[0] == 0); l++) {
> + if (i2c_read(0x78, 0x40, 1, (unsigned char *)cmmd, 1) != 0) {
ditto..you get the idea
> +static uint8_t aduc_execute(uint8_t par0, uint8_t par1, uint8_t cmd)
> +{
> + return aduc_execute_long(par0, par1, cmd, 600);
> +}
don't see the purpose of this - rename aduc_execute_long() to
aduc_execute(), after having swallowed the default timeout value?
> +int aduc_download_block(unsigned long addr, unsigned long len)
> +{
> + unsigned char buf[10];
> + unsigned long m;
> +
> + m = addr;
m = addr;
add a newline if you feel that it 'looks misaligned' (I don't).
> + for (m = 0; m < 50; m++) {
> + if (i2c_read(0x78, 0x40, 1, buf, 1) != 0) {
> + printf("i2c_read status failed\n");
> + return 3;
> + }
> + if (buf[0] == 0xff)
> + udelay(100000);
> + else if (buf[0] == 0)
> + return 0;
> + else
> + return 4;
> + }
> + return 5;
not reached? wait, does that loop ever execute more than once? please
clean this up.
> +int do_show_aduc(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
> +{
> + uchar buf[32];
> + int old_bus;
> +
> + old_bus = I2C_GET_BUS();
can add assignment to declaration above
> + I2C_SET_BUS(1);
> +
> + if (i2c_read(0x78, 0, 1, buf, 32) != 0) {
> + printf("Error reading from ADUC\n");
no error return?
> +int do_cmd_aduc(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
> +{
> + uint8_t par0, par1, cmd, stat;
> +
> + if (argc < 4) {
> + puts("Missing parameter\n");
> + return 1;
> + }
> +
> + par0 = simple_strtoul(argv[1], NULL, 16);
> + par1 = simple_strtoul(argv[2], NULL, 16);
> + cmd = simple_strtoul(argv[3], NULL, 16);
> +
> + printf("%02x %02x %02x\n", par0, par1, cmd);
> +
> + old_bus = I2C_GET_BUS();
> + I2C_SET_BUS(1);
> +
> + stat = aduc_execute(par0, par1, cmd);
> +
> + printf("\n");
> + if (stat != 0x01)
> + printf("Got status %02x\n", stat);
> + I2C_SET_BUS(old_bus);
> + return 0;
blank line before the return please.
did you also want to return stat?
> +}
> +
> +
take one from here :)
> +int do_fpga_aduc(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
> +{
> + uint8_t stat;
> + uint8_t buffer[512 + 16];
> + unsigned long addr;
> + unsigned long size;
> + const unsigned char *fpgadata;
> + int i, index, len;
please don't align declarations like this - if a type is added with a
longer name, all lines have to be modified, reducing patch
reviewability. Some vars can be regrouped on the same line here, too.
> + fpgadata = (const unsigned char *)addr;
> +/* display infos on fpgaimage */
alignment. fyi, "infos" is franglais. In English, it's just "info".
> + index = 15;
> + for (i = 0; i < 4; i++) {
> + len = fpgadata[index];
> + printf("FPGA: %s\n", &(fpgadata[index + 1]));
> + index += len + 3;
> + }
> +
> +/* search for preamble 0xFFFFFFFF */
alignment
> + I2C_SET_BUS(old_bus);
> + return 0;
blank line before return please
> +int do_image_aduc(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
there is a lot of code this function has in common with do_fpga_aduc()
- please refactor.
> +int do_load_aduc(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
> +{
> + int slot;
> + uint8_t stat;
> +
> + slot = simple_strtoul(argv[1], NULL, 16);
> +
> + old_bus = I2C_GET_BUS();
> + I2C_SET_BUS(1);
> +
> +/* Load slot from FLASH to FPGA */
alignment
> + stat = aduc_execute_long(slot, 0x00, 0x04, 30000);
> + printf("\n");
> + if (stat != 0x01) {
> + printf("Got status at LOAD_SLOT:%02x\n", stat);
> + I2C_SET_BUS(old_bus);
> + return 1;
> + }
> + I2C_SET_BUS(old_bus);
insert blank line here please
> + return 0;
if aduc_execute returns 0 on success, just make the stat check do the
printf, set the bus to the old bus once, and return stat.
> diff --git a/board/esd/vme8349/caddy.c b/board/esd/vme8349/caddy.c
> + while (ctrlc() == 0) {
> + if (caddy_interface->cmd_in != caddy_interface->cmd_out) {
> + CADDY_CMD *caddy_cmd;
> + uint32_t result[5];
> + uint16_t data16;
> + uint8_t data8;
> + uint32_t status;
> + pci_dev_t dev;
regroup, don't align.
would it be easier to read if these were at the top level of the
function (here and elsewhere)?
> + result[0] = 0;
> + result[1] = 0;
> + result[2] = 0;
> + result[3] = 0;
> + result[4] = 0;
memset?
> +U_BOOT_CMD(
> + caddy, 2, 0, do_caddy,
> + "Start Caddy server.",
> + "Start Caddy server with Data structure a given addr\n"
> + );
> diff --git a/board/esd/vme8349/caddy.h b/board/esd/vme8349/caddy.h
> +typedef enum {
> + CADDY_CMD_IO_READ_8,
> + CADDY_CMD_IO_READ_16,
> + CADDY_CMD_IO_READ_32,
> + CADDY_CMD_IO_WRITE_8,
> + CADDY_CMD_IO_WRITE_16,
> + CADDY_CMD_IO_WRITE_32,
> + CADDY_CMD_CONFIG_READ_8,
> + CADDY_CMD_CONFIG_READ_16,
> + CADDY_CMD_CONFIG_READ_32,
> + CADDY_CMD_CONFIG_WRITE_8,
> + CADDY_CMD_CONFIG_WRITE_16,
> + CADDY_CMD_CONFIG_WRITE_32,
> +} CADDY_CMDS;
> +
> +
> +typedef struct {
> + uint32_t cmd;
> + uint32_t issue;
> + uint32_t addr;
> + uint32_t par[5];
> +} CADDY_CMD;
> +
> +typedef struct {
> + uint32_t answer;
> + uint32_t issue;
> + uint32_t status;
> + uint32_t par[5];
> +} CADDY_ANSWER;
> +
> +typedef struct {
> + uint8_t magic[16];
> + uint32_t cmd_in;
> + uint32_t cmd_out;
> + uint32_t heartbeat;
> + uint32_t reserved1;
> + CADDY_CMD cmd[CMD_SIZE];
> + uint32_t answer_in;
> + uint32_t answer_out;
> + uint32_t reserved2;
> + uint32_t reserved3;
> + CADDY_ANSWER answer[CMD_SIZE];
> +} CADDY_INTERFACE;
please remove all typedefs (see CodingStyle Ch. 5). Use 'struct xxx'
in each instance instead.
> +++ b/board/esd/vme8349/config.mk
> @@ -0,0 +1,27 @@
> +#
> +# Copyright (c) 2009 esd gmbh hannover germany.
please respect the original copyright holder(s).
> diff --git a/board/esd/vme8349/pci.c b/board/esd/vme8349/pci.c
> +#ifdef CONFIG_PCI
> +
> +/* System RAM mapped to PCI space */
> +#define CONFIG_PCI_SYS_MEM_BUS CONFIG_SYS_SDRAM_BASE
> +#define CONFIG_PCI_SYS_MEM_PHYS CONFIG_SYS_SDRAM_BASE
> +
> +#ifndef CONFIG_PCI_PNP
> +static struct pci_config_table pci_mpc8349emds_config_table[] = {
please convert to use 83XX_GENERIC_PCI code.
> diff --git a/board/esd/vme8349/vme8349.c b/board/esd/vme8349/vme8349.c
> new file mode 100644
> index 0000000..cd3d684
> --- /dev/null
> +++ b/board/esd/vme8349/vme8349.c
> @@ -0,0 +1,129 @@
> +/*
> + * vme8349.c -- esd VME8349 board support.
> + * Copyright (c) 2008-2009 esd gmbh.
respect original copyright holders please
> diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c
> index c20b981..393e44d 100644
> --- a/drivers/pci/pci_auto.c
> +++ b/drivers/pci/pci_auto.c
> @@ -403,6 +403,7 @@ int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev)
> PCI_DEV(dev));
> break;
> #endif
> +#ifndef CONFIG_VME8349
> #ifdef CONFIG_MPC834X
#if defined(CONFIG_MPC834x) && !defined(CONFIG_VME8349)
I don't know - this might need to be changed to ifdef
CONFIG_MPC8349EMDS...
> case PCI_CLASS_BRIDGE_OTHER:
> /*
> +++ b/include/configs/vme8349.h
> @@ -0,0 +1,638 @@
> +/*
> + * esd vme8349 U-Boot configuration file.
> + * Copyright (c) 2008, 2009 esd gmbh Hannover Germany
> + *
> + * reinhard.arlt at esd-electronics.cd
> + * Based on the MPC8349EMDS config.
right, but you didn't carry the copyrights with the code :(.
> +/*
> + * High Level Configuration Options
> + */
> +#define CONFIG_E300 1 /* E300 Family */
> +#define CONFIG_MPC83XX 1 /* MPC83XX family */
> +#define CONFIG_MPC834X 1 /* MPC834X family */
this is now CONFIG_MPC83xx. please rebase on top of u-boot-mpc83xx'
next branch.
> +/* System IO Config */
> +#define CONFIG_SYS_SICRH SICRH_TSOBI1
I'm guessing this is copied and should be 0 (see latest commit on
mpc83xx' master).
> +/*
> + * Environment Configuration
> + */
> +#define CONFIG_ENV_OVERWRITE
> +
> +#if defined(CONFIG_TSEC_ENET)
> +#define CONFIG_HAS_ETH0
> +#define CONFIG_ETHADDR 00:a0:1e:a0:13:8d
> +#define CONFIG_HAS_ETH1
> +#define CONFIG_ETH1ADDR 00:a0:1e:a0:13:8e
> +#endif
> +
> +#define CONFIG_IPADDR 192.168.1.234
> +
we don't hardcode mac & ip addresses any more - please remove.
Thanks,
Kim
^ permalink raw reply [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH] mpc83xx: Add esd VME8349 board support
2009-06-11 15:15 ` Kim Phillips
@ 2009-07-21 9:38 ` Stefan Roese
2009-07-21 19:08 ` Kim Phillips
2009-07-22 9:28 ` Wolfgang Denk
0 siblings, 2 replies; 6+ messages in thread
From: Stefan Roese @ 2009-07-21 9:38 UTC (permalink / raw)
To: u-boot
Kim,
On Thursday 11 June 2009 17:15:48 Kim Phillips wrote:
> On Wed, 10 Jun 2009 19:09:48 +0200
>
> Stefan Roese <sr@denx.de> wrote:
> > From: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
> >
> > From: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
> >
> > This patch adds support for the esd VME8349 board equipped with the
> > MPC8349. It's a VME PMC carrier board equipped with the Tundra
> > TSI148 VME-bridge.
> >
> > Signed-off-by: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
> > Signed-off-by: Stefan Roese <sr@denx.de>
> > ---
> > MAINTAINERS | 2 +
> > MAKEALL | 1 +
> > Makefile | 2 +
> > board/esd/vme8349/Makefile | 49 ++++
> > board/esd/vme8349/aduc.c | 522 +++++++++++++++++++++++++++++++++++
> > board/esd/vme8349/caddy.c | 203 ++++++++++++++
> > board/esd/vme8349/caddy.h | 78 ++++++
> > board/esd/vme8349/config.mk | 27 ++
> > board/esd/vme8349/pci.c | 409 +++++++++++++++++++++++++++
> > board/esd/vme8349/vme8349.c | 129 +++++++++
> > drivers/pci/pci_auto.c | 2 +
> > include/configs/vme8349.h | 638
> > +++++++++++++++++++++++++++++++++++++++++++
>
> might want to add a doc/README.vme8349 at some point.
Currently not planned. I have to admit that I usually don't add such a readme.
It's not an evaluation board after all.
> > +++ b/board/esd/vme8349/Makefile
> > @@ -0,0 +1,49 @@
> > +#
> > +# Copyright (c) 2009 esd gmbh hannover germany.
>
> I sincerely doubt esd wrote this file from scratch - please retain
> original copyrights.
OK, will do.
> > +++ b/board/esd/vme8349/aduc.c
> > @@ -0,0 +1,522 @@
> > +/*
> > + * aduc.c -- esd VME8349 board support for aduc848 monitor.
> > + * Copyright (c) 2008-2009 esd gmbh.
> > + *
> > + * Reinhard Arlt <reinhard.arlt@esd-electronics.com>
> > + * Based on board/mpc8349emds/mpc8349emds.c (and previous 834x
> > releases.)
>
> this suggests a similar comment to mine above...and, er...there were no
> 'previous 834x releases' -- that was the first (it was renamed from
> ads). Now it'sunder board/freescale, btw.
This file written from scratch. Only the copyright header was copied. I'll
clean up the header in the next version.
> > +static uint8_t aduc_execute_long(uint8_t par0, uint8_t par1, uint8_t
> > cmd, uint32_t timeout) +{
> > + uint32_t l;
> > + unsigned char cmmd[8];
> > +
> > + cmmd[0] = 0;
> > + cmmd[1] = 3;
> > + cmmd[2] = par0;
> > + cmmd[3] = par1;
> > + cmmd[4] = cmd;
> > +
> > + if (i2c_write(0x78, 0x40, 1, (unsigned char *)cmmd, 5) != 0) {
>
> too many magic numbers...please use macros to define these constants.
All your comments to this file are valid remarks. Thanks. This file was work-
in-progress at the time I first published the patches. I'll remove this file
in the next version. It will be added when its finally finished.
<snip>
> > diff --git a/board/esd/vme8349/caddy.c b/board/esd/vme8349/caddy.c
> >
> > + while (ctrlc() == 0) {
> > + if (caddy_interface->cmd_in != caddy_interface->cmd_out) {
> > + CADDY_CMD *caddy_cmd;
> > + uint32_t result[5];
> > + uint16_t data16;
> > + uint8_t data8;
> > + uint32_t status;
> > + pci_dev_t dev;
>
> regroup, don't align.
>
> would it be easier to read if these were at the top level of the
> function (here and elsewhere)?
OK, will change.
> > + result[0] = 0;
> > + result[1] = 0;
> > + result[2] = 0;
> > + result[3] = 0;
> > + result[4] = 0;
>
> memset?
Yes.
> > +U_BOOT_CMD(
> > + caddy, 2, 0, do_caddy,
> > + "Start Caddy server.",
> > + "Start Caddy server with Data structure a given addr\n"
> > + );
> >
> >
> > diff --git a/board/esd/vme8349/caddy.h b/board/esd/vme8349/caddy.h
> >
> > +typedef enum {
> > + CADDY_CMD_IO_READ_8,
> > + CADDY_CMD_IO_READ_16,
> > + CADDY_CMD_IO_READ_32,
> > + CADDY_CMD_IO_WRITE_8,
> > + CADDY_CMD_IO_WRITE_16,
> > + CADDY_CMD_IO_WRITE_32,
> > + CADDY_CMD_CONFIG_READ_8,
> > + CADDY_CMD_CONFIG_READ_16,
> > + CADDY_CMD_CONFIG_READ_32,
> > + CADDY_CMD_CONFIG_WRITE_8,
> > + CADDY_CMD_CONFIG_WRITE_16,
> > + CADDY_CMD_CONFIG_WRITE_32,
> > +} CADDY_CMDS;
> > +
> > +
> > +typedef struct {
> > + uint32_t cmd;
> > + uint32_t issue;
> > + uint32_t addr;
> > + uint32_t par[5];
> > +} CADDY_CMD;
> > +
> > +typedef struct {
> > + uint32_t answer;
> > + uint32_t issue;
> > + uint32_t status;
> > + uint32_t par[5];
> > +} CADDY_ANSWER;
> > +
> > +typedef struct {
> > + uint8_t magic[16];
> > + uint32_t cmd_in;
> > + uint32_t cmd_out;
> > + uint32_t heartbeat;
> > + uint32_t reserved1;
> > + CADDY_CMD cmd[CMD_SIZE];
> > + uint32_t answer_in;
> > + uint32_t answer_out;
> > + uint32_t reserved2;
> > + uint32_t reserved3;
> > + CADDY_ANSWER answer[CMD_SIZE];
> > +} CADDY_INTERFACE;
>
> please remove all typedefs (see CodingStyle Ch. 5). Use 'struct xxx'
> in each instance instead.
We really would like to keep these typedefs. The reason for this is that
multiple customers already are using this header for their work. And
maintaining multiple versions of this file doesn't sound like a good idea.
> > +++ b/board/esd/vme8349/config.mk
> > @@ -0,0 +1,27 @@
> > +#
> > +# Copyright (c) 2009 esd gmbh hannover germany.
>
> please respect the original copyright holder(s).
OK.
> > diff --git a/board/esd/vme8349/pci.c b/board/esd/vme8349/pci.c
> >
> > +#ifdef CONFIG_PCI
> > +
> > +/* System RAM mapped to PCI space */
> > +#define CONFIG_PCI_SYS_MEM_BUS CONFIG_SYS_SDRAM_BASE
> > +#define CONFIG_PCI_SYS_MEM_PHYS CONFIG_SYS_SDRAM_BASE
> > +
> > +#ifndef CONFIG_PCI_PNP
> > +static struct pci_config_table pci_mpc8349emds_config_table[] = {
>
> please convert to use 83XX_GENERIC_PCI code.
OK, will try in next version.
> > diff --git a/board/esd/vme8349/vme8349.c b/board/esd/vme8349/vme8349.c
> > new file mode 100644
> > index 0000000..cd3d684
> > --- /dev/null
> > +++ b/board/esd/vme8349/vme8349.c
> > @@ -0,0 +1,129 @@
> > +/*
> > + * vme8349.c -- esd VME8349 board support.
> > + * Copyright (c) 2008-2009 esd gmbh.
>
> respect original copyright holders please
OK.
> > diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c
> > index c20b981..393e44d 100644
> > --- a/drivers/pci/pci_auto.c
> > +++ b/drivers/pci/pci_auto.c
> > @@ -403,6 +403,7 @@ int pciauto_config_device(struct pci_controller
> > *hose, pci_dev_t dev) PCI_DEV(dev));
> > break;
> > #endif
> > +#ifndef CONFIG_VME8349
> > #ifdef CONFIG_MPC834X
>
> #if defined(CONFIG_MPC834x) && !defined(CONFIG_VME8349)
>
> I don't know - this might need to be changed to ifdef
> CONFIG_MPC8349EMDS...
Should I change this to CONFIG_MPC8349EMDS? Or use
#if defined(CONFIG_MPC834x) && !defined(CONFIG_VME8349)
for now?
> > case PCI_CLASS_BRIDGE_OTHER:
> > /*
> > +++ b/include/configs/vme8349.h
> > @@ -0,0 +1,638 @@
> > +/*
> > + * esd vme8349 U-Boot configuration file.
> > + * Copyright (c) 2008, 2009 esd gmbh Hannover Germany
> > + *
> > + * reinhard.arlt at esd-electronics.cd
> > + * Based on the MPC8349EMDS config.
>
> right, but you didn't carry the copyrights with the code :(.
Will fix.
> > +/*
> > + * High Level Configuration Options
> > + */
> > +#define CONFIG_E300 1 /* E300 Family */
> > +#define CONFIG_MPC83XX 1 /* MPC83XX family */
> > +#define CONFIG_MPC834X 1 /* MPC834X family */
>
> this is now CONFIG_MPC83xx. please rebase on top of u-boot-mpc83xx'
> next branch.
OK.
> > +/* System IO Config */
> > +#define CONFIG_SYS_SICRH SICRH_TSOBI1
>
> I'm guessing this is copied and should be 0 (see latest commit on
> mpc83xx' master).
I'm guessing as well. Will change.
> > +/*
> > + * Environment Configuration
> > + */
> > +#define CONFIG_ENV_OVERWRITE
> > +
> > +#if defined(CONFIG_TSEC_ENET)
> > +#define CONFIG_HAS_ETH0
> > +#define CONFIG_ETHADDR 00:a0:1e:a0:13:8d
> > +#define CONFIG_HAS_ETH1
> > +#define CONFIG_ETH1ADDR 00:a0:1e:a0:13:8e
> > +#endif
> > +
> > +#define CONFIG_IPADDR 192.168.1.234
> > +
>
> we don't hardcode mac & ip addresses any more - please remove.
Ups. Missed this. Will remove.
Thanks for your review Kim. I'll send a new version soon.
Best regards,
Stefan
=====================================================================
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de
=====================================================================
^ permalink raw reply [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH] mpc83xx: Add esd VME8349 board support
2009-07-21 9:38 ` Stefan Roese
@ 2009-07-21 19:08 ` Kim Phillips
2009-07-24 12:50 ` Stefan Roese
2009-07-22 9:28 ` Wolfgang Denk
1 sibling, 1 reply; 6+ messages in thread
From: Kim Phillips @ 2009-07-21 19:08 UTC (permalink / raw)
To: u-boot
On Tue, 21 Jul 2009 11:38:31 +0200
Stefan Roese <sr@denx.de> wrote:
> > might want to add a doc/README.vme8349 at some point.
>
> Currently not planned. I have to admit that I usually don't add such a readme.
> It's not an evaluation board after all.
your call - the board will be easier to maintain provided the intended
memory map, etc.
> > > diff --git a/board/esd/vme8349/caddy.h b/board/esd/vme8349/caddy.h
> > >
> > > +typedef enum {
> > > + CADDY_CMD_IO_READ_8,
> > > + CADDY_CMD_IO_READ_16,
> > > + CADDY_CMD_IO_READ_32,
> > > + CADDY_CMD_IO_WRITE_8,
> > > + CADDY_CMD_IO_WRITE_16,
> > > + CADDY_CMD_IO_WRITE_32,
> > > + CADDY_CMD_CONFIG_READ_8,
> > > + CADDY_CMD_CONFIG_READ_16,
> > > + CADDY_CMD_CONFIG_READ_32,
> > > + CADDY_CMD_CONFIG_WRITE_8,
> > > + CADDY_CMD_CONFIG_WRITE_16,
> > > + CADDY_CMD_CONFIG_WRITE_32,
> > > +} CADDY_CMDS;
> > > +
> > > +
> > > +typedef struct {
> > > + uint32_t cmd;
> > > + uint32_t issue;
> > > + uint32_t addr;
> > > + uint32_t par[5];
> > > +} CADDY_CMD;
> > > +
> > > +typedef struct {
> > > + uint32_t answer;
> > > + uint32_t issue;
> > > + uint32_t status;
> > > + uint32_t par[5];
> > > +} CADDY_ANSWER;
> > > +
> > > +typedef struct {
> > > + uint8_t magic[16];
> > > + uint32_t cmd_in;
> > > + uint32_t cmd_out;
> > > + uint32_t heartbeat;
> > > + uint32_t reserved1;
> > > + CADDY_CMD cmd[CMD_SIZE];
> > > + uint32_t answer_in;
> > > + uint32_t answer_out;
> > > + uint32_t reserved2;
> > > + uint32_t reserved3;
> > > + CADDY_ANSWER answer[CMD_SIZE];
> > > +} CADDY_INTERFACE;
> >
> > please remove all typedefs (see CodingStyle Ch. 5). Use 'struct xxx'
> > in each instance instead.
>
> We really would like to keep these typedefs. The reason for this is that
> multiple customers already are using this header for their work. And
> maintaining multiple versions of this file doesn't sound like a good idea.
eh? It's a straight violation of CodingStyle and makes the code
hard to read; STUFF_IN_CAPS to me read as defines, and anyway,
typedefs, assuming CodingStyle liked them, would be appended with _t.
But these need to be defined as 'struct <name>', and used in such a way.
Can't they write a header wrapper for "their work"? Can you make them
realize they won't need to be wasting time on such effort if they
submit the remainder of their code upstream?
> > > diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c
> > > index c20b981..393e44d 100644
> > > --- a/drivers/pci/pci_auto.c
> > > +++ b/drivers/pci/pci_auto.c
> > > @@ -403,6 +403,7 @@ int pciauto_config_device(struct pci_controller
> > > *hose, pci_dev_t dev) PCI_DEV(dev));
> > > break;
> > > #endif
> > > +#ifndef CONFIG_VME8349
> > > #ifdef CONFIG_MPC834X
> >
> > #if defined(CONFIG_MPC834x) && !defined(CONFIG_VME8349)
> >
> > I don't know - this might need to be changed to ifdef
> > CONFIG_MPC8349EMDS...
>
> Should I change this to CONFIG_MPC8349EMDS? Or use
>
> #if defined(CONFIG_MPC834x) && !defined(CONFIG_VME8349)
>
> for now?
hmm...based on commit 6902df56a0b493f369153b09d11afcd74a580561 "Add PCI
support for the TQM834x board.", it should really be ifdef
CONFIG_TQM834x...but what does the VME8349 do? does it want to define
CONFIG_PCIAUTO_SKIP_HOST_BRIDGE instead?
Kim
^ permalink raw reply [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH] mpc83xx: Add esd VME8349 board support
2009-07-21 9:38 ` Stefan Roese
2009-07-21 19:08 ` Kim Phillips
@ 2009-07-22 9:28 ` Wolfgang Denk
1 sibling, 0 replies; 6+ messages in thread
From: Wolfgang Denk @ 2009-07-22 9:28 UTC (permalink / raw)
To: u-boot
Dear Stefan Roese,
In message <200907211138.31711.sr@denx.de> you wrote:
...
> > > +typedef struct {
> > > + uint32_t cmd;
> > > + uint32_t issue;
> > > + uint32_t addr;
> > > + uint32_t par[5];
> > > +} CADDY_CMD;
> > > +
> > > +typedef struct {
> > > + uint32_t answer;
> > > + uint32_t issue;
> > > + uint32_t status;
> > > + uint32_t par[5];
> > > +} CADDY_ANSWER;
> > > +
> > > +typedef struct {
> > > + uint8_t magic[16];
> > > + uint32_t cmd_in;
> > > + uint32_t cmd_out;
> > > + uint32_t heartbeat;
> > > + uint32_t reserved1;
> > > + CADDY_CMD cmd[CMD_SIZE];
> > > + uint32_t answer_in;
> > > + uint32_t answer_out;
> > > + uint32_t reserved2;
> > > + uint32_t reserved3;
> > > + CADDY_ANSWER answer[CMD_SIZE];
> > > +} CADDY_INTERFACE;
> >
> > please remove all typedefs (see CodingStyle Ch. 5). Use 'struct xxx'
> > in each instance instead.
>
> We really would like to keep these typedefs. The reason for this is that
> multiple customers already are using this header for their work. And
> maintaining multiple versions of this file doesn't sound like a good idea.
Kim is right here. The code is violating the Coding Style and needs to
be cleaned up.
Eventually you should submit your code for review on the ML before
delivering it to customers ;-)
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Why is an average signature file longer than an average Perl script??
^ permalink raw reply [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH] mpc83xx: Add esd VME8349 board support
2009-07-21 19:08 ` Kim Phillips
@ 2009-07-24 12:50 ` Stefan Roese
0 siblings, 0 replies; 6+ messages in thread
From: Stefan Roese @ 2009-07-24 12:50 UTC (permalink / raw)
To: u-boot
On Tuesday 21 July 2009 21:08:25 Kim Phillips wrote:
> > > > diff --git a/board/esd/vme8349/caddy.h b/board/esd/vme8349/caddy.h
> > > >
> > > > +typedef enum {
> > > > + CADDY_CMD_IO_READ_8,
> > > > + CADDY_CMD_IO_READ_16,
> > > > + CADDY_CMD_IO_READ_32,
> > > > + CADDY_CMD_IO_WRITE_8,
> > > > + CADDY_CMD_IO_WRITE_16,
> > > > + CADDY_CMD_IO_WRITE_32,
> > > > + CADDY_CMD_CONFIG_READ_8,
> > > > + CADDY_CMD_CONFIG_READ_16,
> > > > + CADDY_CMD_CONFIG_READ_32,
> > > > + CADDY_CMD_CONFIG_WRITE_8,
> > > > + CADDY_CMD_CONFIG_WRITE_16,
> > > > + CADDY_CMD_CONFIG_WRITE_32,
> > > > +} CADDY_CMDS;
> > > > +
> > > > +
> > > > +typedef struct {
> > > > + uint32_t cmd;
> > > > + uint32_t issue;
> > > > + uint32_t addr;
> > > > + uint32_t par[5];
> > > > +} CADDY_CMD;
> > > > +
> > > > +typedef struct {
> > > > + uint32_t answer;
> > > > + uint32_t issue;
> > > > + uint32_t status;
> > > > + uint32_t par[5];
> > > > +} CADDY_ANSWER;
> > > > +
> > > > +typedef struct {
> > > > + uint8_t magic[16];
> > > > + uint32_t cmd_in;
> > > > + uint32_t cmd_out;
> > > > + uint32_t heartbeat;
> > > > + uint32_t reserved1;
> > > > + CADDY_CMD cmd[CMD_SIZE];
> > > > + uint32_t answer_in;
> > > > + uint32_t answer_out;
> > > > + uint32_t reserved2;
> > > > + uint32_t reserved3;
> > > > + CADDY_ANSWER answer[CMD_SIZE];
> > > > +} CADDY_INTERFACE;
> > >
> > > please remove all typedefs (see CodingStyle Ch. 5). Use 'struct xxx'
> > > in each instance instead.
> >
> > We really would like to keep these typedefs. The reason for this is that
> > multiple customers already are using this header for their work. And
> > maintaining multiple versions of this file doesn't sound like a good
> > idea.
>
> eh? It's a straight violation of CodingStyle and makes the code
> hard to read; STUFF_IN_CAPS to me read as defines, and anyway,
> typedefs, assuming CodingStyle liked them, would be appended with _t.
> But these need to be defined as 'struct <name>', and used in such a way.
>
> Can't they write a header wrapper for "their work"? Can you make them
> realize they won't need to be wasting time on such effort if they
> submit the remainder of their code upstream?
OK, "typedefs" removed in next patch version.
> > > > diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c
> > > > index c20b981..393e44d 100644
> > > > --- a/drivers/pci/pci_auto.c
> > > > +++ b/drivers/pci/pci_auto.c
> > > > @@ -403,6 +403,7 @@ int pciauto_config_device(struct pci_controller
> > > > *hose, pci_dev_t dev) PCI_DEV(dev));
> > > > break;
> > > > #endif
> > > > +#ifndef CONFIG_VME8349
> > > > #ifdef CONFIG_MPC834X
> > >
> > > #if defined(CONFIG_MPC834x) && !defined(CONFIG_VME8349)
> > >
> > > I don't know - this might need to be changed to ifdef
> > > CONFIG_MPC8349EMDS...
> >
> > Should I change this to CONFIG_MPC8349EMDS? Or use
> >
> > #if defined(CONFIG_MPC834x) && !defined(CONFIG_VME8349)
> >
> > for now?
>
> hmm...based on commit 6902df56a0b493f369153b09d11afcd74a580561 "Add PCI
> support for the TQM834x board.", it should really be ifdef
> CONFIG_TQM834x...but what does the VME8349 do? does it want to define
> CONFIG_PCIAUTO_SKIP_HOST_BRIDGE instead?
No. From what I know, this code in question is for some earlier MPC834x chip
revisions. The comment in the code also states something like this:
/*
* The host/PCI bridge 1 seems broken in 8349 - it presents
* itself as 'PCI_CLASS_BRIDGE_OTHER' and appears as an _agent_
* device claiming resources io/mem/irq.. we only allow for
* the PIMMR window to be allocated (BAR0 - 1MB size)
*/
You will probably know this better. If this assumption is correct, it would be
best to check for chip revisions and only enable this code for those "buggy"
revisions.
Since I can't really tell for sure, and I don't want to change any other 83xx
systems, I'll keep
#if defined(CONFIG_MPC834x) && !defined(CONFIG_VME8349)
for now. Otherwise our PCI devices won't get enumerated correctly (e.g. PCI
devices with certain PLX bridges).
Best regards,
Stefan
=====================================================================
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de
=====================================================================
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2009-07-24 12:50 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2009-06-10 17:09 [U-Boot] [PATCH] mpc83xx: Add esd VME8349 board support Stefan Roese
2009-06-11 15:15 ` Kim Phillips
2009-07-21 9:38 ` Stefan Roese
2009-07-21 19:08 ` Kim Phillips
2009-07-24 12:50 ` Stefan Roese
2009-07-22 9:28 ` Wolfgang Denk
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