From mboxrd@z Thu Jan  1 00:00:00 1970
From: Stefan Roese <sr@denx.de>
Date: Tue, 28 Jul 2009 06:56:33 +0200
Subject: [U-Boot] [PATCH v5] ppc4xx: Add GDsys CompactCenter board
	support.
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	<20090727210650.8622E832E416@gemini.denx.de>
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Hi Wolfgang,

On Monday 27 July 2009 23:06:50 Wolfgang Denk wrote:
> > +	mtdcr(uic3sr, 0xffffffff);	/* clear all */
> > +	mtdcr(uic3er, 0x00000000);	/* disable all */
> > +	mtdcr(uic3cr, 0x00000000);	/* all non-critical */
> > +	mtdcr(uic3pr, 0xffffffff);	/* per ref-board manual */
> > +	mtdcr(uic3tr, 0x00000000);	/* per ref-board manual */
> > +	mtdcr(uic3vr, 0x00000000);	/* int31 highest, base=0x000 */
> > +	mtdcr(uic3sr, 0xffffffff);	/* clear all */
>
> All these lower case #defines in "include/asm-ppc/ppc4xx-uic.h"
> should be cleaned up.
>
> ..
>
> > +void pci_target_init(struct pci_controller *hose)
> > +{
> > +	/*
> > +	 * Disable everything
> > +	 */
> > +	out_le32((void *)PCIX0_PIM0SA, 0); /* disable */
> > +	out_le32((void *)PCIX0_PIM1SA, 0); /* disable */
> > +	out_le32((void *)PCIX0_PIM2SA, 0); /* disable */
> > +	out_le32((void *)PCIX0_EROMBA, 0); /* disable expansion rom */
> > +
> > +	/*
> > +	 * Map all of SDRAM to PCI address 0x0000_0000. Note that the 440
> > +	 * strapping options to not support sizes such as 128/256 MB.
> > +	 */
> > +	out_le32((void *)PCIX0_PIM0LAL, CONFIG_SYS_SDRAM_BASE);
> > +	out_le32((void *)PCIX0_PIM0LAH, 0);
> > +	out_le32((void *)PCIX0_PIM0SA, ~(gd->ram_size - 1) | 1);
> > +	out_le32((void *)PCIX0_BAR0, 0);
>
> And we should proper C structs in "include/ppc440.h" so we can get
> rid of all these nasty casts.
>
>
> I don't intend to block this patch at this stage, but can you please
> put such cleanup on your list for the next release?  Thanks.

OK, I'll put it on my list. The lower-case stuff shouldn't be that hard, but 
the C struct change is quite intrusive and I can't really promise that I can 
finish such a cleanup quickly. But I'll try.

Best regards,
Stefan

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