[U-Boot] [PATCH] Add support for Eukrea CPUAT91 SBC

[Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>]

> index dd0b761..6d18e7f 100755
> --- a/MAKEALL
> +++ b/MAKEALL
> @@ -595,11 +595,12 @@ LIST_at91="			\
>  	at91sam9260ek		\
>  	at91sam9261ek		\
>  	at91sam9263ek		\
> -	at91sam9g10ek	\
> +	at91sam9g10ek		\
again please do this in an other patch
>  	at91sam9g20ek		\
>  	at91sam9m10g45ek	\
>  	at91sam9rlek		\
>  	cmc_pu2			\
> +	cpuat91			\
>  	csb637			\
>  	kb9202			\
>  	meesc			\
> diff --git a/Makefile b/Makefile
> index ac844a7..655cb03 100644
> --- a/Makefile
> +++ b/Makefile
> @@ -2673,6 +2673,18 @@ at91rm9200ek_config	:	unconfig
>  cmc_pu2_config	:	unconfig
>  	@$(MKCONFIG) $(@:_config=) arm arm920t cmc_pu2 NULL at91rm9200
>  
> +cpuat91_ram_config \
> +cpuat91_config	:	unconfig
> +	@mkdir -p $(obj)include
> +	@if [ "$(findstring _ram_,$@)" ] ; then \
> +		echo "#define CONFIG_CPUAT91_RAM 1" >>$(obj)include/config.h ; \
NACK
no new config for this you must use the current one
> +		$(XECHO) "... CPUAT91 configured for RAM" ; \
> +	else \
> +		echo "#define CONFIG_BOOTDELAY 1" >>$(obj)include/config.h ;\
> +		$(XECHO) "... CPUAT91 configured for Flash" ;\
> +	fi;
> +	@$(MKCONFIG) -a cpuat91 arm arm920t cpuat91 eukrea at91rm9200
> +
>  csb637_config	:	unconfig
>  	@$(MKCONFIG) $(@:_config=) arm arm920t csb637 NULL at91rm9200
>  
<nip>
> +
> +#ifndef __CONFIG_H
> +#define __CONFIG_H
> +
> +#if defined(CONFIG_CPUAT91_RAM)
> +#define CONFIG_SKIP_LOWLEVEL_INIT	1
> +#define CONFIG_SKIP_RELOCATE_UBOOT	1
> +#endif
> +
> +#define AT91C_MAIN_CLOCK		179712000
> +#define AT91C_MASTER_CLOCK		59904000
> +
> +#define AT91_SLOW_CLOCK			32768
> +
> +#define CONFIG_ARM920T			1
> +#define CONFIG_AT91RM9200		1
> +#define CONFIG_AT91RM9200DK		1
you are not a DK
please fix it
> +#define CONFIG_CPUAT91			1
> +
> +#undef CONFIG_USE_IRQ
> +#define USE_920T_MMU			1
> +
> +#define CONFIG_CMDLINE_TAG		1
> +#define CONFIG_SETUP_MEMORY_TAGS	1
> +#define CONFIG_INITRD_TAG		1
> +
> +#ifndef CONFIG_SKIP_LOWLEVEL_INIT
> +#define CONFIG_SYS_USE_MAIN_OSCILLATOR	1
> +/* flash */
> +#define CONFIG_SYS_MC_PUIA_VAL	0x00000000
> +#define CONFIG_SYS_MC_PUP_VAL	0x00000000
> +#define CONFIG_SYS_MC_PUER_VAL	0x00000000
> +#define CONFIG_SYS_MC_ASR_VAL	0x00000000
> +#define CONFIG_SYS_MC_AASR_VAL	0x00000000
> +#define CONFIG_SYS_EBI_CFGR_VAL	0x00000000
> +#define CONFIG_SYS_SMC_CSR0_VAL	0x00003284 /* 16bit, 2 TDF, 4 WS */
> +
> +/* clocks */
> +#define CONFIG_SYS_PLLAR_VAL	0x20263E04 /* 179.712000 MHz for PCK */
> +#define CONFIG_SYS_PLLBR_VAL	0x10483E0E /* 48.054857 MHz for USB */
> +#define CONFIG_SYS_MCKR_VAL	0x00000202 /* PCK/3 = MCK Master Clock */
> +
> +/* sdram */
> +#define CONFIG_SYS_PIOC_ASR_VAL	0xFFFF0000 /* Configure PIOC as D16/D31 */
> +#define CONFIG_SYS_PIOC_BSR_VAL	0x00000000
> +#define CONFIG_SYS_PIOC_PDR_VAL	0xFFFF0000
> +#define CONFIG_SYS_EBI_CSA_VAL	0x00000002 /* CS1=SDRAM */
> +#define CONFIG_SYS_SDRC_CR_VAL	0x2188C155 /* set up the SDRAM */
> +#define CONFIG_SYS_SDRAM	0x20000000 /* address of the SDRAM */
> +#define CONFIG_SYS_SDRAM1	0x20000080 /* address of the SDRAM */
> +#define CONFIG_SYS_SDRAM_VAL	0x00000000 /* value written to SDRAM */
> +#define CONFIG_SYS_SDRC_MR_VAL	0x00000002 /* Precharge All */
> +#define CONFIG_SYS_SDRC_MR_VAL1	0x00000004 /* refresh */
> +#define CONFIG_SYS_SDRC_MR_VAL2	0x00000003 /* Load Mode Register */
> +#define CONFIG_SYS_SDRC_MR_VAL3	0x00000000 /* Normal Mode */
> +#define CONFIG_SYS_SDRC_TR_VAL	0x000002E0 /* Write refresh rate */
> +#endif	/* CONFIG_SKIP_LOWLEVEL_INIT */
> +
> +/* define one of these to choose the DBGU, USART0 or USART1 as console */
> +#define CONFIG_AT91RM9200_USART		1
> +#define CONFIG_DBGU			1
> +#undef CONFIG_USART0
> +#undef CONFIG_USART1
> +


> +#undef CONFIG_HWFLOW
> +#undef CONFIG_MODEM_SUPPORT
no need please remove
> +
> +#define CONFIG_HARD_I2C			1
> +
> +#if defined(CONFIG_HARD_I2C)
> +#define	CONFIG_SYS_I2C_SPEED			50000
> +#define CONFIG_SYS_I2C_SLAVE			0
> +#define CONFIG_SYS_I2C_EEPROM_ADDR		0x54
> +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
> +#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW	1
> +#define	CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	10
> +#endif
> +
> +#define CONFIG_BOOTP_BOOTFILESIZE	1
> +#define CONFIG_BOOTP_BOOTPATH		1
> +#define CONFIG_BOOTP_GATEWAY		1
> +#define CONFIG_BOOTP_HOSTNAME		1
> +
> +#include <config_cmd_default.h>
> +
> +#define CONFIG_CMD_DHCP			1
> +#define CONFIG_CMD_PING			1
> +#define CONFIG_CMD_MII			1
> +#define CONFIG_CMD_CACHE		1
> +#undef CONFIG_CMD_USB
> +
> +#undef CONFIG_CMD_FPGA
> +#undef CONFIG_CMD_IMI
> +#undef CONFIG_CMD_LOADS
> +#undef CONFIG_CMD_NFS
please fix the whitespace too

Best Regards,
J.