[U-Boot] [PATCH 3/3 v4] arm: A320: Add support for Faraday A320 evaluation board

[Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>]

On 12:45 Thu 06 Aug     , Po-Yu Chuang wrote:
> Dear Jean-Christophe and Darius,
> 
> 2009/8/5 Darius Augulis <augulis.darius@gmail.com>:
> > On 08/04/2009 10:48 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
> >>>> as I understand correctly the faraday and the CS3518 share the same core
> >>>> and
> >>>> IP so it will be better to have the same dir
> >>>
> >>> I don't think so. Both A320 and Gemini share the same FA526 core,
> >>> but different peripheral. There is no reason to create generic dir
> >>> for A320 and Gemini. Also, no reason to create cpu/fa526 because
> >>> fa526 is almost arm920t.
> 
> Let me summarize. Correct me if I am wrong.
> 
> a320 is an soc with fa526 core which is similar to arm920t.
> Gemini is an soc with fa526 core.
> 
> board      | A320 evb | NAS4220 |
> soc family |          | Gemini  |
> soc        | A320     | CS3516  |
> cpu        | FA526    | FA526   |
> 
> CS3516 and A320 maybe have the same timer (but most IPs are different).
> 
> >> duplicate code is worse
> >> as example on at91 we do support multiple soc of the family in the same
> >> generic dir which allow us to factorize common code and ofcourse split
> >> soc specific code too
> 
> What is the definition of an SOC family?
> 
> > Gemini and A320 are not from the same family. There isn't any common code
> > *yet*. They share only the same core.
> > There are more dirs in cpu/arm920t: "imx", "s3c24x0", etc. Perhaps you won't
> > suggest to move all these SoC's into single dir?
> 
> Agree. Gemini and A320 are not the same family IMO.
> The only common parts are the FA526 core and the timer.
> (or is this sufficient to be a family?)
this sufficient to not duplicate code
> 
> The problem is how should the files be organized if two SOC families
> use the same IP.
> Maybe we can create a cpu/arm920t/common/ ?
no it's must be fa526 dependant not arm920t common
> But what if that IP is used in another SOC with arm926 core? (This
> happens in Faraday's other SOCs)
> 
> I think the easiest way is to treat A320 and Gemini patches unrelated.
I do not want to have code duplicated for the other IP the will move for the
most of them in drivers anyway

as example on SH4 the Renesas & ST socs share the same timer, interrupt
handler and few other thinks we will not duplicate for this will use the same
code

Best Regards,
J.