From: Wolfgang Denk <wd@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH] ppc/85xx: Added PCIe support for P1 P2 RDB
Date: Thu, 20 Aug 2009 20:05:50 +0200 [thread overview]
Message-ID: <20090820180550.3ADD0833DBD2@gemini.denx.de> (raw)
In-Reply-To: <1938B866-A0C2-4152-8085-4BCC4E1A78B9@kernel.crashing.org>
Dear Kumar Gala,
In message <1938B866-A0C2-4152-8085-4BCC4E1A78B9@kernel.crashing.org> you wrote:
>
> > PCIE1 ... pci2 ... pcie1 ???
> >
> > This looks broken to me?
>
>
> This is actually correct.. This has to do w/stupid FSL documentation
> and #. The device tree "orders" PCI buses based on there register
> offset in CCSRBAR. So 0x9000 is pci1, 0xa000 is pci2. However FSL
> docs and some internal SoC screwness lists the PCIe controller @ 9000
> as PCIE2 and the one at A000 as PCIE1.
>
> Probably should add a comment in the code about this.
Yes, please. This looks just too much like a copy & paste error.
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
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prev parent reply other threads:[~2009-08-20 18:05 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-08-20 13:30 [U-Boot] [PATCH] ppc/85xx: Added PCIe support for P1 P2 RDB Poonam Aggrwal
2009-08-20 15:14 ` Wolfgang Denk
2009-08-20 15:48 ` Kumar Gala
2009-08-20 18:05 ` Wolfgang Denk [this message]
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