From mboxrd@z Thu Jan 1 00:00:00 1970 From: Anton Vorontsov Date: Tue, 1 Sep 2009 22:27:41 +0400 Subject: [U-Boot] =?utf-8?q?=5BPATCH_2/2=5D_fsl=3A_sys=5Feeprom=3A_Fix_=27?= =?utf-8?q?may_be_used_uninitialized=27_warning=D0=BF?= In-Reply-To: <4A9D6356.9090304@freescale.com> References: <20090901165902.GA6435@oksana.dev.rtsoft.ru> <607BBB57-C4BD-4E89-A70D-7AD1A8109F5C@kernel.crashing.org> <20090901173814.GA4471@oksana.dev.rtsoft.ru> <20090901180613.GA10489@oksana.dev.rtsoft.ru> <4A9D6356.9090304@freescale.com> Message-ID: <20090901182741.GA18171@oksana.dev.rtsoft.ru> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Tue, Sep 01, 2009 at 01:09:26PM -0500, Timur Tabi wrote: > Anton Vorontsov wrote: > > > - for (i = 0, p = &e; i < sizeof(e); i += 8, p += 8) { > > + do { > > ret = i2c_write(CONFIG_SYS_I2C_EEPROM_ADDR, i, CONFIG_SYS_I2C_EEPROM_ADDR_LEN, > > - p, min((sizeof(e) - i), 8)); > > + (void *)&e + i, min((sizeof(e) - i), 8)); > > if (ret) > > break; > > udelay(5000); /* 5ms write cycle timing */ > > - } > > + i += 8; > > + } while (i < sizeof(e)); > > Or we could remove the loop altogether and just do the write in one shot. Is there any reason to believe that any of Freescale's 8[356]xx boards can't handle a large I2C block write of about 50 bytes or so? I guess "udelay(5000); /* 5ms write cycle timing */" hints that it's EEPROM chip dependant, so has nothing to do with i2c controller capabilities. Thanks, -- Anton Vorontsov email: cbouatmailru at gmail.com irc://irc.freenode.net/bd2