From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stefan Roese Date: Wed, 7 Oct 2009 09:36:26 +0200 Subject: [U-Boot] [PATCH] PPC4xx: Denali core: Fix incorrect DDR row bits In-Reply-To: <2C7DE72B9BD00F44BAECA5B0CBB873955CADF7@hermes.terascala.com> References: <2C7DE72B9BD00F44BAECA5B0CBB873955CADF7@hermes.terascala.com> Message-ID: <200910070936.26409.sr@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Monday 05 October 2009 18:33:28 Mike Nuss wrote: > The SPD detection code for the Denali memory controller used on some > ppc4xx > processors incorrectly encodes DDR0_42. With certain memory > configurations, > this can cause the bootwrapper to incorrectly calculate the installed > memory > size, because the number of row bits is wrong. This patch fixes that > encoding. Applied to u-boot-ppc4xx. Thanks. Cheers, Stefan -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-0 Fax: (+49)-8142-66989-80 Email: office at denx.de