[U-Boot] [PATCH] ppc4xx: Canyonlands: Change EBC bus config to drive always (no high-z)

[U-Boot] [PATCH] ppc4xx: Canyonlands: Change EBC bus config to drive always (no high-z)

[Stefan Roese]

This patch fixes a problem only seen very occasionally on Canyonlands.
The NOR flash interface (CFI driver) doesn't work reliably in all cases.
Erasing and/or programming sometimes doesn't work. Sometimes with
an error message, like "flash not erased" when trying to program an
area that should have just been erased. And sometimes without any error
messages. As mentioned above, this problem was only seen rarely and with
some PLL configuration (CPU speed, EBC speed).

Now I spotted this problem a few times, when running my Canyonlands with
the following setup (chip_config):

1000-nor         - NOR  CPU:1000 PLB: 200 OPB: 100 EBC: 100

Changing the EBC configuration to not release the bus into high
impedance state inbetween the transfers (ATC, DTC and CTC bits set to 1
in EBC0_CFG) seems to fix this problem. I haven't seen any failure
anymore with this patch applied.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: David Mitchell <dmitchell@amcc.com>
Cc: Jeff Mann <MannJ@embeddedplanet.com>
---
 include/configs/canyonlands.h |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/include/configs/canyonlands.h b/include/configs/canyonlands.h
index 3dddccf..ac9b3c5 100644
--- a/include/configs/canyonlands.h
+++ b/include/configs/canyonlands.h
@@ -593,7 +593,7 @@
 #define CONFIG_SYS_EBC_PB1CR		(CONFIG_SYS_FPGA_BASE | 0x3a000) /* BAS=FPGA,BS=2MB,BU=R/W,BW=16bit*/
 #endif	/* !defined(CONFIG_ARCHES) */
 
-#define CONFIG_SYS_EBC_CFG		0xB8400000		/*  EBC0_CFG */
+#define CONFIG_SYS_EBC_CFG		0xbfc00000
 
 /*
  * Arches doesn't use PerCS3 but GPIO43, so let's configure the GPIO
-- 
1.6.5.1

[U-Boot] [PATCH] ppc4xx: Canyonlands: Change EBC bus config to drive always (no high-z)

[Stefan Roese]

On Thursday 29 October 2009 18:44:31 Stefan Roese wrote:
> This patch fixes a problem only seen very occasionally on Canyonlands.
> The NOR flash interface (CFI driver) doesn't work reliably in all cases.
> Erasing and/or programming sometimes doesn't work. Sometimes with
> an error message, like "flash not erased" when trying to program an
> area that should have just been erased. And sometimes without any error
> messages. As mentioned above, this problem was only seen rarely and with
> some PLL configuration (CPU speed, EBC speed).
> 
> Now I spotted this problem a few times, when running my Canyonlands with
> the following setup (chip_config):
> 
> 1000-nor         - NOR  CPU:1000 PLB: 200 OPB: 100 EBC: 100
> 
> Changing the EBC configuration to not release the bus into high
> impedance state inbetween the transfers (ATC, DTC and CTC bits set to 1
> in EBC0_CFG) seems to fix this problem. I haven't seen any failure
> anymore with this patch applied.

Applied to u-boot-ppc4xx/master. Thanks.
 
Cheers,
Stefan

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