* [U-Boot] [PATCH 0/9] Support for SPEAr SoCs @ 2009-12-16 9:18 Vipin KUMAR 2009-12-16 9:18 ` [U-Boot] [PATCH 1/9] i2c driver support " Vipin KUMAR 2009-12-16 16:49 ` [U-Boot] [PATCH 0/9] Support " Armando VISCONTI 0 siblings, 2 replies; 44+ messages in thread From: Vipin KUMAR @ 2009-12-16 9:18 UTC (permalink / raw) To: u-boot This patchset contains the support for 4 SoCs from SPEAr family SPEAr300 SPEAr310 SPEAr320 SPEAr600 It also contains the drivers needed for spear devices Regards Vipin Kumar Vipin (9): i2c driver support for SPEAr SoCs smi driver support for SPEAr SoCs nand driver support for SPEAr SoCs usbd driver and usb boot firmware support for SPEAr SoCs SPEAr600 SoC support added SPEAr300 SoC support added SPEAr310 SoC support added SPEAr320 SoC support added SPEAr600 build support added MAKEALL | 4 + Makefile | 12 + board/spear/common/spr_lowlevel_init.S | 202 +++++ board/spear/common/spr_misc.c | 270 +++++++ board/spear/spear300/Makefile | 52 ++ board/spear/spear300/config.mk | 39 + board/spear/spear300/spr300_board.c | 57 ++ board/spear/spear310/Makefile | 52 ++ board/spear/spear310/config.mk | 42 + board/spear/spear310/spr310_board.c | 58 ++ board/spear/spear320/Makefile | 52 ++ board/spear/spear320/config.mk | 42 + board/spear/spear320/spr320_board.c | 58 ++ board/spear/spear600/Makefile | 52 ++ board/spear/spear600/config.mk | 39 + board/spear/spear600/spr600_board.c | 53 ++ common/cmd_bdinfo.c | 20 + common/main.c | 2 + cpu/arm926ejs/spear/Makefile | 52 ++ cpu/arm926ejs/spear/reset.c | 49 ++ cpu/arm926ejs/spear/timer.c | 148 ++++ drivers/i2c/Makefile | 1 + drivers/i2c/spr_i2c.c | 321 ++++++++ drivers/mtd/Makefile | 1 + drivers/mtd/nand/Makefile | 1 + drivers/mtd/nand/spr_nand.c | 126 +++ drivers/mtd/spr_smi.c | 548 +++++++++++++ drivers/serial/usbtty.h | 2 + drivers/usb/gadget/Makefile | 1 + drivers/usb/gadget/spr_udc.c | 996 ++++++++++++++++++++++++ include/asm-arm/arch-spear/spr_defs.h | 31 + include/asm-arm/arch-spear/spr_emi.h | 55 ++ include/asm-arm/arch-spear/spr_gpt.h | 83 ++ include/asm-arm/arch-spear/spr_i2c.h | 143 ++++ include/asm-arm/arch-spear/spr_misc.h | 126 +++ include/asm-arm/arch-spear/spr_nand.h | 58 ++ include/asm-arm/arch-spear/spr_smi.h | 112 +++ include/asm-arm/arch-spear/spr_syscntl.h | 38 + include/asm-arm/arch-spear/spr_xloader_table.h | 67 ++ include/asm-arm/u-boot.h | 5 + include/configs/spear300.h | 260 ++++++ include/configs/spear310.h | 353 +++++++++ include/configs/spear320.h | 336 ++++++++ include/configs/spear600.h | 260 ++++++ include/usb/spr_udc.h | 227 ++++++ 45 files changed, 5506 insertions(+), 0 deletions(-) create mode 100755 board/spear/common/spr_lowlevel_init.S create mode 100755 board/spear/common/spr_misc.c create mode 100755 board/spear/spear300/Makefile create mode 100755 board/spear/spear300/config.mk create mode 100755 board/spear/spear300/spr300_board.c create mode 100755 board/spear/spear310/Makefile create mode 100755 board/spear/spear310/config.mk create mode 100755 board/spear/spear310/spr310_board.c create mode 100755 board/spear/spear320/Makefile create mode 100755 board/spear/spear320/config.mk create mode 100755 board/spear/spear320/spr320_board.c create mode 100755 board/spear/spear600/Makefile create mode 100755 board/spear/spear600/config.mk create mode 100755 board/spear/spear600/spr600_board.c create mode 100755 cpu/arm926ejs/spear/Makefile create mode 100755 cpu/arm926ejs/spear/reset.c create mode 100755 cpu/arm926ejs/spear/timer.c mode change 100644 => 100755 drivers/i2c/Makefile create mode 100755 drivers/i2c/spr_i2c.c mode change 100644 => 100755 drivers/mtd/Makefile create mode 100755 drivers/mtd/nand/spr_nand.c create mode 100755 drivers/mtd/spr_smi.c mode change 100644 => 100755 drivers/serial/usbtty.h mode change 100644 => 100755 drivers/usb/gadget/Makefile create mode 100755 drivers/usb/gadget/spr_udc.c create mode 100644 include/asm-arm/arch-spear/spr_defs.h create mode 100755 include/asm-arm/arch-spear/spr_emi.h create mode 100755 include/asm-arm/arch-spear/spr_gpt.h create mode 100755 include/asm-arm/arch-spear/spr_i2c.h create mode 100644 include/asm-arm/arch-spear/spr_misc.h create mode 100644 include/asm-arm/arch-spear/spr_nand.h create mode 100755 include/asm-arm/arch-spear/spr_smi.h create mode 100644 include/asm-arm/arch-spear/spr_syscntl.h create mode 100755 include/asm-arm/arch-spear/spr_xloader_table.h create mode 100755 include/configs/spear300.h create mode 100755 include/configs/spear310.h create mode 100755 include/configs/spear320.h create mode 100755 include/configs/spear600.h create mode 100755 include/usb/spr_udc.h ^ permalink raw reply [flat|nested] 44+ messages in thread
* [U-Boot] [PATCH 1/9] i2c driver support for SPEAr SoCs 2009-12-16 9:18 [U-Boot] [PATCH 0/9] Support for SPEAr SoCs Vipin KUMAR @ 2009-12-16 9:18 ` Vipin KUMAR 2009-12-16 9:18 ` [U-Boot] [PATCH 2/9] smi " Vipin KUMAR 2009-12-16 22:31 ` [U-Boot] [PATCH 1/9] i2c " Wolfgang Denk 2009-12-16 16:49 ` [U-Boot] [PATCH 0/9] Support " Armando VISCONTI 1 sibling, 2 replies; 44+ messages in thread From: Vipin KUMAR @ 2009-12-16 9:18 UTC (permalink / raw) To: u-boot Signed-off-by: Vipin <vipin.kumar@st.com> --- drivers/i2c/Makefile | 1 + drivers/i2c/spr_i2c.c | 321 ++++++++++++++++++++++++++++++++++ include/asm-arm/arch-spear/spr_i2c.h | 143 +++++++++++++++ 3 files changed, 465 insertions(+), 0 deletions(-) mode change 100644 => 100755 drivers/i2c/Makefile create mode 100755 drivers/i2c/spr_i2c.c create mode 100755 include/asm-arm/arch-spear/spr_i2c.h diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile old mode 100644 new mode 100755 index b860e89..a65543f --- a/drivers/i2c/Makefile +++ b/drivers/i2c/Makefile @@ -38,6 +38,7 @@ COBJS-$(CONFIG_DRIVER_S3C24X0_I2C) += s3c24x0_i2c.o COBJS-$(CONFIG_S3C44B0_I2C) += s3c44b0_i2c.o COBJS-$(CONFIG_SOFT_I2C) += soft_i2c.o COBJS-$(CONFIG_TSI108_I2C) += tsi108_i2c.o +COBJS-$(CONFIG_SPEARI2C) += spr_i2c.o COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/drivers/i2c/spr_i2c.c b/drivers/i2c/spr_i2c.c new file mode 100755 index 0000000..43a9f35 --- /dev/null +++ b/drivers/i2c/spr_i2c.c @@ -0,0 +1,321 @@ +/* + * (C) Copyright 2009 + * Vipin Kumar, ST Micoelectronics, vipin.kumar at st.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/spr_i2c.h> + +static struct i2c_regs *const i2c_regs_p = + (struct i2c_regs *)CONFIG_SYS_I2C_BASE; + +/** + * i2c_setfreq - Set i2c working mode frequency + * + * Set i2c working mode frequency + */ +static void i2c_setfreq(unsigned int high, unsigned int low) +{ + unsigned int hcnt, lcnt; + + hcnt = (IC_CLK * high) / NANO_TO_MICRO; + writel(hcnt, &i2c_regs_p->ic_fs_scl_hcnt); + + lcnt = (IC_CLK * low) / NANO_TO_MICRO; + writel(lcnt, &i2c_regs_p->ic_fs_scl_lcnt); +} + +/** + * set_speed - Set the i2c speed mode (standard, high, fast) + * @i2c_spd: required i2c speed mode + * + * Set the i2c speed mode (standard, high, fast) + */ +static void set_speed(int i2c_spd) +{ + unsigned int cntl; + + if (i2c_spd == IC_SPEED_MODE_MAX) { + cntl = readl(&i2c_regs_p->ic_con); + cntl |= IC_CON_SPH | IC_CON_SPL; + writel(cntl, &i2c_regs_p->ic_con); + i2c_setfreq(MIN_HS_SCL_HIGHTIME, MIN_HS_SCL_LOWTIME); + } else if (i2c_spd == IC_SPEED_MODE_FAST) { + cntl = readl(&i2c_regs_p->ic_con); + cntl |= IC_CON_SPH; + cntl &= ~IC_CON_SPL; + writel(cntl, &i2c_regs_p->ic_con); + i2c_setfreq(MIN_FS_SCL_HIGHTIME, MIN_FS_SCL_LOWTIME); + } else if (i2c_spd == IC_SPEED_MODE_STANDARD) { + cntl = readl(&i2c_regs_p->ic_con); + cntl |= IC_CON_SPF; + cntl &= ~IC_CON_SPL; + writel(cntl, &i2c_regs_p->ic_con); + i2c_setfreq(MIN_SS_SCL_HIGHTIME, MIN_SS_SCL_LOWTIME); + } +} + +/** + * i2c_set_bus_speed - Set the i2c speed + * @speed: required i2c speed + * + * Set the i2c speed. + */ +void i2c_set_bus_speed(int speed) +{ + if (speed >= I2C_MAX_SPEED) + set_speed(IC_SPEED_MODE_MAX); + else + if (speed >= I2C_FAST_SPEED) + set_speed(IC_SPEED_MODE_FAST); + else + set_speed(IC_SPEED_MODE_STANDARD); +} + +/** + * i2c_get_bus_speed - Gets the i2c speed + * + * Gets the i2c speed. + */ +int i2c_get_bus_speed(void) +{ + if (((readl(&i2c_regs_p->ic_con) & IC_CON_SPH) == IC_CON_SPH) && + ((readl(&i2c_regs_p->ic_con) & IC_CON_SPL) == IC_CON_SPL)) { + return I2C_MAX_SPEED; + + } else if (((readl(&i2c_regs_p->ic_con) & IC_CON_SPH) == IC_CON_SPH) && + ((readl(&i2c_regs_p->ic_con) & IC_CON_SPL) == 0)) { + return I2C_FAST_SPEED; + + } else if (((readl(&i2c_regs_p->ic_con) & IC_CON_SPF) == IC_CON_SPF) && + ((readl(&i2c_regs_p->ic_con) & IC_CON_SPL) == 0)) { + return I2C_STANDARD_SPEED; + } + + return 0; +} + +/** + * i2c_init - Init function + * @speed: required i2c speed + * @slaveadd: slave address for the spear device + * + * Initialization function. + */ +void i2c_init(int speed, int slaveadd) +{ + unsigned int enbl; + + /* Disable i2c */ + enbl = readl(&i2c_regs_p->ic_enable); + enbl &= ~IC_ENABLE_0B; + writel(enbl, &i2c_regs_p->ic_enable); + + writel((IC_CON_SD | IC_CON_SPF | IC_CON_MM), &i2c_regs_p->ic_con); + writel(IC_TL0, &i2c_regs_p->ic_rx_tl); + writel(IC_TL0, &i2c_regs_p->ic_tx_tl); + i2c_set_bus_speed(speed); + writel(IC_STOP_DET, &i2c_regs_p->ic_intr_mask); + writel(slaveadd, &i2c_regs_p->ic_sar); + + /* Enable i2c */ + enbl = readl(&i2c_regs_p->ic_enable); + enbl |= IC_ENABLE_0B; + writel(enbl, &i2c_regs_p->ic_enable); +} + +/** + * i2c_setaddress - Sets the target slave address + * @i2c_addr: target i2c address + * + * Sets the target slave address. + */ +static void i2c_setaddress(unsigned int i2c_addr) +{ + writel(i2c_addr, &i2c_regs_p->ic_tar); +} + +/** + * i2c_probe - Probe the i2c chip + * + * TBD + */ +int i2c_probe(uchar chip) +{ + return 0; +} + +/** + * i2c_flush_rxfifo - Flushes the i2c RX FIFO + * + * Flushes the i2c RX FIFO + */ +void i2c_flush_rxfifo(void) +{ + while (readl(&i2c_regs_p->ic_status) & IC_STATUS_RFNE) + readl(&i2c_regs_p->ic_cmd_data); +} + +/** + * i2c_wait_for_bb - Waits for bus busy + * + * Waits for bus busy + */ +static int i2c_wait_for_bb(void) +{ + unsigned long start_time_bb = get_timer_masked(); + + while ((readl(&i2c_regs_p->ic_status) & IC_STATUS_MA) || + !(readl(&i2c_regs_p->ic_status) & IC_STATUS_TFE)) { + + /* Evaluate timeout */ + if (get_timer(start_time_bb) > (unsigned long)(I2C_BYTE_TO_BB)) + return 1; + } + + return 0; +} + +/** + * i2c_read - Read from i2c memory + * @chip: target i2c address + * @addr: address to read from + * @alen: + * @buffer: buffer for read data + * @len: no of bytes to be read + * + * Read from i2c memory. + */ +int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len) +{ + unsigned long start_time_rx; + + if (buffer == NULL) { + printf("I2C read: buffer is invalid\n"); + return 1; + } + + if (alen > 1) { + printf("I2C read: addr len %d not supported\n", alen); + return 1; + } + + if (addr + len > 256) { + printf("I2C read: address out of range\n"); + return 1; + } + + if (i2c_wait_for_bb()) + return 1; + + i2c_setaddress(chip); + writel(addr, &i2c_regs_p->ic_cmd_data); + + start_time_rx = get_timer_masked(); + while (len) { + writel(IC_CMD, &i2c_regs_p->ic_cmd_data); + if ((readl(&i2c_regs_p->ic_status) & IC_STATUS_RFNE) == + IC_STATUS_RFNE) { + *buffer++ = (uchar)readl(&i2c_regs_p->ic_cmd_data); + len--; + start_time_rx = get_timer_masked(); + } else { + if (get_timer(start_time_rx) > I2C_BYTE_TO) + return 1; + } + } + + udelay(4000); + if ((readl(&i2c_regs_p->ic_raw_intr_stat) & IC_STOP_DET)) + readl(&i2c_regs_p->ic_clr_stop_det); + + if (i2c_wait_for_bb()) + return 1; + + i2c_flush_rxfifo(); + + return 0; +} + +/** + * i2c_write - Write to i2c memory + * @chip: target i2c address + * @addr: address to read from + * @alen: + * @buffer: buffer for read data + * @len: no of bytes to be read + * + * Write to i2c memory. + */ +int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len) +{ + int nb = len; + unsigned long start_time_tx; + + if (buffer == NULL) { + printf("I2C write: buffer is invalid\n"); + return 1; + } + + if (alen > 1) { + printf("I2C write: addr len %d not supported\n", alen); + return 1; + } + + if (addr + len > 256) { + printf("I2C write: address out of range\n"); + return 1; + } + + if (i2c_wait_for_bb()) + return 1; + + i2c_setaddress(chip); + + writel(addr, &i2c_regs_p->ic_cmd_data); + + start_time_tx = get_timer_masked(); + while (len) { + if ((readl(&i2c_regs_p->ic_status) & IC_STATUS_TFNF) + == IC_STATUS_TFNF) { + writel(*buffer, &i2c_regs_p->ic_cmd_data); + buffer++; + len--; + start_time_tx = get_timer_masked(); + } else { + if (get_timer(start_time_tx) > (nb * I2C_BYTE_TO)) + return 1; + } + } + + udelay(4000); + if ((readl(&i2c_regs_p->ic_raw_intr_stat) & IC_STOP_DET)) + readl(&i2c_regs_p->ic_clr_stop_det); + + if (i2c_wait_for_bb()) + return 1; + + i2c_flush_rxfifo(); + + return 0; +} + diff --git a/include/asm-arm/arch-spear/spr_i2c.h b/include/asm-arm/arch-spear/spr_i2c.h new file mode 100755 index 0000000..6fe80e9 --- /dev/null +++ b/include/asm-arm/arch-spear/spr_i2c.h @@ -0,0 +1,143 @@ +/* + * (C) Copyright 2009 + * Vipin Kumar, ST Micoelectronics, vipin.kumar at st.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __SPR_I2C_H_ +#define __SPR_I2C_H_ + +struct i2c_regs { + u32 ic_con; + u32 ic_tar; + u32 ic_sar; + u32 ic_hs_maddr; + u32 ic_cmd_data; + u32 ic_ss_scl_hcnt; + u32 ic_ss_scl_lcnt; + u32 ic_fs_scl_hcnt; + u32 ic_fs_scl_lcnt; + u32 ic_hs_scl_hcnt; + u32 ic_hs_scl_lcnt; + u32 ic_intr_stat; + u32 ic_intr_mask; + u32 ic_raw_intr_stat; + u32 ic_rx_tl; + u32 ic_tx_tl; + u32 ic_clr_intr; + u32 ic_clr_rx_under; + u32 ic_clr_rx_over; + u32 ic_clr_tx_over; + u32 ic_clr_rd_req; + u32 ic_clr_tx_abrt; + u32 ic_clr_rx_done; + u32 ic_clr_activity; + u32 ic_clr_stop_det; + u32 ic_clr_start_det; + u32 ic_clr_gen_call; + u32 ic_enable; + u32 ic_status; + u32 ic_txflr; + u32 ix_rxflr; + u32 reserved_1; + u32 ic_tx_abrt_source; +}; + +#define IC_CLK 166 +#define NANO_TO_MICRO 1000 + +/* High and low times in different speed modes (in ns) */ +#define MIN_SS_SCL_HIGHTIME 4000 +#define MIN_SS_SCL_LOWTIME 5000 +#define MIN_FS_SCL_HIGHTIME 800 +#define MIN_FS_SCL_LOWTIME 1700 +#define MIN_HS_SCL_HIGHTIME 60 +#define MIN_HS_SCL_LOWTIME 160 + +/* Worst case timeout for 1 byte is kept as 1ms */ +#define I2C_BYTE_TO (CONFIG_SYS_HZ/1000) +#define I2C_BYTE_TO_BB (I2C_BYTE_TO * 16) + + +/* i2c control register definitions */ +#define IC_CON_SD 0x0040 +#define IC_CON_RE 0x0020 +#define IC_CON_10BITADDRMASTER 0x0010 +#define IC_CON_10BITADDR_SLAVE 0x0008 +#define IC_CON_SPH 0x0006 +#define IC_CON_SPF 0x0004 +#define IC_CON_SPL 0x0002 +#define IC_CON_MM 0x0001 + +/* i2c target address register definitions */ +#define TAR_ADDR 0x0050 + +/* i2c slave address register definitions */ +#define IC_SLAVE_ADDR 0x0002 + +/* i2c data buffer and command register definitions */ +#define IC_CMD 0x0100 + +/* i2c interrupt status register definitions */ +#define IC_GEN_CALL 0x0800 +#define IC_START_DET 0x0400 +#define IC_STOP_DET 0x0200 +#define IC_ACTIVITY 0x0100 +#define IC_RX_DONE 0x0080 +#define IC_TX_ABRT 0x0040 +#define IC_RD_REQ 0x0020 +#define IC_TX_EMPTY 0x0010 +#define IC_TX_OVER 0x0008 +#define IC_RX_FULL 0x0004 +#define IC_RX_OVER 0x0002 +#define IC_RX_UNDER 0x0001 + +/* fifo threshold register definitions */ +#define IC_TL0 0x00 +#define IC_TL1 0x01 +#define IC_TL2 0x02 +#define IC_TL3 0x03 +#define IC_TL4 0x04 +#define IC_TL5 0x05 +#define IC_TL6 0x06 +#define IC_TL7 0x07 + +/* i2c enable register definitions */ +#define IC_ENABLE_0B 0x0001 + +/* i2c status register definitions */ +#define IC_STATUS_SA 0x0040 +#define IC_STATUS_MA 0x0020 +#define IC_STATUS_RFF 0x0010 +#define IC_STATUS_RFNE 0x0008 +#define IC_STATUS_TFE 0x0004 +#define IC_STATUS_TFNF 0x0002 +#define IC_STATUS_ACT 0x0001 + +/* Speed Selection */ +#define IC_SPEED_MODE_STANDARD 1 +#define IC_SPEED_MODE_FAST 2 +#define IC_SPEED_MODE_MAX 3 + +#define I2C_MAX_SPEED 3400000 +#define I2C_FAST_SPEED 400000 +#define I2C_STANDARD_SPEED 100000 + +#endif /* __SPR_I2C_H_ */ -- 1.6.0.2 ^ permalink raw reply related [flat|nested] 44+ messages in thread
* [U-Boot] [PATCH 2/9] smi driver support for SPEAr SoCs 2009-12-16 9:18 ` [U-Boot] [PATCH 1/9] i2c driver support " Vipin KUMAR @ 2009-12-16 9:18 ` Vipin KUMAR 2009-12-16 9:18 ` [U-Boot] [PATCH 3/9] nand " Vipin KUMAR 2009-12-16 22:44 ` [U-Boot] [PATCH 2/9] smi " Wolfgang Denk 2009-12-16 22:31 ` [U-Boot] [PATCH 1/9] i2c " Wolfgang Denk 1 sibling, 2 replies; 44+ messages in thread From: Vipin KUMAR @ 2009-12-16 9:18 UTC (permalink / raw) To: u-boot Signed-off-by: Vipin <vipin.kumar@st.com> --- drivers/mtd/Makefile | 1 + drivers/mtd/spr_smi.c | 548 ++++++++++++++++++++++++++++++++++ include/asm-arm/arch-spear/spr_smi.h | 112 +++++++ 3 files changed, 661 insertions(+), 0 deletions(-) mode change 100644 => 100755 drivers/mtd/Makefile create mode 100755 drivers/mtd/spr_smi.c create mode 100755 include/asm-arm/arch-spear/spr_smi.h diff --git a/drivers/mtd/Makefile b/drivers/mtd/Makefile old mode 100644 new mode 100755 index 754d648..cbf6f15 --- a/drivers/mtd/Makefile +++ b/drivers/mtd/Makefile @@ -34,6 +34,7 @@ COBJS-$(CONFIG_FLASH_CFI_MTD) += cfi_mtd.o COBJS-$(CONFIG_HAS_DATAFLASH) += dataflash.o COBJS-$(CONFIG_FLASH_CFI_LEGACY) += jedec_flash.o COBJS-$(CONFIG_MW_EEPROM) += mw_eeprom.o +COBJS-$(CONFIG_SPEARSMI) += spr_smi.o COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/drivers/mtd/spr_smi.c b/drivers/mtd/spr_smi.c new file mode 100755 index 0000000..bc17c9d --- /dev/null +++ b/drivers/mtd/spr_smi.c @@ -0,0 +1,548 @@ +/* + * (C) Copyright 2009 + * Vipin Kumar, ST Micoelectronics, vipin.kumar at st.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <flash.h> +#include <linux/err.h> + +#include <asm/io.h> +#include <asm/arch/spr_smi.h> + +#if !defined(CONFIG_SYS_NO_FLASH) + +static struct smi_regs *const smicntl = + (struct smi_regs *const)CONFIG_SYS_SMI_BASE; +static ulong bank_base[CONFIG_SYS_MAX_FLASH_BANKS] = CONFIG_SYS_FLASH_ADDR_BASE; +flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; + +#define ST_M25Pxx_ID 0x00002020 + +/** + * smi_wait_xfer_finish - Wait until TFF is set in status register + * @timeout: timeout in milliseconds + * + * Wait until TFF is set in status register + */ +static inline void smi_wait_xfer_finish(int timeout) +{ + while (timeout--) { + if (readl(&smicntl->smi_sr) & TFF) + break; + udelay(1000); + } +} + +/** + * smi_read_id - Read flash id + * @info: flash_info structure pointer + * @banknum: bank number + * + * Read the flash id present at bank #banknum + */ +static unsigned int smi_read_id(flash_info_t *info, int banknum) +{ + unsigned int value; + + writel(readl(&smicntl->smi_cr1) | SW_MODE, &smicntl->smi_cr1); + writel(READ_ID, &smicntl->smi_tr); + writel((banknum << BANKSEL_SHIFT) | SEND | TX_LEN_1 | RX_LEN_3, + &smicntl->smi_cr2); + smi_wait_xfer_finish(XFER_FINISH_TOUT); + + value = (readl(&smicntl->smi_rr) & 0x00FFFFFF); + + writel(readl(&smicntl->smi_sr) & ~(TFF), &smicntl->smi_sr); + writel(readl(&smicntl->smi_cr1) & ~(SW_MODE), &smicntl->smi_cr1); + + return value; +} + +/** + * flash_get_size - Detect the SMI flash by reading the ID. + * @base: Base address of the flash area bank #banknum + * @banknum: Bank number + * + * Detect the SMI flash by reading the ID. Initializes the flash_info structure + * with size, sector count etc. + */ +static ulong flash_get_size(ulong base, int banknum) +{ + flash_info_t *info = &flash_info[banknum]; + unsigned int value = 0; + unsigned int density = 0; + int i; + + value = smi_read_id(info, banknum); + density = (value >> 16) & 0xff; + + switch (density) { + case 0x10: + info->size = 64 * 1024; + info->sector_count = 2; + break; + case 0x11: + info->size = 128 * 1024; + info->sector_count = 4; + break; + case 0x12: + info->size = 256 * 1024; + info->sector_count = 4; + break; + case 0x13: + info->size = 512 * 1024; + info->sector_count = 8; + break; + case 0x14: + info->size = 1 * 1024 * 1024; + info->sector_count = 16; + break; + case 0x15: + info->size = 2 * 1024 * 1024; + info->sector_count = 32; + break; + case 0x16: + info->size = 4 * 1024 * 1024; + info->sector_count = 64; + break; + case 0x17: + info->size = 8 * 1024 * 1024; + info->sector_count = 128; + break; + case 0x18: + info->size = 16 * 1024 * 1024; + info->sector_count = 64; + break; + default: + return 0x0; + } + + info->flash_id = value & 0xffff; + + info->start[0] = base; + + /* Assume that all sectors are unprotected by default */ + for (i = 0; i < CONFIG_SYS_MAX_FLASH_SECT; i++) + info->protect[i] = 0; + + return info->size; +} + +/** + * smi_read_sr - Read status register of SMI + * @bank: bank number + * + * This routine will get the status register of the flash chip present at the + * given bank + */ +static int smi_read_sr(int bank) +{ + u32 ctrlreg1; + + /* store the CTRL REG1 state */ + ctrlreg1 = readl(&smicntl->smi_cr1); + + /* Program SMI in HW Mode */ + writel(readl(&smicntl->smi_cr1) & ~(SW_MODE | WB_MODE), + &smicntl->smi_cr1); + + /* Performing a RSR instruction in HW mode */ + writel((bank << BANKSEL_SHIFT) | RD_STATUS_REG, &smicntl->smi_cr2); + + smi_wait_xfer_finish(XFER_FINISH_TOUT); + + /* Restore the CTRL REG1 state */ + writel(ctrlreg1, &smicntl->smi_cr1); + + return readl(&smicntl->smi_sr); +} + +/** + * smi_wait_till_ready - Wait till last operation is over. + * @bank: bank number shifted. + * @timeout: timeout in milliseconds. + * + * This routine checks for WIP(write in progress)bit in Status register(SMSR-b0) + * The routine checks for #timeout loops, each at interval of 1 milli-second. + * If successful the routine returns 0. + */ +static int smi_wait_till_ready(int bank, int timeout) +{ + int count; + int sr; + + /* One chip guarantees max 5 msec wait here after page writes, + but potentially three seconds (!) after page erase. */ + for (count = 0; count < timeout; count++) { + sr = smi_read_sr(bank); + if (sr < 0) + break; + else if (!(sr & WIP_BIT)) + return 0; + /*Try again after 1m-sec */ + udelay(1000); + } + printf("SMI controller is still in wait, timeout=%d\n", timeout); + return -EIO; +} + +/** + * smi_write_enable - Enable the flash to do write operation + * @bank: bank number + * + * Set write enable latch with Write Enable command. + * Returns negative if error occurred. + */ +static inline int smi_write_enable(int bank) +{ + u32 ctrlreg1; + int timeout = WMODE_TOUT; + + /* Store the CTRL REG1 state */ + ctrlreg1 = readl(&smicntl->smi_cr1); + + /* Program SMI in H/W Mode */ + writel(readl(&smicntl->smi_cr1) & ~SW_MODE, &smicntl->smi_cr1); + + /* Give the Flash, Write Enable command */ + writel((bank << BANKSEL_SHIFT) | WE, &smicntl->smi_cr2); + + smi_wait_xfer_finish(XFER_FINISH_TOUT); + + /* Restore the CTRL REG1 state */ + writel(ctrlreg1, &smicntl->smi_cr1); + + while (timeout--) { + if (smi_read_sr(bank) & (1 << (bank + WM_SHIFT))) + break; + udelay(1000); + } + + return 0; +} + +/** + * smi_init - SMI initialization routine + * + * SMI initialization routine. Sets SMI control register1. + */ +static void smi_init(void) +{ + /* Setting the fast mode values. SMI working@166/4 = 41.5 MHz */ + writel(HOLD1 | FAST_MODE | BANK_EN | DSEL_TIME | PRESCAL4, + &smicntl->smi_cr1); +} + +/** + * smi_sector_erase - Erase flash sector + * @info: flash_info structure pointer + * @sector: sector number + * + * Set write enable latch with Write Enable command. + * Returns negative if error occurred. + */ +static int smi_sector_erase(flash_info_t *info, unsigned int sector) +{ + int bank; + unsigned int sect_add; + unsigned int instruction; + + switch (info->start[0]) { + case SMIBANK0_BASE: + bank = BANK0; + break; + case SMIBANK1_BASE: + bank = BANK1; + break; + case SMIBANK2_BASE: + bank = BANK2; + break; + case SMIBANK3_BASE: + bank = BANK3; + break; + default: + return -1; + } + + sect_add = sector * (info->size / info->sector_count); + instruction = ((sect_add >> 8) & 0x0000FF00) | SECTOR_ERASE; + + writel(readl(&smicntl->smi_sr) & ~(ERF1 | ERF2), &smicntl->smi_sr); + + if (info->flash_id == ST_M25Pxx_ID) { + /* Wait until finished previous write command. */ + if (smi_wait_till_ready(bank, CONFIG_SYS_FLASH_ERASE_TOUT)) + return -EBUSY; + + /* Send write enable, before erase commands. */ + if (smi_write_enable(bank)) + return -EIO; + + /* Put SMI in SW mode */ + writel(readl(&smicntl->smi_cr1) | SW_MODE, + &smicntl->smi_cr1); + + /* Send Sector Erase command in SW Mode */ + writel(instruction, &smicntl->smi_tr); + writel((bank << BANKSEL_SHIFT) | SEND | TX_LEN_4, + &smicntl->smi_cr2); + smi_wait_xfer_finish(XFER_FINISH_TOUT); + + if (smi_wait_till_ready(bank, CONFIG_SYS_FLASH_ERASE_TOUT)) + return -EBUSY; + + /* Put SMI in HW mode */ + writel(readl(&smicntl->smi_cr1) & ~(SW_MODE), + &smicntl->smi_cr1); + + return 0; + } else { + /* Put SMI in HW mode */ + writel(readl(&smicntl->smi_cr1) & ~(SW_MODE), + &smicntl->smi_cr1); + return -EINVAL; + } +} + +/** + * smi_write - Write to SMI flash + * @src_addr: source buffer + * @dst_addr: destination buffer + * @length: length to write in words + * @bank: bank base address + * + * Write to SMI flash + */ +static int smi_write(unsigned int *src_addr, unsigned int *dst_addr, + unsigned int length, ulong bank_addr) +{ + int banknum; + unsigned int WM; + + switch (bank_addr) { + case SMIBANK0_BASE: + banknum = BANK0; + WM = WM0; + break; + case SMIBANK1_BASE: + banknum = BANK1; + WM = WM1; + break; + case SMIBANK2_BASE: + banknum = BANK2; + WM = WM2; + break; + case SMIBANK3_BASE: + banknum = BANK3; + WM = WM3; + break; + default: + return -1; + } + + if (smi_wait_till_ready(banknum, CONFIG_SYS_FLASH_WRITE_TOUT)) + return -EBUSY; + + /* Set SMI in Hardware Mode */ + writel(readl(&smicntl->smi_cr1) & ~(SW_MODE), &smicntl->smi_cr1); + + if (smi_write_enable(banknum)) + return -EIO; + + /* Perform the write command */ + while (length--) { + if (((ulong) (dst_addr) % SFLASH_PAGE_SIZE) == 0) { + if (smi_wait_till_ready(banknum, + CONFIG_SYS_FLASH_WRITE_TOUT)) + return -EBUSY; + + if (smi_write_enable(banknum)) + return -EIO; + } + + *dst_addr++ = *src_addr++; + + if ((readl(&smicntl->smi_sr) & (ERF1 | ERF2))) + return -EIO; + } + + if (smi_wait_till_ready(banknum, CONFIG_SYS_FLASH_WRITE_TOUT)) + return -EBUSY; + + writel(readl(&smicntl->smi_sr) & ~(WCF), &smicntl->smi_sr); + + return 0; +} + +/** + * write_buff - Write to SMI flash + * @info: flash info structure + * @src: source buffer + * @dest_addr: destination buffer + * @length: length to write in words + * + * Write to SMI flash + */ +int write_buff(flash_info_t *info, uchar *src, ulong dest_addr, ulong length) +{ + smi_write((unsigned int *)src, (unsigned int *)dest_addr, + (length + 3) / 4, info->start[0]); + return 0; +} + +/** + * flash_init - SMI flash initialization + * + * SMI flash initialization + */ +unsigned long flash_init(void) +{ + unsigned long size = 0; + int i, j; + + smi_init(); + + for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) { + flash_info[i].flash_id = FLASH_UNKNOWN; + size += flash_info[i].size = flash_get_size(bank_base[i], i); + } + + for (j = 0; j < CONFIG_SYS_MAX_FLASH_BANKS; j++) { + for (i = 1; i < flash_info[j].sector_count; i++) + flash_info[j].start[i] = + flash_info[j].start[i - 1] + + flash_info->size / flash_info->sector_count; + + } + + return size; +} + +/** + * flash_print_info - Print SMI flash information + * + * Print SMI flash information + */ +void flash_print_info(flash_info_t *info) +{ + int i; + if (info->flash_id == FLASH_UNKNOWN) { + puts("missing or unknown FLASH type\n"); + return; + } + printf(" Size: %ld MB in %d Sectors\n", + info->size >> 20, info->sector_count); + + puts(" Sector Start Addresses:"); + for (i = 0; i < info->sector_count; ++i) { +#ifdef CONFIG_SYS_FLASH_EMPTY_INFO + int size; + int erased; + u32 *flash; + + /* + * Check if whole sector is erased + */ + size = (info->size) / (info->sector_count); + flash = (u32 *) info->start[i]; + size = size / sizeof(int); + + while ((size--) && (*flash++ == ~0)) + ; + + size++; + if (size) + erased = 0; + else + erased = 1; + + if ((i % 5) == 0) + printf("\n"); + + printf(" %08lX%s%s", + info->start[i], + erased ? " E" : " ", info->protect[i] ? "RO " : " "); +#else + if ((i % 5) == 0) + printf("\n "); + printf(" %08lX%s", + info->start[i], info->protect[i] ? " (RO) " : " "); +#endif + } + putc('\n'); + return; +} + +/** + * flash_erase - Erase SMI flash + * + * Erase SMI flash + */ +int flash_erase(flash_info_t *info, int s_first, int s_last) +{ + int rcode = 0; + int prot = 0; + flash_sect_t sect; + + if (info->flash_id == FLASH_UNKNOWN) { + puts("Can't erase unknown flash type - aborted\n"); + return 1; + } + + if ((s_first < 0) || (s_first > s_last)) { + puts("- no sectors to erase\n"); + return 1; + } + + for (sect = s_first; sect <= s_last; ++sect) { + if (info->protect[sect]) + prot++; + } + if (prot) { + printf("- Warning: %d protected sectors will not be erased!\n", + prot); + } else { + putc('\n'); + } + + for (sect = s_first; sect <= s_last; sect++) { + if (info->protect[sect] == 0) { + switch (info->flash_id) { + case ST_M25Pxx_ID: + if (smi_sector_erase(info, sect)) + rcode = 1; + else + putc('.'); + + break; + + default: + printf("Unkown flash vendor 0x%x\n", + (u32) info->flash_id); + break; + } + } + } + puts(" done\n"); + return rcode; +} +#endif diff --git a/include/asm-arm/arch-spear/spr_smi.h b/include/asm-arm/arch-spear/spr_smi.h new file mode 100755 index 0000000..abc0dc2 --- /dev/null +++ b/include/asm-arm/arch-spear/spr_smi.h @@ -0,0 +1,112 @@ +/* + * (C) Copyright 2009 + * Vipin Kumar, ST Micoelectronics, vipin.kumar at st.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef SPR_SMI_H +#define SPR_SMI_H + +/* 0xF800.0000 . 0xFBFF.FFFF 64MB SMI (Serial Flash Mem) */ +/* 0xFC00.0000 . 0xFC1F.FFFF 2MB SMI (Serial Flash Reg.) */ + +#define SMI_BASE CONFIG_SYS_SMI_BASE + +#define FLASH_START_ADDRESS CONFIG_SYS_FLASH_BASE +#define FLASH_BANK_SIZE CONFIG_SYS_FLASH_BANK_SIZE + +#define SMIBANK0_BASE (FLASH_START_ADDRESS) +#define SMIBANK1_BASE (SMIBANK0_BASE + FLASH_BANK_SIZE) +#define SMIBANK2_BASE (SMIBANK1_BASE + FLASH_BANK_SIZE) +#define SMIBANK3_BASE (SMIBANK2_BASE + FLASH_BANK_SIZE) + +#define BANK0 0 +#define BANK1 1 +#define BANK2 2 +#define BANK3 3 + +struct smi_regs { + u32 smi_cr1; + u32 smi_cr2; + u32 smi_sr; + u32 smi_tr; + u32 smi_rr; +}; + +/* CONTROL REG 1 */ +#define BANK_EN 0x0000000F /* enables all banks */ +#define DSEL_TIME 0x00000060 /* Deselect time 6+1 SMI_CK periods */ +#define PRESCAL5 0x00000500 /* AHB_CK prescaling value */ +#define PRESCALA 0x00000A00 /* AHB_CK prescaling value */ +#define PRESCAL3 0x00000300 /* AHB_CK prescaling value */ +#define PRESCAL4 0x00000400 /* AHB_CK prescaling value */ +#define SW_MODE 0x10000000 /* enables SW Mode */ +#define WB_MODE 0x20000000 /* Write Burst Mode */ +#define FAST_MODE 0x00008000 /* Fast Mode */ +#define HOLD1 0x00010000 + +/* CONTROL REG 2 */ +#define RD_STATUS_REG 0x00000400 /* reads status reg */ +#define WE 0x00000800 /* Write Enable */ +#define BANK0_SEL 0x00000000 /* Select Banck0 */ +#define BANK1_SEL 0x00001000 /* Select Banck1 */ +#define BANK2_SEL 0x00002000 /* Select Banck2 */ +#define BANK3_SEL 0x00003000 /* Select Banck3 */ +#define BANKSEL_SHIFT 12 +#define SEND 0x00000080 /* Send data */ +#define TX_LEN_1 0x00000001 /* data length = 1 byte */ +#define TX_LEN_2 0x00000002 /* data length = 2 byte */ +#define TX_LEN_3 0x00000003 /* data length = 3 byte */ +#define TX_LEN_4 0x00000004 /* data length = 4 byte */ +#define RX_LEN_1 0x00000010 /* data length = 1 byte */ +#define RX_LEN_2 0x00000020 /* data length = 2 byte */ +#define RX_LEN_3 0x00000030 /* data length = 3 byte */ +#define RX_LEN_4 0x00000040 /* data length = 4 byte */ +#define TFIE 0x00000100 /* Transmission Flag Interrupt Enable */ +#define WCIE 0x00000200 /* Write Complete Interrupt Enable */ + +/* STATUS_REG */ +#define INT_WCF_CLR 0xFFFFFDFF /* clear: WCF clear */ +#define INT_TFF_CLR 0xFFFFFEFF /* clear: TFF clear */ +#define WIP_BIT 0x00000001 /* WIP Bit of SPI SR on SMI SR */ +#define WEL_BIT 0x00000002 /* WEL Bit of SPI SR on SMI SR */ +#define RSR 0x00000005 /* Read Status regiser */ +#define TFF 0x00000100 /* Transfer Finished FLag */ +#define WCF 0x00000200 /* Transfer Finished FLag */ +#define ERF1 0x00000400 /* Error Flag 1 */ +#define ERF2 0x00000800 /* Error Flag 2 */ +#define WM0 0x00001000 /* WM Bank 0 */ +#define WM1 0x00002000 /* WM Bank 1 */ +#define WM2 0x00004000 /* WM Bank 2 */ +#define WM3 0x00008000 /* WM Bank 3 */ +#define WM_SHIFT 12 + +/* TR REG */ +#define READ_ID 0x0000009F /* Read Identification */ +#define BULK_ERASE 0x000000C7 /* BULK erase */ +#define SECTOR_ERASE 0x000000D8 /* SECTOR erase */ +#define WRITE_ENABLE 0x00000006 /* Wenable command to FLASH */ + +#define SFLASH_PAGE_SIZE 0x100 +#define XFER_FINISH_TOUT 2 +#define WMODE_TOUT 2 + +#endif + -- 1.6.0.2 ^ permalink raw reply related [flat|nested] 44+ messages in thread
* [U-Boot] [PATCH 3/9] nand driver support for SPEAr SoCs 2009-12-16 9:18 ` [U-Boot] [PATCH 2/9] smi " Vipin KUMAR @ 2009-12-16 9:18 ` Vipin KUMAR 2009-12-16 9:18 ` [U-Boot] [PATCH 4/9] usbd driver and usb boot firmware " Vipin KUMAR 2010-01-04 23:06 ` [U-Boot] [PATCH 3/9] nand driver " Scott Wood 2009-12-16 22:44 ` [U-Boot] [PATCH 2/9] smi " Wolfgang Denk 1 sibling, 2 replies; 44+ messages in thread From: Vipin KUMAR @ 2009-12-16 9:18 UTC (permalink / raw) To: u-boot Signed-off-by: Vipin <vipin.kumar@st.com> --- drivers/mtd/nand/Makefile | 1 + drivers/mtd/nand/spr_nand.c | 126 +++++++++++++++++++++++++++++++++ include/asm-arm/arch-spear/spr_nand.h | 58 +++++++++++++++ 3 files changed, 185 insertions(+), 0 deletions(-) create mode 100755 drivers/mtd/nand/spr_nand.c create mode 100644 include/asm-arm/arch-spear/spr_nand.h diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile index 02449ee..28f27da 100644 --- a/drivers/mtd/nand/Makefile +++ b/drivers/mtd/nand/Makefile @@ -47,6 +47,7 @@ COBJS-$(CONFIG_NAND_NDFC) += ndfc.o COBJS-$(CONFIG_NAND_NOMADIK) += nomadik.o COBJS-$(CONFIG_NAND_S3C2410) += s3c2410_nand.o COBJS-$(CONFIG_NAND_S3C64XX) += s3c64xx.o +COBJS-$(CONFIG_NAND_SPEAR) += spr_nand.o COBJS-$(CONFIG_NAND_OMAP_GPMC) += omap_gpmc.o COBJS-$(CONFIG_NAND_PLAT) += nand_plat.o endif diff --git a/drivers/mtd/nand/spr_nand.c b/drivers/mtd/nand/spr_nand.c new file mode 100755 index 0000000..ccdea25 --- /dev/null +++ b/drivers/mtd/nand/spr_nand.c @@ -0,0 +1,126 @@ +/* + * (C) Copyright 2009 + * Vipin Kumar, ST Micoelectronics, vipin.kumar at st.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <nand.h> +#include <linux/mtd/nand_ecc.h> +#include <asm/io.h> +#include <asm/arch/spr_nand.h> + +static struct fsmc_regs *const fsmc_regs_p = + (struct fsmc_regs *)CONFIG_SPEAR_FSMCBASE; + +static struct nand_ecclayout spear_nand_ecclayout = { + .eccbytes = 24, + .eccpos = { 2, 3, 4, 18, 19, 20, 34, 35, 36, 50, 51, 52, + 66, 67, 68, 82, 83, 84, 98, 99, 100, 114, 115, 116}, + .oobfree = { + {.offset = 8, .length = 8}, + {.offset = 24, .length = 8}, + {.offset = 40, .length = 8}, + {.offset = 56, .length = 8}, + {.offset = 72, .length = 8}, + {.offset = 88, .length = 8}, + {.offset = 104, .length = 8}, + {.offset = 136, .length = 8} + } +}; + +static void spear_nand_hwcontrol(struct mtd_info *mtd, int cmd, uint ctrl) +{ + struct nand_chip *this = mtd->priv; + ulong IO_ADDR_W; + + if (ctrl & NAND_CTRL_CHANGE) { + IO_ADDR_W = (ulong)this->IO_ADDR_W; + + IO_ADDR_W &= ~(CONFIG_SYS_NAND_CLE | + CONFIG_SYS_NAND_ALE); + if (ctrl & NAND_CLE) + IO_ADDR_W |= CONFIG_SYS_NAND_CLE; + if (ctrl & NAND_ALE) + IO_ADDR_W |= CONFIG_SYS_NAND_ALE; + + if (ctrl & NAND_NCE) { + writel(readl(&fsmc_regs_p->genmemctrl_pc) | + FSMC_ENABLE, &fsmc_regs_p->genmemctrl_pc); + } else { + writel(readl(&fsmc_regs_p->genmemctrl_pc) & + ~FSMC_ENABLE, &fsmc_regs_p->genmemctrl_pc); + } + this->IO_ADDR_W = (void *)IO_ADDR_W; + } + + if (cmd != NAND_CMD_NONE) + writeb(cmd, this->IO_ADDR_W); +} + + +static int spear_read_hwecc(struct mtd_info *mtd, + const u_char *data, + u_char ecc[3]) +{ + u_int ecc_tmp; + + /* read the h/w ECC */ + ecc_tmp = readl(&fsmc_regs_p->genmemctrl_ecc); + + ecc[0] = (u_char) (ecc_tmp & 0xFF); + ecc[1] = (u_char) ((ecc_tmp & 0xFF00) >> 8); + ecc[2] = (u_char) ((ecc_tmp & 0xFF0000) >> 16); + + return 0; +} + +void spear_enable_hwecc(struct mtd_info *mtd, int mode) +{ + writel(readl(&fsmc_regs_p->genmemctrl_pc) & ~0x80, + &fsmc_regs_p->genmemctrl_pc); + writel(readl(&fsmc_regs_p->genmemctrl_pc) & ~FSMC_ECCEN, + &fsmc_regs_p->genmemctrl_pc); + writel(readl(&fsmc_regs_p->genmemctrl_pc) | FSMC_ECCEN, + &fsmc_regs_p->genmemctrl_pc); +} + +int spear_nand_init(struct nand_chip *nand) +{ + writel(FSMC_DEVWID_8 | FSMC_DEVTYPE_NAND | FSMC_ENABLE | FSMC_WAITON, + &fsmc_regs_p->genmemctrl_pc); + writel(readl(&fsmc_regs_p->genmemctrl_pc) | FSMC_TCLR_1 | FSMC_TAR_1, + &fsmc_regs_p->genmemctrl_pc); + writel(FSMC_THIZ_1 | FSMC_THOLD_4 | FSMC_TWAIT_6 | FSMC_TSET_0, + &fsmc_regs_p->genmemctrl_comm); + writel(FSMC_THIZ_1 | FSMC_THOLD_4 | FSMC_TWAIT_6 | FSMC_TSET_0, + &fsmc_regs_p->genmemctrl_attrib); + + nand->options = 0; + nand->ecc.mode = NAND_ECC_HW; + nand->ecc.layout = &spear_nand_ecclayout; + nand->ecc.size = 512; + nand->ecc.bytes = 3; + nand->ecc.calculate = spear_read_hwecc; + nand->ecc.hwctl = spear_enable_hwecc; + nand->ecc.correct = nand_correct_data; + nand->cmd_ctrl = spear_nand_hwcontrol; + return 0; +} diff --git a/include/asm-arm/arch-spear/spr_nand.h b/include/asm-arm/arch-spear/spr_nand.h new file mode 100644 index 0000000..4f5abc3 --- /dev/null +++ b/include/asm-arm/arch-spear/spr_nand.h @@ -0,0 +1,58 @@ +/* + * (C) Copyright 2009 + * Vipin Kumar, ST Micoelectronics, vipin.kumar at st.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __SPR_NAND_H__ +#define __SPR_NAND_H__ + +struct fsmc_regs { + u32 reserved_1[0x10]; + u32 genmemctrl_pc; + u32 reserved_2; + u32 genmemctrl_comm; + u32 genmemctrl_attrib; + u32 reserved_3; + u32 genmemctrl_ecc; +}; + +/* genmemctrl_pc register definitions */ +#define FSMC_RESET (1 << 0) +#define FSMC_WAITON (1 << 1) +#define FSMC_ENABLE (1 << 2) +#define FSMC_DEVTYPE_NAND (1 << 3) +#define FSMC_DEVWID_8 (0 << 4) +#define FSMC_DEVWID_16 (1 << 4) +#define FSMC_ECCEN (1 << 6) +#define FSMC_ECCPLEN_512 (0 << 7) +#define FSMC_ECCPLEN_256 (1 << 7) +#define FSMC_TCLR_1 (1 << 9) +#define FSMC_TAR_1 (1 << 13) + +/* genmemctrl_comm register definitions */ +#define FSMC_TSET_0 (0 << 0) +#define FSMC_TWAIT_6 (6 << 8) +#define FSMC_THOLD_4 (4 << 16) +#define FSMC_THIZ_1 (1 << 24) + +extern int spear_nand_init(struct nand_chip *nand); +#endif + -- 1.6.0.2 ^ permalink raw reply related [flat|nested] 44+ messages in thread
* [U-Boot] [PATCH 4/9] usbd driver and usb boot firmware support for SPEAr SoCs 2009-12-16 9:18 ` [U-Boot] [PATCH 3/9] nand " Vipin KUMAR @ 2009-12-16 9:18 ` Vipin KUMAR 2009-12-16 9:18 ` [U-Boot] [PATCH 5/9] SPEAr600 SoC support added Vipin KUMAR 2009-12-16 22:56 ` [U-Boot] [PATCH 4/9] usbd driver and usb boot firmware support for SPEAr SoCs Wolfgang Denk 2010-01-04 23:06 ` [U-Boot] [PATCH 3/9] nand driver " Scott Wood 1 sibling, 2 replies; 44+ messages in thread From: Vipin KUMAR @ 2009-12-16 9:18 UTC (permalink / raw) To: u-boot Signed-off-by: Vipin <vipin.kumar@st.com> --- common/main.c | 2 + drivers/serial/usbtty.h | 2 + drivers/usb/gadget/Makefile | 1 + drivers/usb/gadget/spr_udc.c | 996 +++++++++++++++++++++++++++++++++ include/asm-arm/arch-spear/spr_misc.h | 126 +++++ include/usb/spr_udc.h | 227 ++++++++ 6 files changed, 1354 insertions(+), 0 deletions(-) mode change 100644 => 100755 drivers/serial/usbtty.h mode change 100644 => 100755 drivers/usb/gadget/Makefile create mode 100755 drivers/usb/gadget/spr_udc.c create mode 100644 include/asm-arm/arch-spear/spr_misc.h create mode 100755 include/usb/spr_udc.h diff --git a/common/main.c b/common/main.c index 10d8904..79f3018 100644 --- a/common/main.c +++ b/common/main.c @@ -397,6 +397,7 @@ void main_loop (void) debug ("### main_loop: bootcmd=\"%s\"\n", s ? s : "<UNDEFINED>"); +#if !defined(CONFIG_SPEAR_USBTTY) if (bootdelay >= 0 && s && !abortboot (bootdelay)) { # ifdef CONFIG_AUTOBOOT_KEYED int prev = disable_ctrlc(1); /* disable Control C checking */ @@ -413,6 +414,7 @@ void main_loop (void) disable_ctrlc(prev); /* restore Control C checking */ # endif } +# endif # ifdef CONFIG_MENUKEY if (menukey == CONFIG_MENUKEY) { diff --git a/drivers/serial/usbtty.h b/drivers/serial/usbtty.h old mode 100644 new mode 100755 index f746d63..c96b93e --- a/drivers/serial/usbtty.h +++ b/drivers/serial/usbtty.h @@ -31,6 +31,8 @@ #include <usb/omap1510_udc.h> #elif defined(CONFIG_PXA27X) #include <usb/pxa27x_udc.h> +#elif defined(CONFIG_SPEAR3XX) || defined(CONFIG_SPEAR600) +#include <usb/spr_udc.h> #endif #include <version_autogenerated.h> diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile old mode 100644 new mode 100755 index 2a19b1e..1d7362d --- a/drivers/usb/gadget/Makefile +++ b/drivers/usb/gadget/Makefile @@ -32,6 +32,7 @@ COBJS-$(CONFIG_OMAP1510) += omap1510_udc.o COBJS-$(CONFIG_OMAP1610) += omap1510_udc.o COBJS-$(CONFIG_MPC885_FAMILY) += mpc8xx_udc.o COBJS-$(CONFIG_PXA27X) += pxa27x_udc.o +COBJS-$(CONFIG_SPEARUDC) += spr_udc.o endif COBJS := $(COBJS-y) diff --git a/drivers/usb/gadget/spr_udc.c b/drivers/usb/gadget/spr_udc.c new file mode 100755 index 0000000..5b135c7 --- /dev/null +++ b/drivers/usb/gadget/spr_udc.c @@ -0,0 +1,996 @@ +/* + * Based on drivers/usb/gadget/omap1510_udc.c + * TI OMAP1510 USB bus interface driver + * + * (C) Copyright 2009 + * Vipin Kumar, ST Micoelectronics, vipin.kumar at st.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> + +#include <usbdevice.h> +#include "ep0.h" +#include <usb/spr_udc.h> +#include <asm/arch/spr_misc.h> + +#define UDC_INIT_MDELAY 80 /* Device settle delay */ + +/* Some kind of debugging output... */ +#if 1 +#define UDCDBG(str) +#define UDCDBGA(fmt, args...) +#else +#define UDCDBG(str) serial_printf(str "\n") +#define UDCDBGA(fmt, args...) serial_printf(fmt "\n", ##args) +#endif + +static struct urb *ep0_urb; +static struct usb_device_instance *udc_device; + +static struct plug_regs *const plug_regs_p = + (struct plug_regs *const)CONFIG_SYS_PLUG_BASE; +static struct udc_regs *const udc_regs_p = + (struct udc_regs *const)CONFIG_SYS_USBD_BASE; +static struct udc_endp_regs *const outep_regs_p = + &((struct udc_regs *const)CONFIG_SYS_USBD_BASE)->out_regs[0]; +static struct udc_endp_regs *const inep_regs_p = + &((struct udc_regs *const)CONFIG_SYS_USBD_BASE)->in_regs[0]; + +/* + * udc_state_transition - Write the next packet to TxFIFO. + * @initial: Initial state. + * @final: Final state. + * + * Helper function to implement device state changes. The device states and + * the events that transition between them are: + * + * STATE_ATTACHED + * || /\ + * \/ || + * DEVICE_HUB_CONFIGURED DEVICE_HUB_RESET + * || /\ + * \/ || + * STATE_POWERED + * || /\ + * \/ || + * DEVICE_RESET DEVICE_POWER_INTERRUPTION + * || /\ + * \/ || + * STATE_DEFAULT + * || /\ + * \/ || + * DEVICE_ADDRESS_ASSIGNED DEVICE_RESET + * || /\ + * \/ || + * STATE_ADDRESSED + * || /\ + * \/ || + * DEVICE_CONFIGURED DEVICE_DE_CONFIGURED + * || /\ + * \/ || + * STATE_CONFIGURED + * + * udc_state_transition transitions up (in the direction from STATE_ATTACHED + * to STATE_CONFIGURED) from the specified initial state to the specified final + * state, passing through each intermediate state on the way. If the initial + * state is at or above (i.e. nearer to STATE_CONFIGURED) the final state, then + * no state transitions will take place. + * + * udc_state_transition also transitions down (in the direction from + * STATE_CONFIGURED to STATE_ATTACHED) from the specified initial state to the + * specified final state, passing through each intermediate state on the way. + * If the initial state is at or below (i.e. nearer to STATE_ATTACHED) the final + * state, then no state transitions will take place. + * + * This function must only be called with interrupts disabled. + */ +static void udc_state_transition(usb_device_state_t initial, + usb_device_state_t final) +{ + if (initial < final) { + switch (initial) { + case STATE_ATTACHED: + usbd_device_event_irq(udc_device, + DEVICE_HUB_CONFIGURED, 0); + if (final == STATE_POWERED) + break; + case STATE_POWERED: + usbd_device_event_irq(udc_device, DEVICE_RESET, 0); + if (final == STATE_DEFAULT) + break; + case STATE_DEFAULT: + usbd_device_event_irq(udc_device, + DEVICE_ADDRESS_ASSIGNED, 0); + if (final == STATE_ADDRESSED) + break; + case STATE_ADDRESSED: + usbd_device_event_irq(udc_device, DEVICE_CONFIGURED, 0); + case STATE_CONFIGURED: + break; + default: + break; + } + } else if (initial > final) { + switch (initial) { + case STATE_CONFIGURED: + usbd_device_event_irq(udc_device, + DEVICE_DE_CONFIGURED, 0); + if (final == STATE_ADDRESSED) + break; + case STATE_ADDRESSED: + usbd_device_event_irq(udc_device, DEVICE_RESET, 0); + if (final == STATE_DEFAULT) + break; + case STATE_DEFAULT: + usbd_device_event_irq(udc_device, + DEVICE_POWER_INTERRUPTION, 0); + if (final == STATE_POWERED) + break; + case STATE_POWERED: + usbd_device_event_irq(udc_device, DEVICE_HUB_RESET, 0); + case STATE_ATTACHED: + break; + default: + break; + } + } +} + +/* Stall endpoint */ +static void udc_stall_ep(u32 ep_num) +{ + writel(readl(&inep_regs_p[ep_num].endp_cntl) | ENDP_CNTL_STALL, + &inep_regs_p[ep_num].endp_cntl); + + writel(readl(&outep_regs_p[ep_num].endp_cntl) | ENDP_CNTL_STALL, + &outep_regs_p[ep_num].endp_cntl); +} + +static void *get_fifo(int ep_num, int in) +{ + u32 *fifo_ptr = (u32 *)CONFIG_SYS_FIFO_BASE; + + switch (ep_num) { + case 3: + fifo_ptr += readl(&inep_regs_p[1].endp_bsorfn); + /* break intentionally left out */ + + case 1: + fifo_ptr += readl(&inep_regs_p[0].endp_bsorfn); + /* break intentionally left out */ + + case 0: + default: + if (in) { + fifo_ptr += + readl(&outep_regs_p[2].endp_maxpacksize) >> 16; + /* break intentionally left out */ + } else { + break; + } + + case 2: + fifo_ptr += readl(&outep_regs_p[0].endp_maxpacksize) >> 16; + /* break intentionally left out */ + } + + return (void *)fifo_ptr; +} + +static short usbgetpckfromfifo(int epNum, u8 *bufp, u32 len) +{ + u8 *fifo_ptr = (u8 *)get_fifo(epNum, 0); + u32 i, nw, nb; + u32 *wrdp; + u8 *bytp; + + if (readl(&udc_regs_p->dev_stat) & DEV_STAT_RXFIFO_EMPTY) + return -1; + + nw = len / sizeof(u32); + nb = len % sizeof(u32); + + wrdp = (u32 *)bufp; + for (i = 0; i < nw; i++) { + writel(readl(fifo_ptr), wrdp); + wrdp++; + } + + bytp = (u8 *)wrdp; + for (i = 0; i < nb; i++) { + writeb(readb(fifo_ptr), bytp); + fifo_ptr++; + bytp++; + } + readl(&outep_regs_p[epNum].write_done); + + return 0; +} + +static void usbputpcktofifo(int epNum, u8 *bufp, u32 len) +{ + u32 i, nw, nb; + u32 *wrdp; + u8 *bytp; + u8 *fifo_ptr = get_fifo(epNum, 1); + + nw = len / sizeof(int); + nb = len % sizeof(int); + wrdp = (u32 *)bufp; + for (i = 0; i < nw; i++) { + writel(*wrdp, fifo_ptr); + wrdp++; + } + + bytp = (u8 *)wrdp; + for (i = 0; i < nb; i++) { + writeb(*bytp, fifo_ptr); + fifo_ptr++; + bytp++; + } +} + +/* + * spear_write_noniso_tx_fifo - Write the next packet to TxFIFO. + * @endpoint: Endpoint pointer. + * + * If the endpoint has an active tx_urb, then the next packet of data from the + * URB is written to the tx FIFO. The total amount of data in the urb is given + * by urb->actual_length. The maximum amount of data that can be sent in any + * one packet is given by endpoint->tx_packetSize. The number of data bytes + * from this URB that have already been transmitted is given by endpoint->sent. + * endpoint->last is updated by this routine with the number of data bytes + * transmitted in this packet. + * + */ +static void spear_write_noniso_tx_fifo(struct usb_endpoint_instance + *endpoint) +{ + struct urb *urb = endpoint->tx_urb; + int align; + + if (urb) { + u32 last; + + UDCDBGA("urb->buffer %p, buffer_length %d, actual_length %d", + urb->buffer, urb->buffer_length, urb->actual_length); + + last = MIN(urb->actual_length - endpoint->sent, + endpoint->tx_packetSize); + + if (last) { + u8 *cp = urb->buffer + endpoint->sent; + + /* This ensures that USBD packet fifo is accessed + :- through word aligned pointer or + :- through non word aligned pointer but only with a + max length to make the next packet word aligned */ + + align = ((ulong)cp % sizeof(int)); + if (align) + last = MIN(last, sizeof(int) - align); + + UDCDBGA("endpoint->sent %d, tx_packetSize %d, last %d", + endpoint->sent, endpoint->tx_packetSize, last); + + usbputpcktofifo(endpoint->endpoint_address & + USB_ENDPOINT_NUMBER_MASK, cp, last); + } + endpoint->last = last; + } +} + +/* Handle SETUP USB interrupt. + * This function implements TRM Figure 14-14. + */ +static void spear_udc_setup(struct usb_endpoint_instance *endpoint) +{ + u8 *datap = (u8 *)&ep0_urb->device_request; + int ep_addr = endpoint->endpoint_address; + + UDCDBG("-> Entering device setup"); + usbgetpckfromfifo(ep_addr, datap, 8); + + /* Try to process setup packet */ + if (ep0_recv_setup(ep0_urb)) { + /* Not a setup packet, stall next EP0 transaction */ + udc_stall_ep(0); + UDCDBG("can't parse setup packet, still waiting for setup"); + return; + } + + /* Check direction */ + if ((ep0_urb->device_request.bmRequestType & USB_REQ_DIRECTION_MASK) + == USB_REQ_HOST2DEVICE) { + UDCDBG("control write on EP0"); + if (le16_to_cpu(ep0_urb->device_request.wLength)) { + /* Stall this request */ + UDCDBG("Stalling unsupported EP0 control write data " + "stage."); + udc_stall_ep(0); + } + } else { + + UDCDBG("control read on EP0"); + /* The ep0_recv_setup function has already placed our response + * packet data in ep0_urb->buffer and the packet length in + * ep0_urb->actual_length. + */ + endpoint->tx_urb = ep0_urb; + endpoint->sent = 0; + /* Write packet data to the FIFO. spear_write_noniso_tx_fifo + * will update endpoint->last with the number of bytes written + * to the FIFO. + */ + spear_write_noniso_tx_fifo(endpoint); + + writel(0x0, &inep_regs_p[ep_addr].write_done); + } + + udc_unset_nak(endpoint->endpoint_address); + + UDCDBG("<- Leaving device setup"); +} + +/* + * Handle endpoint 0 RX interrupt + */ +static void spear_udc_ep0_rx(struct usb_endpoint_instance *endpoint) +{ + u8 dummy[64]; + + UDCDBG("RX on EP0"); + + /* Check direction */ + if ((ep0_urb->device_request.bmRequestType + & USB_REQ_DIRECTION_MASK) == USB_REQ_HOST2DEVICE) { + /* This rx interrupt must be for a control write data + * stage packet. + * + * We don't support control write data stages. + * We should never end up here. + */ + + UDCDBG("Stalling unexpected EP0 control write " + "data stage packet"); + udc_stall_ep(0); + } else { + /* This rx interrupt must be for a control read status + * stage packet. + */ + UDCDBG("ACK on EP0 control read status stage packet"); + u32 len = (readl(&outep_regs_p[0].endp_status) >> 11) & 0xfff; + usbgetpckfromfifo(0, dummy, len); + } +} + +/* + * Handle endpoint 0 TX interrupt + */ +static void spear_udc_ep0_tx(struct usb_endpoint_instance *endpoint) +{ + struct usb_device_request *request = &ep0_urb->device_request; + int ep_addr; + + UDCDBG("TX on EP0"); + + /* Check direction */ + if ((request->bmRequestType & USB_REQ_DIRECTION_MASK) == + USB_REQ_HOST2DEVICE) { + /* This tx interrupt must be for a control write status + * stage packet. + */ + UDCDBG("ACK on EP0 control write status stage packet"); + } else { + /* This tx interrupt must be for a control read data + * stage packet. + */ + int wLength = le16_to_cpu(request->wLength); + + /* Update our count of bytes sent so far in this + * transfer. + */ + endpoint->sent += endpoint->last; + + /* We are finished with this transfer if we have sent + * all of the bytes in our tx urb (urb->actual_length) + * unless we need a zero-length terminating packet. We + * need a zero-length terminating packet if we returned + * fewer bytes than were requested (wLength) by the host, + * and the number of bytes we returned is an exact + * multiple of the packet size endpoint->tx_packetSize. + */ + if ((endpoint->sent == ep0_urb->actual_length) && + ((ep0_urb->actual_length == wLength) || + (endpoint->last != endpoint->tx_packetSize))) { + /* Done with control read data stage. */ + UDCDBG("control read data stage complete"); + } else { + /* We still have another packet of data to send + * in this control read data stage or else we + * need a zero-length terminating packet. + */ + UDCDBG("ACK control read data stage packet"); + spear_write_noniso_tx_fifo(endpoint); + + ep_addr = endpoint->endpoint_address; + writel(0x0, &inep_regs_p[ep_addr].write_done); + } + } +} + +static struct usb_endpoint_instance *spear_find_ep(int ep) +{ + int i; + + for (i = 0; i < udc_device->bus->max_endpoints; i++) { + if ((udc_device->bus->endpoint_array[i].endpoint_address & + USB_ENDPOINT_NUMBER_MASK) == ep) + return &udc_device->bus->endpoint_array[i]; + } + return NULL; +} + +/* + * Handle RX transaction on non-ISO endpoint. + * The ep argument is a physical endpoint number for a non-ISO IN endpoint + * in the range 1 to 15. + */ +static void spear_udc_epn_rx(int ep) +{ + int nbytes = 0; + struct urb *urb; + struct usb_endpoint_instance *endpoint = spear_find_ep(ep); + + if (endpoint) { + urb = endpoint->rcv_urb; + + if (urb) { + u8 *cp = urb->buffer + urb->actual_length; + + nbytes = (readl(&outep_regs_p[ep].endp_status) >> 11) & + 0xfff; + usbgetpckfromfifo(ep, cp, nbytes); + usbd_rcv_complete(endpoint, nbytes, 0); + } + } +} + +/* + * Handle TX transaction on non-ISO endpoint. + * The ep argument is a physical endpoint number for a non-ISO IN endpoint + * in the range 16 to 30. + */ +static void spear_udc_epn_tx(int ep) +{ + struct usb_endpoint_instance *endpoint = spear_find_ep(ep); + + /* We need to transmit a terminating zero-length packet now if + * we have sent all of the data in this URB and the transfer + * size was an exact multiple of the packet size. + */ + if (endpoint->tx_urb && endpoint->tx_urb->actual_length) { + if (endpoint->last == endpoint->tx_packetSize) { + /* handle zero length packet here */ + writel(0x0, &inep_regs_p[ep].write_done); + } + /* retire the data that was just sent */ + usbd_tx_complete(endpoint); + /* Check to see if we have more data ready to transmit + * now. + */ + if (endpoint->tx_urb && endpoint->tx_urb->actual_length) { + /* write data to FIFO */ + spear_write_noniso_tx_fifo(endpoint); + writel(0x0, &inep_regs_p[ep].write_done); + + } else if (endpoint->tx_urb + && (endpoint->tx_urb->actual_length == 0)) { + /* udc_set_nak(ep); */ + } + } +} + +/* + * Start of public functions. + */ + +/* Called to start packet transmission. */ +int udc_endpoint_write(struct usb_endpoint_instance *endpoint) +{ + /* + spear_write_noniso_tx_fifo (endpoint); + spear_udc_epn_tx (endpoint->endpoint_address & + USB_ENDPOINT_NUMBER_MASK); + */ + udc_unset_nak(endpoint->endpoint_address & USB_ENDPOINT_NUMBER_MASK); + return 0; +} + +/* Start to initialize h/w stuff */ +int udc_init(void) +{ + int i; + u32 plug_st; + + udc_device = NULL; + + UDCDBG("starting"); + + readl(&plug_regs_p->plug_pending); + + udc_disconnect(); + + for (i = 0; i < UDC_INIT_MDELAY; i++) + udelay(1000); + + plug_st = readl(&plug_regs_p->plug_state); + writel(plug_st | PLUG_STATUS_EN, &plug_regs_p->plug_state); + + writel(~0x0, &udc_regs_p->endp_int); + writel(~0x0, &udc_regs_p->dev_int_mask); + writel(~0x0, &udc_regs_p->endp_int_mask); + + writel(DEV_CONF_FS_SPEED | DEV_CONF_REMWAKEUP | + DEV_CONF_SELFPOW | /* Dev_Conf_SYNCFRAME | */ + DEV_CONF_PHYINT_16, + &udc_regs_p->dev_conf); + + writel(0x0, &udc_regs_p->dev_cntl); + + /* Clear all interrupts pending */ + writel(DEV_INT_MSK, &udc_regs_p->dev_int); + + return 0; +} + +/* + * udc_setup_ep - setup endpoint + * Associate a physical endpoint with endpoint_instance + */ +void udc_setup_ep(struct usb_device_instance *device, + u32 ep, struct usb_endpoint_instance *endpoint) +{ + UDCDBGA("setting up endpoint addr %x", endpoint->endpoint_address); + int ep_addr; + int ep_num, ep_type; + int packet_size; + int buffer_size; + int attributes; + char *tt; + u32 endp_intmask; + + tt = getenv("usbtty"); + if (!tt) + tt = "generic"; + + ep_addr = endpoint->endpoint_address; + ep_num = ep_addr & USB_ENDPOINT_NUMBER_MASK; + + if ((ep_addr & USB_ENDPOINT_DIR_MASK) == USB_DIR_IN) { + /* IN endpoint */ + packet_size = endpoint->tx_packetSize; + buffer_size = packet_size * 2; + attributes = endpoint->tx_attributes; + } else { + /* OUT endpoint */ + packet_size = endpoint->rcv_packetSize; + buffer_size = packet_size * 2; + attributes = endpoint->rcv_attributes; + } + + switch (attributes & USB_ENDPOINT_XFERTYPE_MASK) { + case USB_ENDPOINT_XFER_CONTROL: + ep_type = ENDP_EPTYPE_CNTL; + break; + case USB_ENDPOINT_XFER_BULK: + default: + ep_type = ENDP_EPTYPE_BULK; + break; + case USB_ENDPOINT_XFER_INT: + ep_type = ENDP_EPTYPE_INT; + break; + case USB_ENDPOINT_XFER_ISOC: + ep_type = ENDP_EPTYPE_ISO; + break; + } + + struct udc_endp_regs *out_p = &outep_regs_p[ep_num]; + struct udc_endp_regs *in_p = &inep_regs_p[ep_num]; + + if (!ep_addr) { + /* Setup endpoint 0 */ + buffer_size = packet_size; + + writel(readl(&in_p->endp_cntl) | ENDP_CNTL_CNAK, + &in_p->endp_cntl); + + writel(readl(&out_p->endp_cntl) | ENDP_CNTL_CNAK, + &out_p->endp_cntl); + + writel(ENDP_CNTL_CONTROL | ENDP_CNTL_FLUSH, &in_p->endp_cntl); + + writel(buffer_size/sizeof(int), &in_p->endp_bsorfn); + + writel(packet_size, &in_p->endp_maxpacksize); + + writel(ENDP_CNTL_CONTROL | ENDP_CNTL_RRDY, &out_p->endp_cntl); + + writel(packet_size | ((buffer_size/sizeof(int)) << 16), + &out_p->endp_maxpacksize); + + writel((packet_size << 19) | ENDP_EPTYPE_CNTL, + &udc_regs_p->udc_endp_reg[ep_num]); + + } else if ((ep_addr & USB_ENDPOINT_DIR_MASK) == USB_DIR_IN) { + /* Setup the IN endpoint */ + writel(0x0, &in_p->endp_status); + writel((ep_type << 4) | ENDP_CNTL_RRDY, &in_p->endp_cntl); + writel(buffer_size/sizeof(int), &in_p->endp_bsorfn); + writel(packet_size, &in_p->endp_maxpacksize); + + if (!strcmp(tt, "cdc_acm")) { + if (ep_type == ENDP_EPTYPE_INT) { + /* Conf no. 1 Interface no. 0 */ + writel((packet_size << 19) | + ENDP_EPDIR_IN | (1 << 7) | + (0 << 11) | (ep_type << 5) | ep_num, + &udc_regs_p->udc_endp_reg[ep_num]); + } else { + /* Conf no. 1 Interface no. 1 */ + writel((packet_size << 19) | + ENDP_EPDIR_IN | (1 << 7) | + (1 << 11) | (ep_type << 5) | ep_num, + &udc_regs_p->udc_endp_reg[ep_num]); + } + } else { + /* Conf no. 1 Interface no. 0 */ + writel((packet_size << 19) | + ENDP_EPDIR_IN | (1 << 7) | + (0 << 11) | (ep_type << 5) | ep_num, + &udc_regs_p->udc_endp_reg[ep_num]); + } + + } else { + /* Setup the OUT endpoint */ + writel(0x0, &out_p->endp_status); + writel((ep_type << 4) | ENDP_CNTL_RRDY, &out_p->endp_cntl); + writel(packet_size | ((buffer_size/sizeof(int)) << 16), + &out_p->endp_maxpacksize); + + if (!strcmp(tt, "cdc_acm")) { + writel((packet_size << 19) | + ENDP_EPDIR_OUT | (1 << 7) | + (1 << 11) | (ep_type << 5) | ep_num, + &udc_regs_p->udc_endp_reg[ep_num]); + } else { + writel((packet_size << 19) | + ENDP_EPDIR_OUT | (1 << 7) | + (0 << 11) | (ep_type << 5) | ep_num, + &udc_regs_p->udc_endp_reg[ep_num]); + } + + } + + endp_intmask = readl(&udc_regs_p->endp_int_mask); + endp_intmask &= ~((1 << ep_num) | 0x10000 << ep_num); + writel(endp_intmask, &udc_regs_p->endp_int_mask); +} + +/* Turn on the USB connection by enabling the pullup resistor */ +void udc_connect(void) +{ + u32 plug_st; + + plug_st = readl(&plug_regs_p->plug_state); + plug_st &= ~(PLUG_STATUS_PHY_RESET | PLUG_STATUS_PHY_MODE); + writel(plug_st, &plug_regs_p->plug_state); +} + +/* Turn off the USB connection by disabling the pullup resistor */ +void udc_disconnect(void) +{ + u32 plug_st; + + plug_st = readl(&plug_regs_p->plug_state); + plug_st |= (PLUG_STATUS_PHY_RESET | PLUG_STATUS_PHY_MODE); + writel(plug_st, &plug_regs_p->plug_state); +} + +/* Switch on the UDC */ +void udc_enable(struct usb_device_instance *device) +{ + UDCDBGA("enable device %p, status %d", device, device->status); + + /* Save the device structure pointer */ + udc_device = device; + + /* Setup ep0 urb */ + if (!ep0_urb) { + ep0_urb = + usbd_alloc_urb(udc_device, udc_device->bus->endpoint_array); + } else { + serial_printf("udc_enable: ep0_urb already allocated %p\n", + ep0_urb); + } + + writel(DEV_INT_SOF, &udc_regs_p->dev_int_mask); +} + +/** + * udc_startup - allow udc code to do any additional startup + */ +void udc_startup_events(struct usb_device_instance *device) +{ + /* The DEVICE_INIT event puts the USB device in the state STATE_INIT. */ + usbd_device_event_irq(device, DEVICE_INIT, 0); + + /* The DEVICE_CREATE event puts the USB device in the state + * STATE_ATTACHED. + */ + usbd_device_event_irq(device, DEVICE_CREATE, 0); + + /* Some USB controller driver implementations signal + * DEVICE_HUB_CONFIGURED and DEVICE_RESET events here. + * DEVICE_HUB_CONFIGURED causes a transition to the state STATE_POWERED, + * and DEVICE_RESET causes a transition to the state STATE_DEFAULT. + * The SPEAr USB client controller has the capability to detect when the + * USB cable is connected to a powered USB bus, so we will defer the + * DEVICE_HUB_CONFIGURED and DEVICE_RESET events until later. + */ + + udc_enable(device); +} + +/* + * Plug detection interrupt handling + */ +void spear_udc_plug_irq(void) +{ + if (readl(&plug_regs_p->plug_state) & PLUG_STATUS_ATTACHED) { + /* USB cable attached + * Turn off PHY reset bit (PLUG detect). + * Switch PHY opmode to normal operation (PLUG detect). + */ + udc_connect(); + writel(DEV_INT_SOF, &udc_regs_p->dev_int_mask); + + UDCDBG("device attached and powered"); + udc_state_transition(udc_device->device_state, STATE_POWERED); + } else { + /* USB cable detached + * Reset the PHY and switch the mode. + */ + udc_disconnect(); + writel(~0x0, &udc_regs_p->dev_int_mask); + + UDCDBG("device detached or unpowered"); + udc_state_transition(udc_device->device_state, STATE_ATTACHED); + } +} + +/* + * Device interrupt handling + */ +void spear_udc_dev_irq(void) +{ + u32 plug_st; + + if (readl(&udc_regs_p->dev_int) & DEV_INT_USBRESET) { + writel(~0x0, &udc_regs_p->endp_int_mask); + + udc_connect(); + + writel(readl(&inep_regs_p[0].endp_cntl) | ENDP_CNTL_FLUSH, + &inep_regs_p[0].endp_cntl); + + writel(DEV_INT_USBRESET, &udc_regs_p->dev_int); + + UDCDBG("device reset in progess"); + udc_state_transition(udc_device->device_state, STATE_DEFAULT); + } + + /* Device Enumeration completed */ + if (readl(&udc_regs_p->dev_int) & DEV_INT_ENUM) { + writel(DEV_INT_ENUM, &udc_regs_p->dev_int); + + /* Endpoint interrupt enabled for Ctrl IN & Ctrl OUT */ + writel(readl(&udc_regs_p->endp_int_mask) & ~0x10001, + &udc_regs_p->endp_int_mask); + + UDCDBG("default -> addressed"); + udc_state_transition(udc_device->device_state, STATE_ADDRESSED); + } + + /* The USB will be in SUSPEND in 3 ms */ + if (readl(&udc_regs_p->dev_int) & DEV_INT_INACTIVE) { + writel(DEV_INT_INACTIVE, &udc_regs_p->dev_int); + + UDCDBG("entering inactive state"); + /* usbd_device_event_irq(udc_device, DEVICE_BUS_INACTIVE, 0); */ + } + + /* SetConfiguration command received */ + if (readl(&udc_regs_p->dev_int) & DEV_INT_SETCFG) { + writel(DEV_INT_SETCFG, &udc_regs_p->dev_int); + + UDCDBG("entering configured state"); + udc_state_transition(udc_device->device_state, + STATE_CONFIGURED); + } + + /* SetInterface command received */ + if (readl(&udc_regs_p->dev_int) & DEV_INT_SETINTF) { + writel(DEV_INT_SETINTF, &udc_regs_p->dev_int); + } + + /* USB Suspend detected on cable */ + if (readl(&udc_regs_p->dev_int) & DEV_INT_SUSPUSB) { + writel(DEV_INT_SUSPUSB, &udc_regs_p->dev_int); + + UDCDBG("entering suspended state"); + usbd_device_event_irq(udc_device, DEVICE_BUS_INACTIVE, 0); + } + + /* USB Start-Of-Frame detected on cable */ + if (readl(&udc_regs_p->dev_int) & DEV_INT_SOF) { + writel(DEV_INT_SOF, &udc_regs_p->dev_int); + } +} + +/* + * Endpoint interrupt handling + */ +void spear_udc_endpoint_irq(void) +{ + while (readl(&udc_regs_p->endp_int) & ENDP0_INT_CTRLOUT) { + + writel(ENDP0_INT_CTRLOUT, &udc_regs_p->endp_int); + + if ((readl(&outep_regs_p[0].endp_status) & ENDP_STATUS_OUTMSK) + == ENDP_STATUS_OUT_SETUP) { + spear_udc_setup(udc_device->bus->endpoint_array + 0); + writel(ENDP_STATUS_OUT_SETUP, + &outep_regs_p[0].endp_status); + + } else + if ((readl(&outep_regs_p[0].endp_status) & ENDP_STATUS_OUTMSK) + == ENDP_STATUS_OUT_DATA) { + spear_udc_ep0_rx(udc_device->bus->endpoint_array + 0); + writel(ENDP_STATUS_OUT_DATA, + &outep_regs_p[0].endp_status); + + } else + if ((readl(&outep_regs_p[0].endp_status) & ENDP_STATUS_OUTMSK) + == ENDP_STATUS_OUT_NONE) { + /* NONE received */ + } + + writel(0x0, &outep_regs_p[0].endp_status); + } + + if (readl(&udc_regs_p->endp_int) & ENDP0_INT_CTRLIN) { + spear_udc_ep0_tx(udc_device->bus->endpoint_array + 0); + + writel(ENDP_STATUS_IN, &inep_regs_p[0].endp_status); + writel(ENDP0_INT_CTRLIN, &udc_regs_p->endp_int); + } + + while (readl(&udc_regs_p->endp_int) & ENDP_INT_NONISOOUT_MSK) { + u32 epnum = 0; + u32 ep_int = readl(&udc_regs_p->endp_int) & + ENDP_INT_NONISOOUT_MSK; + + ep_int >>= 16; + while (0x0 == (ep_int & 0x1)) { + ep_int >>= 1; + epnum++; + } + + writel((1 << 16) << epnum, &udc_regs_p->endp_int); + + if ((readl(&outep_regs_p[epnum].endp_status) & + ENDP_STATUS_OUTMSK) == ENDP_STATUS_OUT_DATA) { + + spear_udc_epn_rx(epnum); + writel(ENDP_STATUS_OUT_DATA, + &outep_regs_p[epnum].endp_status); + } else + if ((readl(&outep_regs_p[epnum].endp_status) & + ENDP_STATUS_OUTMSK) == ENDP_STATUS_OUT_NONE) { + writel(0x0, &outep_regs_p[epnum].endp_status); + } + } + + if (readl(&udc_regs_p->endp_int) & ENDP_INT_NONISOIN_MSK) { + u32 epnum = 0; + u32 ep_int = readl(&udc_regs_p->endp_int) & + ENDP_INT_NONISOIN_MSK; + + while (0x0 == (ep_int & 0x1)) { + ep_int >>= 1; + epnum++; + } + + if (readl(&inep_regs_p[epnum].endp_status) & ENDP_STATUS_IN) { + writel(ENDP_STATUS_IN, + &outep_regs_p[epnum].endp_status); + spear_udc_epn_tx(epnum); + + writel(ENDP_STATUS_IN, + &outep_regs_p[epnum].endp_status); + } + + writel((1 << epnum), &udc_regs_p->endp_int); + } +} + +/* + * UDC interrupts + */ +void udc_irq(void) +{ + /* Loop while we have interrupts. + * If we don't do this, the input chain + * polling delay is likely to miss + * host requests. + */ + while (readl(&plug_regs_p->plug_pending)) + spear_udc_plug_irq(); + + while (readl(&udc_regs_p->dev_int)) + spear_udc_dev_irq(); + + if (readl(&udc_regs_p->endp_int)) + spear_udc_endpoint_irq(); +} + +/* Flow control */ +void udc_set_nak(int epid) +{ + writel(readl(&inep_regs_p[epid].endp_cntl) | ENDP_CNTL_SNAK, + &inep_regs_p[epid].endp_cntl); + + writel(readl(&outep_regs_p[epid].endp_cntl) | ENDP_CNTL_SNAK, + &outep_regs_p[epid].endp_cntl); +} + +void udc_unset_nak(int epid) +{ + u32 val; + + val = readl(&inep_regs_p[epid].endp_cntl); + val &= ~ENDP_CNTL_SNAK; + val |= ENDP_CNTL_CNAK; + writel(val, &inep_regs_p[epid].endp_cntl); + + val = readl(&outep_regs_p[epid].endp_cntl); + val &= ~ENDP_CNTL_SNAK; + val |= ENDP_CNTL_CNAK; + writel(val, &outep_regs_p[epid].endp_cntl); +} + +/******************************************************************* + * SLAVE MODE :: + * Routines to acces RX/TX FIFOs directly. + *******************************************************************/ + diff --git a/include/asm-arm/arch-spear/spr_misc.h b/include/asm-arm/arch-spear/spr_misc.h new file mode 100644 index 0000000..15cb712 --- /dev/null +++ b/include/asm-arm/arch-spear/spr_misc.h @@ -0,0 +1,126 @@ +/* + * (C) Copyright 2009 + * Vipin Kumar, ST Micoelectronics, vipin.kumar at st.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _SPR_MISC_H +#define _SPR_MISC_H + +struct misc_regs { + u32 auto_cfg_reg; /* 0x0 */ + u32 armdbg_ctr_reg; /* 0x4 */ + u32 pll1_cntl; /* 0x8 */ + u32 pll1_frq; /* 0xc */ + u32 pll1_mod; /* 0x10 */ + u32 pll2_cntl; /* 0x14 */ + u32 pll2_frq; /* 0x18 */ + u32 pll2_mod; /* 0x1C */ + u32 pll_ctr_reg; /* 0x20 */ + u32 amba_clk_cfg; /* 0x24 */ + u32 periph_clk_cfg; /* 0x28 */ + u32 periph1_clken; /* 0x2C */ + u32 periph2_clken; /* 0x30 */ + u32 ras_clken; /* 0x34 */ + u32 periph1_rst; /* 0x38 */ + u32 periph2_rst; /* 0x3C */ + u32 ras_rst; /* 0x40 */ + u32 prsc1_clk_cfg; /* 0x44 */ + u32 prsc2_clk_cfg; /* 0x48 */ + u32 prsc3_clk_cfg; /* 0x4C */ + u32 amem_cfg_ctrl; /* 0x50 */ + u32 port_cfg_ctrl; /* 0x54 */ + u32 reserved_1; /* 0x58 */ + u32 clcd_synth_clk; /* 0x5C */ + u32 irda_synth_clk; /* 0x60 */ + u32 uart_synth_clk; /* 0x64 */ + u32 gmac_synth_clk; /* 0x68 */ + u32 ras_synth1_clk; /* 0x6C */ + u32 ras_synth2_clk; /* 0x70 */ + u32 ras_synth3_clk; /* 0x74 */ + u32 ras_synth4_clk; /* 0x78 */ + u32 arb_icm_ml1; /* 0x7C */ + u32 arb_icm_ml2; /* 0x80 */ + u32 arb_icm_ml3; /* 0x84 */ + u32 arb_icm_ml4; /* 0x88 */ + u32 arb_icm_ml5; /* 0x8C */ + u32 arb_icm_ml6; /* 0x90 */ + u32 arb_icm_ml7; /* 0x94 */ + u32 arb_icm_ml8; /* 0x98 */ + u32 arb_icm_ml9; /* 0x9C */ + u32 dma_src_sel; /* 0xA0 */ + u32 uphy_ctr_reg; /* 0xA4 */ + u32 gmac_ctr_reg; /* 0xA8 */ + u32 port_bridge_ctrl; /* 0xAC */ + u32 reserved_2[4]; /* 0xB0--0xBC */ + u32 prc1_ilck_ctrl_reg; /* 0xC0 */ + u32 prc2_ilck_ctrl_reg; /* 0xC4 */ + u32 prc3_ilck_ctrl_reg; /* 0xC8 */ + u32 prc4_ilck_ctrl_reg; /* 0xCC */ + u32 prc1_intr_ctrl_reg; /* 0xD0 */ + u32 prc2_intr_ctrl_reg; /* 0xD4 */ + u32 prc3_intr_ctrl_reg; /* 0xD8 */ + u32 prc4_intr_ctrl_reg; /* 0xDC */ + u32 powerdown_cfg_reg; /* 0xE0 */ + u32 ddr_1v8_compensation; /* 0xE4 */ + u32 ddr_2v5_compensation; /* 0xE8 */ + u32 core_3v3_compensation; /* 0xEC */ + u32 ddr_pad; /* 0xF0 */ + u32 bist1_ctr_reg; /* 0xF4 */ + u32 bist2_ctr_reg; /* 0xF8 */ + u32 bist3_ctr_reg; /* 0xFC */ + u32 bist4_ctr_reg; /* 0x100 */ + u32 bist5_ctr_reg; /* 0x104 */ + u32 bist1_rslt_reg; /* 0x108 */ + u32 bist2_rslt_reg; /* 0x10C */ + u32 bist3_rslt_reg; /* 0x110 */ + u32 bist4_rslt_reg; /* 0x114 */ + u32 BIST5_RSLT_REG; /* 0x118 */ + u32 SYST_ERROR_REG; /* 0x11C */ + u32 reserved_3[0x1FB8]; /* 0x120--0x7FFC */ + u32 RAS_GPP1_IN; /* 0x8000 */ + u32 ras_gpp2_in; /* 0x8004 */ + u32 ras_gpp1_out; /* 0x8008 */ + u32 ras_gpp2_out; /* 0x800C */ +}; + +/* AUTO_CFG_REG value */ +#define MISC_SOCCFGMSK 0x0000003F +#define MISC_SOCCFG30 0x0000000C +#define MISC_SOCCFG31 0x0000000D +#define MISC_NANDDIS 0x00020000 + +/* PERIPH_CLK_CFG value */ +#define MISC_GPT3SYNTH 0x00000400 +#define MISC_GPT4SYNTH 0x00000800 + +/* PRSC_CLK_CFG value */ +/* + * Fout = Fin / (2^(N+1) * (M + 1)) + */ +#define MISC_PRSC_N_4 0x00004000 +#define MISC_PRSC_M_399 0x0000018F +#define MISC_PRSC_CFG (MISC_PRSC_N_4 | MISC_PRSC_M_399) + +/* PERIPH1_CLKEN, PERIPH1_RST value */ +#define MISC_USBDENB 0x01000000 + +#endif + diff --git a/include/usb/spr_udc.h b/include/usb/spr_udc.h new file mode 100755 index 0000000..9779b33 --- /dev/null +++ b/include/usb/spr_udc.h @@ -0,0 +1,227 @@ +/* + * (C) Copyright 2009 + * Vipin Kumar, ST Micoelectronics, vipin.kumar at st.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __SPR_UDC_H +#define __SPR_UDC_H + +/***************************************************************************** + * Defines for USBD + * + * The udc_ahb controller has three AHB slaves: + * + * 1. THe UDC registers + * 2. The plug detect + * 3. The RX/TX FIFO + *****************************************************************************/ + +#define MAX_ENDPOINTS 16 + +struct udc_endp_regs { + u32 endp_cntl; + u32 endp_status; + u32 endp_bsorfn; + u32 endp_maxpacksize; + u32 reserved_1; + u32 endp_desc_point; + u32 reserved_2; + u32 write_done; +}; + +/* Endpoint Control Register definitions */ + +#define ENDP_CNTL_STALL 0x00000001 +#define ENDP_CNTL_FLUSH 0x00000002 +#define ENDP_CNTL_SNOOP 0x00000004 +#define ENDP_CNTL_POLL 0x00000008 +#define ENDP_CNTL_CONTROL 0x00000000 +#define ENDP_CNTL_ISO 0x00000010 +#define ENDP_CNTL_BULK 0x00000020 +#define ENDP_CNTL_INT 0x00000030 +#define ENDP_CNTL_NAK 0x00000040 +#define ENDP_CNTL_SNAK 0x00000080 +#define ENDP_CNTL_CNAK 0x00000100 +#define ENDP_CNTL_RRDY 0x00000200 + +/* Endpoint Satus Register definitions */ + +#define ENDP_STATUS_PIDMSK 0x0000000f +#define ENDP_STATUS_OUTMSK 0x00000030 +#define ENDP_STATUS_OUT_NONE 0x00000000 +#define ENDP_STATUS_OUT_DATA 0x00000010 +#define ENDP_STATUS_OUT_SETUP 0x00000020 +#define ENDP_STATUS_IN 0x00000040 +#define ENDP_STATUS_BUFFNAV 0x00000080 +#define ENDP_STATUS_FATERR 0x00000100 +#define ENDP_STATUS_HOSTBUSERR 0x00000200 +#define ENDP_STATUS_TDC 0x00000400 +#define ENDP_STATUS_RXPKTMSK 0x003ff800 + +struct udc_regs { + struct udc_endp_regs in_regs[MAX_ENDPOINTS]; + struct udc_endp_regs out_regs[MAX_ENDPOINTS]; + u32 dev_conf; + u32 dev_cntl; + u32 dev_stat; + u32 dev_int; + u32 dev_int_mask; + u32 endp_int; + u32 endp_int_mask; + u32 reserved_3[0x39]; + u32 reserved_4; /* offset 0x500 */ + u32 udc_endp_reg[MAX_ENDPOINTS]; +}; + +/* Device Configuration Register definitions */ + +#define DEV_CONF_HS_SPEED 0x00000000 +#define DEV_CONF_LS_SPEED 0x00000002 +#define DEV_CONF_FS_SPEED 0x00000003 +#define DEV_CONF_REMWAKEUP 0x00000004 +#define DEV_CONF_SELFPOW 0x00000008 +#define DEV_CONF_SYNCFRAME 0x00000010 +#define DEV_CONF_PHYINT_8 0x00000020 +#define DEV_CONF_PHYINT_16 0x00000000 +#define DEV_CONF_UTMI_BIDIR 0x00000040 +#define DEV_CONF_STATUS_STALL 0x00000080 + +/* Device Control Register definitions */ + +#define DEV_CNTL_RESUME 0x00000001 +#define DEV_CNTL_TFFLUSH 0x00000002 +#define DEV_CNTL_RXDMAEN 0x00000004 +#define DEV_CNTL_TXDMAEN 0x00000008 +#define DEV_CNTL_DESCRUPD 0x00000010 +#define DEV_CNTL_BIGEND 0x00000020 +#define DEV_CNTL_BUFFILL 0x00000040 +#define DEV_CNTL_TSHLDEN 0x00000080 +#define DEV_CNTL_BURSTEN 0x00000100 +#define DEV_CNTL_DMAMODE 0x00000200 +#define DEV_CNTL_SOFTDISCONNECT 0x00000400 +#define DEV_CNTL_SCALEDOWN 0x00000800 +#define DEV_CNTL_BURSTLENU 0x00010000 +#define DEV_CNTL_BURSTLENMSK 0x00ff0000 +#define DEV_CNTL_TSHLDLENU 0x01000000 +#define DEV_CNTL_TSHLDLENMSK 0xff000000 + +/* Device Status Register definitions */ + +#define DEV_STAT_CFG 0x0000000f +#define DEV_STAT_INTF 0x000000f0 +#define DEV_STAT_ALT 0x00000f00 +#define DEV_STAT_SUSP 0x00001000 +#define DEV_STAT_ENUM 0x00006000 +#define DEV_STAT_ENUM_SPEED_HS 0x00000000 +#define DEV_STAT_ENUM_SPEED_FS 0x00002000 +#define DEV_STAT_ENUM_SPEED_LS 0x00004000 +#define DEV_STAT_RXFIFO_EMPTY 0x00008000 +#define DEV_STAT_PHY_ERR 0x00010000 +#define DEV_STAT_TS 0xf0000000 + +/* Device Interrupt Register definitions */ + +#define DEV_INT_MSK 0x0000007f +#define DEV_INT_SETCFG 0x00000001 +#define DEV_INT_SETINTF 0x00000002 +#define DEV_INT_INACTIVE 0x00000004 +#define DEV_INT_USBRESET 0x00000008 +#define DEV_INT_SUSPUSB 0x00000010 +#define DEV_INT_SOF 0x00000020 +#define DEV_INT_ENUM 0x00000040 + +/* Endpoint Interrupt Register definitions */ + +#define ENDP0_INT_CTRLIN 0x00000001 +#define ENDP1_INT_BULKIN 0x00000002 +#define ENDP_INT_NONISOIN_MSK 0x0000AAAA +#define ENDP2_INT_BULKIN 0x00000004 +#define ENDP0_INT_CTRLOUT 0x00010000 +#define ENDP1_INT_BULKOUT 0x00020000 +#define ENDP2_INT_BULKOUT 0x00040000 +#define ENDP_INT_NONISOOUT_MSK 0x55540000 + +/* Endpoint Register definitions */ +#define ENDP_EPDIR_OUT 0x00000000 +#define ENDP_EPDIR_IN 0x00000010 +#define ENDP_EPTYPE_CNTL 0x0 +#define ENDP_EPTYPE_ISO 0x1 +#define ENDP_EPTYPE_BULK 0x2 +#define ENDP_EPTYPE_INT 0x3 + +/* + * Defines for Plug Detect + */ + +struct plug_regs { + u32 plug_state; + u32 plug_pending; +}; + +/* Plug State Register definitions */ +#define PLUG_STATUS_EN 0x1 +#define PLUG_STATUS_ATTACHED 0x2 +#define PLUG_STATUS_PHY_RESET 0x4 +#define PLUG_STATUS_PHY_MODE 0x8 + +/* + * Defines for UDC FIFO (Slave Mode) + */ +struct udcfifo_regs { + u32 *fifo_p; +}; + +/* + * USBTTY definitions + */ +#define EP0_MAX_PACKET_SIZE 64 +#define UDC_INT_ENDPOINT 1 +#define UDC_INT_PACKET_SIZE 64 +#define UDC_OUT_ENDPOINT 2 +#define UDC_BULK_PACKET_SIZE 64 +#define UDC_IN_ENDPOINT 3 +#define UDC_OUT_PACKET_SIZE 64 +#define UDC_IN_PACKET_SIZE 64 + +/* + * Function declarations + */ + +void udc_irq(void); + +void udc_set_nak(int epid); +void udc_unset_nak(int epid); + +int udc_endpoint_write(struct usb_endpoint_instance *endpoint); + +int udc_init(void); + +void udc_enable(struct usb_device_instance *device); +void udc_disable(void); + +void udc_connect(void); +void udc_disconnect(void); + +void udc_startup_events(struct usb_device_instance *device); +void udc_setup_ep(struct usb_device_instance *device, unsigned int ep, + struct usb_endpoint_instance *endpoint); + +#endif /* __SPR_UDC_H */ -- 1.6.0.2 ^ permalink raw reply related [flat|nested] 44+ messages in thread
* [U-Boot] [PATCH 5/9] SPEAr600 SoC support added 2009-12-16 9:18 ` [U-Boot] [PATCH 4/9] usbd driver and usb boot firmware " Vipin KUMAR @ 2009-12-16 9:18 ` Vipin KUMAR 2009-12-16 9:18 ` [U-Boot] [PATCH 6/9] SPEAr300 " Vipin KUMAR ` (2 more replies) 2009-12-16 22:56 ` [U-Boot] [PATCH 4/9] usbd driver and usb boot firmware support for SPEAr SoCs Wolfgang Denk 1 sibling, 3 replies; 44+ messages in thread From: Vipin KUMAR @ 2009-12-16 9:18 UTC (permalink / raw) To: u-boot Signed-off-by: Vipin <vipin.kumar@st.com> --- board/spear/common/spr_lowlevel_init.S | 202 ++++++++++++++++++ board/spear/common/spr_misc.c | 270 ++++++++++++++++++++++++ board/spear/spear600/Makefile | 52 +++++ board/spear/spear600/config.mk | 39 ++++ board/spear/spear600/spr600_board.c | 53 +++++ common/cmd_bdinfo.c | 20 ++ cpu/arm926ejs/spear/Makefile | 52 +++++ cpu/arm926ejs/spear/reset.c | 49 +++++ cpu/arm926ejs/spear/timer.c | 148 +++++++++++++ include/asm-arm/arch-spear/spr_defs.h | 31 +++ include/asm-arm/arch-spear/spr_emi.h | 55 +++++ include/asm-arm/arch-spear/spr_gpt.h | 83 ++++++++ include/asm-arm/arch-spear/spr_syscntl.h | 38 ++++ include/asm-arm/arch-spear/spr_xloader_table.h | 67 ++++++ include/asm-arm/u-boot.h | 5 + include/configs/spear600.h | 260 +++++++++++++++++++++++ 16 files changed, 1424 insertions(+), 0 deletions(-) create mode 100755 board/spear/common/spr_lowlevel_init.S create mode 100755 board/spear/common/spr_misc.c create mode 100755 board/spear/spear600/Makefile create mode 100755 board/spear/spear600/config.mk create mode 100755 board/spear/spear600/spr600_board.c create mode 100755 cpu/arm926ejs/spear/Makefile create mode 100755 cpu/arm926ejs/spear/reset.c create mode 100755 cpu/arm926ejs/spear/timer.c create mode 100644 include/asm-arm/arch-spear/spr_defs.h create mode 100755 include/asm-arm/arch-spear/spr_emi.h create mode 100755 include/asm-arm/arch-spear/spr_gpt.h create mode 100644 include/asm-arm/arch-spear/spr_syscntl.h create mode 100755 include/asm-arm/arch-spear/spr_xloader_table.h create mode 100755 include/configs/spear600.h diff --git a/board/spear/common/spr_lowlevel_init.S b/board/spear/common/spr_lowlevel_init.S new file mode 100755 index 0000000..dcacff8 --- /dev/null +++ b/board/spear/common/spr_lowlevel_init.S @@ -0,0 +1,202 @@ +/* + * (C) Copyright 2006 + * Vipin Kumar, ST Micoelectronics, vipin.kumar at st.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <config.h> + +/* + * platform specific initializations are already done in Xloader + * Initializations already done include + * DDR, PLLs, IP's clock enable and reset release etc + */ +.globl lowlevel_init +lowlevel_init: + /* By default, U-Boot switches CPU to low-vector */ + /* Revert this as we work in high vector even in U-Boot */ + mrc p15, 0, r0, c1, c0, 0 + orr r0, r0, #0x00002000 + mcr p15, 0, r0, c1, c0, 0 + mov pc, lr + +#if defined (CONFIG_CMD_SETFREQ) + +/* ;void setfreq(unsigned int device, unsigned int frequency) */ +.global setfreq +setfreq: + stmfd sp!,{r14} + stmfd sp!,{r0-r12} + + mov r8,sp + ldr sp,SRAM_STACK_V + + /* ;Saving the function arguements for later use */ + mov r4,r0 + mov r5,r1 + + /* ;Putting DDR into self refresh */ + ldr r0,DDR_07_V + ldr r1,[r0] + ldr r2,DDR_ACTIVE_V + bic r1, r1, r2 + str r1,[r0] + ldr r0,DDR_57_V + ldr r1,[r0] + ldr r2,CYCLES_MASK_V + bic r1, r1, r2 + ldr r2,REFRESH_CYCLES_V + orr r1, r1, r2, lsl #16 + str r1,[r0] + ldr r0,DDR_07_V + ldr r1,[r0] + ldr r2,SREFRESH_MASK_V + orr r1, r1, r2 + str r1,[r0] + + b 1f + .align 5 +1: + /* ;Delay to ensure self refresh mode */ + ldr r0,SREFRESH_DELAY_V +1: + sub r0,r0,#1 + cmp r0,#0 + bne 1b + + /* ;Putting system in slow mode */ + ldr r0,SCCTRL_V + mov r1,#2 + str r1,[r0] + + /* ;Changing PLL(1/2) frequency */ + mov r0,r4 + mov r1,r5 + + cmp r4,#0 + beq 1f + + /* ;Change PLL2 (DDR frequency) */ + ldr r6,PLL2_FREQ_V + ldr r7,PLL2_CNTL_V + b 2f + +1: + /* ;Change PLL1 (CPU frequency) */ + ldr r6,PLL1_FREQ_V + ldr r7,PLL1_CNTL_V + +2: + mov r0,r6 + ldr r1,[r0] + ldr r2,PLLFREQ_MASK_V + bic r1,r1,r2 + mov r2,r5,lsr#1 + orr r1,r1,r2,lsl#24 + str r1,[r0] + + mov r0,r7 + ldr r1,P1C0A_V + str r1,[r0] + /* ;ldr r0,r7 */ + ldr r1,P1C0E_V + str r1,[r0] + /* ;ldr r0,r7 */ + ldr r1,P1C06_V + str r1,[r0] + /* ;ldr r0,r7 */ + ldr r1,P1C0E_V + str r1,[r0] + +1: + ldr r1,[r0] + and r1,r1,#1 + cmp r1,#0 + beq 1b + + /* ;Putting system back to normal mode */ + ldr r0,SCCTRL_V + mov r1,#4 + str r1,[r0] + + /* ;Putting DDR back to normal */ + ldr r0,DDR_07_V + ldr r1,[R0] + ldr r2,SREFRESH_MASK_V + bic r1, r1, r2 + str r1,[r0] + ldr r2,DDR_ACTIVE_V + orr r1, r1, r2 + str r1,[r0] + + /* ;Delay to ensure self refresh mode */ + ldr r0,SREFRESH_DELAY_V +1: + sub r0,r0,#1 + cmp r0,#0 + bne 1b + + mov sp,r8 + /* ;Resuming back to code */ + ldmia sp!,{r0-r12} + ldmia sp!,{pc} + +SCCTRL_V: + .word 0xfca00000 +PLL1_FREQ_V: + .word 0xfca8000C +PLL1_CNTL_V: + .word 0xfca80008 +PLL2_FREQ_V: + .word 0xfca80018 +PLL2_CNTL_V: + .word 0xfca80014 +PLLFREQ_MASK_V: + .word 0xff000000 +P1C0A_V: + .word 0x1C0A +P1C0E_V: + .word 0x1C0E +P1C06_V: + .word 0x1C06 + +SREFRESH_DELAY_V: + .word 0x9999 +SRAM_STACK_V: + .word 0xD2800600 +DDR_07_V: + .word 0xfc60001c +DDR_ACTIVE_V: + .word 0x01000000 +DDR_57_V: + .word 0xfc6000e4 +CYCLES_MASK_V: + .word 0xffff0000 +REFRESH_CYCLES_V: + .word 0xf0f0 +SREFRESH_MASK_V: + .word 0x00010000 + +.global setfreq_sz +setfreq_sz: + .word setfreq_sz - setfreq + +#endif + diff --git a/board/spear/common/spr_misc.c b/board/spear/common/spr_misc.c new file mode 100755 index 0000000..83698eb --- /dev/null +++ b/board/spear/common/spr_misc.c @@ -0,0 +1,270 @@ +/* + * (C) Copyright 2009 + * Vipin Kumar, ST Micoelectronics, vipin.kumar at st.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <command.h> +#include <i2c.h> +#include <net.h> +#include <asm/io.h> +#include <asm/arch/spr_emi.h> +#include <asm/arch/spr_xloader_table.h> +#include <asm/arch/spr_defs.h> + +DECLARE_GLOBAL_DATA_PTR; + +int dram_init(void) +{ + struct xloader_table *xloader_tb = + (struct xloader_table *) XLOADER_TABLE_ADDRESS; + struct xloader_table_1_1 *table_1_1; + struct xloader_table_1_2 *table_1_2; + + gd->bd->bi_dram[0].start = PHYS_SDRAM_1; + gd->bd->bi_dram[0].size = get_ram_size(PHYS_SDRAM_1, + PHYS_SDRAM_1_MAXSIZE); + + if (XLOADER_TABLE_VERSION_1_1 == xloader_tb->table_version) { + table_1_1 = &xloader_tb->table.table_1_1; + gd->bd->dramfreq = table_1_1->ddrfreq; + gd->bd->dramtype = table_1_1->ddrtype; + + } else if (XLOADER_TABLE_VERSION_1_2 == xloader_tb->table_version) { + table_1_2 = &xloader_tb->table.table_1_2; + gd->bd->dramfreq = table_1_2->ddrfreq; + gd->bd->dramtype = table_1_2->ddrtype; + } else { + gd->bd->dramfreq = -1; + } + + return 0; +} + +int misc_init_r(void) +{ +#if defined(CONFIG_CMD_NET) + uchar mac_id[6]; + + if (!i2c_read_mac(mac_id)) + eth_setenv_enetaddr("ethaddr", mac_id); +#endif + setenv("verify", "n"); + +#if defined(CONFIG_SPEAR_USBTTY) + setenv("stdin", "usbtty"); + setenv("stdout", "usbtty"); + setenv("stderr", "usbtty"); +#endif + return 0; +} + +#ifdef CONFIG_SPEAR_EMI +struct cust_emi_para { + unsigned int tap; + unsigned int tsdp; + unsigned int tdpw; + unsigned int tdpr; + unsigned int tdcs; + unsigned int control; +}; + +/* EMI timing setting of m28w640hc of linux kernel */ +const struct cust_emi_para emi_timing_m28w640hc = { + .tap = 0x10, + .tsdp = 0x05, + .tdpw = 0x0a, + .tdpr = 0x0a, + .tdcs = 0x05, +}; + +/* EMI timing setting of bootrom */ +const struct cust_emi_para emi_timing_bootrom = { + .tap = 0xf, + .tsdp = 0x0, + .tdpw = 0xff, + .tdpr = 0x111, + .tdcs = 0x02, +}; + +void spear_emi_init(void) +{ + const struct cust_emi_para *p = &emi_timing_m28w640hc; + struct emi_regs *emi_regs_p = + (struct emi_regs *)CONFIG_SPEAR_EMIBASE; + unsigned int cs; + unsigned int val, tmp; + + val = readl(CONFIG_SPEAR_RASBASE); + + if (val & EMI_ACKMSK) + tmp = 0x3f; + else + tmp = 0x0; + + writel(tmp, &emi_regs_p->ack); + + for (cs = 0; cs < CONFIG_SYS_MAX_FLASH_BANKS; cs++) { + writel(p->tap, &emi_regs_p->bank_regs[cs].tap); + writel(p->tsdp, &emi_regs_p->bank_regs[cs].tsdp); + writel(p->tdpw, &emi_regs_p->bank_regs[cs].tdpw); + writel(p->tdpr, &emi_regs_p->bank_regs[cs].tdpr); + writel(p->tdcs, &emi_regs_p->bank_regs[cs].tdcs); + writel(EMI_CNTL_ENBBYTERW | ((val & 0x18) >> 3), + &emi_regs_p->bank_regs[cs].control); + } +} +#endif + +int spear_board_init(ulong mach_type) +{ + struct xloader_table *xloader_tb = + (struct xloader_table *) XLOADER_TABLE_ADDRESS; + struct xloader_table_1_2 *table_1_2; + + gd->bd->bi_arch_number = mach_type; + + /* adress of boot parameters */ + gd->bd->bi_boot_params = CONFIG_BOOT_PARAMS_ADDR; + + if (XLOADER_TABLE_VERSION_1_2 == xloader_tb->table_version) { + table_1_2 = &xloader_tb->table.table_1_2; + memcpy(gd->bd->version, table_1_2->version, + sizeof(gd->bd->version)); + } +#ifdef CONFIG_SPEAR_EMI + spear_emi_init(); +#endif + return 0; +} + +#if defined(CONFIG_CMD_SETFREQ) + +#define CPU 0 +#define DDR 1 + +int do_setfreq(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + void (*sram_setfreq) (unsigned int, unsigned int); + unsigned int frequency; + + if (argc != 3) { + printf("Usage:\n%s\n", cmdtp->usage); + return 1; + } + + frequency = simple_strtoul(argv[2], NULL, 0); + + if (frequency > 333) { + printf("Frequency is limited to 333MHz\n"); + return 1; + } + sram_setfreq = memcpy((void *)0xD2801000, setfreq, setfreq_sz); + + if (!strcmp(argv[1], "ddr")) { + sram_setfreq(DDR, frequency); + printf("DDR frequency changed to %u\n", frequency); + + } else if (!strcmp(argv[1], "cpu")) { + sram_setfreq(CPU, frequency); + printf("CPU frequency changed to %u\n", frequency); + } else { + printf("Usage:\n%s\n", cmdtp->usage); + return 1; + } + + return 0; +} + +U_BOOT_CMD(setfreq, 3, 1, do_setfreq, + "change ddr/cpu frequency", "device[ddr/cpu] frequency"); +#endif + +#if defined(CONFIG_CMD_NET) +static int i2c_read_mac(u8 *buffer) +{ + unsigned char buf[2]; + + i2c_read(0x50, 0x0, 1, buf, 2); + + /* check if valid MAC address is saved in I2C EEPROM or not? */ + if ((buf[0] == 0x55) && (buf[1] == 0xAA)) { + /* Valid MAC address is saved in I2C EEPROM, + read the MAC address from the + EEPROM & update the buffer */ + i2c_read(0x50, 0x2, 1, buffer, 6); + return 0; + } else { + return -1; + } +} + +int do_writemac(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + unsigned char buf[2]; + unsigned char mac[6]; + unsigned int reg; + char *s, *e; + + if (argc != 2) { + printf("Usage:\n%s\n", cmdtp->usage); + return 1; + } + + s = argv[1]; + for (reg = 0; reg < 6; ++reg) { + mac[reg] = s ? simple_strtoul(s, &e, 16) : 0; + if (s) + s = (*e) ? e + 1 : e; + } + + buf[0] = 0x55; + buf[1] = 0xAA; + i2c_write(0x50, /* Chip address */ + 0x0, /* Offset */ + 1, /* Address length */ + buf, /* buffer */ + 2); /* Length */ + + buf[0] = 0x44; + buf[1] = 0x66; + + i2c_read(0x50, /* Chip address */ + 0x0, /* Offset */ + 1, /* Address length */ + buf, /* buffer */ + 2); /* Length */ + + /* check if valid MAC address is saved in I2C EEPROM or not? */ + if ((buf[0] == 0x55) && (buf[1] == 0xAA)) { + i2c_write(0x50, 0x2, 1, mac, 6); + puts("I2C EEPROM written with mac address \n"); + return 0; + } else { + puts("I2C EEPROM writing failed \n"); + return -1; + } +} + +U_BOOT_CMD(writemac, 2, 1, do_writemac, + "write mac address in I2C memory", "XX:XX:XX:XX:XX:XX"); +#endif + diff --git a/board/spear/spear600/Makefile b/board/spear/spear600/Makefile new file mode 100755 index 0000000..cce4c89 --- /dev/null +++ b/board/spear/spear600/Makefile @@ -0,0 +1,52 @@ +# +# (C) Copyright 2000-2004 +# Wolfgang Denk, DENX Software Engineering, wd at denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := spr600_board.o \ + ../common/spr_misc.o +SOBJS := ../common/spr_lowlevel_init.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/spear/spear600/config.mk b/board/spear/spear600/config.mk new file mode 100755 index 0000000..90a6cf9 --- /dev/null +++ b/board/spear/spear600/config.mk @@ -0,0 +1,39 @@ +# +# (C) Copyright 2009 +# Vipin Kumar, ST Microelectronics <vipin.kumar@st.com> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +######################################################################### + +TEXT_BASE = 0x00700000 + +ALL += $(obj)u-boot.img + +# Environment variables in NAND +ifeq ($(ENV),NAND) +PLATFORM_RELFLAGS += -DENV_IN_NAND +endif + +# Compile uboot as USB boot firmware +ifeq ($(CONSOLE),USB) +PLATFORM_RELFLAGS += -DCONFIG_SPEAR_USBTTY +endif + diff --git a/board/spear/spear600/spr600_board.c b/board/spear/spear600/spr600_board.c new file mode 100755 index 0000000..378b3b9 --- /dev/null +++ b/board/spear/spear600/spr600_board.c @@ -0,0 +1,53 @@ +/* + * (C) Copyright 2009 + * Vipin Kumar, ST Micoelectronics, vipin.kumar at st.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <nand.h> +#include <asm/io.h> +#include <asm/arch/spr_defs.h> +#include <asm/arch/spr_misc.h> +#include <asm/arch/spr_nand.h> + +int board_init(void) +{ + return spear_board_init(MACH_TYPE_SPEAR600); +} + +/** + * board_nand_init - Board specific NAND initialization + * @nand: mtd private chip structure + * + * Called by nand_init_chip to initialize the board specific functions + */ + +int board_nand_init(struct nand_chip *nand) +{ + struct misc_regs *const misc_regs_p = + (struct misc_regs *)CONFIG_SPEAR_MISCBASE; + + if (!(readl(&misc_regs_p->auto_cfg_reg) & MISC_NANDDIS)) { + return spear_nand_init(nand); + } else { + return -1; + } +} diff --git a/common/cmd_bdinfo.c b/common/cmd_bdinfo.c index 11c1547..412cad6 100644 --- a/common/cmd_bdinfo.c +++ b/common/cmd_bdinfo.c @@ -27,6 +27,10 @@ #include <common.h> #include <command.h> +#if defined(CONFIG_SPEAR600) || defined(CONFIG_SPEAR3XX) +#include <asm/arch/spr_xloader_table.h> +#endif + DECLARE_GLOBAL_DATA_PTR; static void print_num(const char *, ulong); @@ -339,6 +343,22 @@ int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) #endif printf ("baudrate = %d bps\n", bd->bi_baudrate); +#if defined(CONFIG_SPEAR600) || defined(CONFIG_SPEAR3XX) + if (bd->dramfreq == -1) + printf("DDR Freq = Not Known\n"); + else + printf("DDR Freq = %d\n", bd->dramfreq); + + if (bd->dramtype == DDRMOBILE) + printf("DDR Type = MOBILE\n"); + else if (bd->dramtype == DDR2) + printf("DDR Type = DDR2\n"); + else + printf("DDR Type = Not Known\n"); + + printf("Xloader Rev = %s\n", bd->version); +#endif + return 0; } diff --git a/cpu/arm926ejs/spear/Makefile b/cpu/arm926ejs/spear/Makefile new file mode 100755 index 0000000..bf8dfa8 --- /dev/null +++ b/cpu/arm926ejs/spear/Makefile @@ -0,0 +1,52 @@ +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd at denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(SOC).a + +COBJS := reset.o \ + timer.o +SOBJS := + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/cpu/arm926ejs/spear/reset.c b/cpu/arm926ejs/spear/reset.c new file mode 100755 index 0000000..1bce95f --- /dev/null +++ b/cpu/arm926ejs/spear/reset.c @@ -0,0 +1,49 @@ +/* + * (C) Copyright 2009 + * Vipin Kumar, ST Micoelectronics, vipin.kumar at st.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/spr_syscntl.h> + +void reset_cpu(ulong ignored) +{ + struct syscntl_regs *syscntl_regs_p = + (struct syscntl_regs *)CONFIG_SPEAR_SYSCNTLBASE; + + printf("System is going to reboot ...\n"); + + /* This 1 second delay will allow the above message + to be printed before reset */ + udelay((1000 * 1000)); + + /* Going into slow mode before resetting SOC */ + writel(0x02, &syscntl_regs_p->scctrl); + + /* Writing any value to the system status register will + reset the SOC */ + writel(0x00, &syscntl_regs_p->scsysstat); + + /* system will restart */ + while (1) + ; +} diff --git a/cpu/arm926ejs/spear/timer.c b/cpu/arm926ejs/spear/timer.c new file mode 100755 index 0000000..8bcc37f --- /dev/null +++ b/cpu/arm926ejs/spear/timer.c @@ -0,0 +1,148 @@ +/* + * (C) Copyright 2009 + * Vipin Kumar, ST Micoelectronics, vipin.kumar at st.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/spr_gpt.h> +#include <asm/arch/spr_misc.h> + +static struct gpt_regs *const gpt_regs_p = + (struct gpt_regs *)CONFIG_SPEAR_TIMERBASE; + +static struct misc_regs *const misc_regs_p = + (struct misc_regs *)CONFIG_SPEAR_MISCBASE; + +#define READ_TIMER() (readl(&gpt_regs_p->count) & GPT_FREE_RUNNING) + +static ulong timestamp; +static ulong lastdec; + +int timer_init(void) +{ + u32 synth; + + /* Prescaler setting */ +#if defined(CONFIG_SPEAR3XX) + writel(MISC_PRSC_CFG, &misc_regs_p->prsc2_clk_cfg); + synth = MISC_GPT4SYNTH; +#elif defined(CONFIG_SPEAR600) + writel(MISC_PRSC_CFG, &misc_regs_p->prsc1_clk_cfg); + synth = MISC_GPT3SYNTH; +#endif + + writel(readl(&misc_regs_p->periph_clk_cfg) | synth, + &misc_regs_p->periph_clk_cfg); + + /* disable timers */ + writel(GPT_PRESCALER_1 | GPT_MODE_AUTO_RELOAD, &gpt_regs_p->control); + + /* load value for free running */ + writel(GPT_FREE_RUNNING, &gpt_regs_p->compare); + + /* auto reload, start timer */ + writel(readl(&gpt_regs_p->control) | GPT_ENABLE, &gpt_regs_p->control); + + reset_timer_masked(); + + return 0; +} + +/* + * timer without interrupts + */ + +void reset_timer(void) +{ + reset_timer_masked(); +} + +ulong get_timer(ulong base) +{ + return get_timer_masked() - base; +} + +void set_timer(ulong t) +{ + timestamp = t; +} + +void __udelay(unsigned long usec) +{ + ulong tmo; + ulong start = get_timer_masked(); + ulong rndoff; + + rndoff = (usec % 500) ? 1 : 0; + + /* 13 timer ticks gives 500 microsecconds delay */ + tmo = ((usec/500) + rndoff) * 13; + + while ((ulong) (get_timer_masked() - start) < tmo) + ; +} + +void reset_timer_masked(void) +{ + /* reset time */ + lastdec = READ_TIMER(); + timestamp = 0; +} + +ulong get_timer_masked(void) +{ + ulong now = READ_TIMER(); + + if (now >= lastdec) { + /* normal mode */ + timestamp += now - lastdec; + } else { + /* we have an overflow ... */ + timestamp += now + GPT_FREE_RUNNING - lastdec; + } + lastdec = now; + + return timestamp; +} + +void udelay_masked(unsigned long usec) +{ + return udelay(usec); +} + +/* + * This function is derived from PowerPC code (read timebase as long long). + * On ARM it just returns the timer value. + */ +unsigned long long get_ticks(void) +{ + return get_timer(0); +} + +/* + * This function is derived from PowerPC code (timebase clock frequency). + * On ARM it returns the number of timer ticks per second. + */ +ulong get_tbclk(void) +{ + return CONFIG_SYS_HZ; +} diff --git a/include/asm-arm/arch-spear/spr_defs.h b/include/asm-arm/arch-spear/spr_defs.h new file mode 100644 index 0000000..76aa928 --- /dev/null +++ b/include/asm-arm/arch-spear/spr_defs.h @@ -0,0 +1,31 @@ +/* + * (C) Copyright 2009 + * Vipin Kumar, ST Micoelectronics, vipin.kumar at st.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __SPR_DEFS_H__ +#define __SPR_DEFS_H__ + +extern int spear_board_init(ulong); +extern void setfreq(unsigned int, unsigned int); +extern unsigned int setfreq_sz; + +#endif diff --git a/include/asm-arm/arch-spear/spr_emi.h b/include/asm-arm/arch-spear/spr_emi.h new file mode 100755 index 0000000..cfeb0b1 --- /dev/null +++ b/include/asm-arm/arch-spear/spr_emi.h @@ -0,0 +1,55 @@ +/* + * (C) Copyright 2009 + * Ryan CHEN, ST Micoelectronics, ryan.chen at st.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __SPEAR_EMI_H__ +#define __SPEAR_EMI_H__ + +#ifdef CONFIG_SPEAR_EMI + +struct emi_bank_regs { + u32 tap; + u32 tsdp; + u32 tdpw; + u32 tdpr; + u32 tdcs; + u32 control; +}; + +struct emi_regs { + struct emi_bank_regs bank_regs[CONFIG_SYS_MAX_FLASH_BANKS]; + u32 tout; + u32 ack; + u32 irq; +}; + +#define EMI_ACKMSK 0x40 + +/* control register definitions */ +#define EMI_CNTL_ENBBYTEW (1 << 2) +#define EMI_CNTL_ENBBYTER (1 << 3) +#define EMI_CNTL_ENBBYTERW (EMI_CNTL_ENBBYTER | EMI_CNTL_ENBBYTEW) + +#endif + +#endif + diff --git a/include/asm-arm/arch-spear/spr_gpt.h b/include/asm-arm/arch-spear/spr_gpt.h new file mode 100755 index 0000000..2b870e9 --- /dev/null +++ b/include/asm-arm/arch-spear/spr_gpt.h @@ -0,0 +1,83 @@ +/* + * (C) Copyright 2009 + * Vipin Kumar, ST Micoelectronics, vipin.kumar at st.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _SPR_GPT_H +#define _SPR_GPT_H + +struct gpt_regs { + u8 reserved[0x80]; + u32 control; + u32 status; + u32 compare; + u32 count; + u32 capture_re; + u32 capture_fe; +}; + +/* + * TIMER_CONTROL register settings + */ + +#define GPT_PRESCALER_MASK 0x000F +#define GPT_PRESCALER_1 0x0000 +#define GPT_PRESCALER_2 0x0001 +#define GPT_PRESCALER_4 0x0002 +#define GPT_PRESCALER_8 0x0003 +#define GPT_PRESCALER_16 0x0004 +#define GPT_PRESCALER_32 0x0005 +#define GPT_PRESCALER_64 0x0006 +#define GPT_PRESCALER_128 0x0007 +#define GPT_PRESCALER_256 0x0008 + +#define GPT_MODE_SINGLE_SHOT 0x0010 +#define GPT_MODE_AUTO_RELOAD 0x0000 + +#define GPT_ENABLE 0x0020 + +#define GPT_CAPT_MODE_MASK 0x00C0 +#define GPT_CAPT_MODE_NONE 0x0000 +#define GPT_CAPT_MODE_RE 0x0040 +#define GPT_CAPT_MODE_FE 0x0080 +#define GPT_CAPT_MODE_BOTH 0x00C0 + +#define GPT_INT_MATCH 0x0100 + +#define GPT_INT_FE 0x0200 + +#define GPT_INT_RE 0x0400 + +/* + * TIMER_STATUS register settings + */ + +#define GPT_STS_MATCH 0x0001 +#define GPT_STS_FE 0x0002 +#define GPT_STS_RE 0x0004 + +/* + * TIMER_COMPARE register settings + */ + +#define GPT_FREE_RUNNING 0xFFFF + +#endif diff --git a/include/asm-arm/arch-spear/spr_syscntl.h b/include/asm-arm/arch-spear/spr_syscntl.h new file mode 100644 index 0000000..3c92f09 --- /dev/null +++ b/include/asm-arm/arch-spear/spr_syscntl.h @@ -0,0 +1,38 @@ +/* + * (C) Copyright 2009 + * Ryan CHEN, ST Micoelectronics, ryan.chen at st.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +struct syscntl_regs { + u32 scctrl; + u32 scsysstat; + u32 scimctrl; + u32 scimsysstat; + u32 scxtalctrl; + u32 scpllctrl; + u32 scpllfctrl; + u32 scperctrl0; + u32 scperctrl1; + u32 scperen; + u32 scperdis; + const u32 scperclken; + const u32 scperstat; +}; diff --git a/include/asm-arm/arch-spear/spr_xloader_table.h b/include/asm-arm/arch-spear/spr_xloader_table.h new file mode 100755 index 0000000..d75dae2 --- /dev/null +++ b/include/asm-arm/arch-spear/spr_xloader_table.h @@ -0,0 +1,67 @@ +/* + * (C) Copyright 2009 + * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _SPR_XLOADER_TABLE_H +#define _SPR_XLOADER_TABLE_H + +#define XLOADER_TABLE_VERSION_1_1 2 +#define XLOADER_TABLE_VERSION_1_2 3 + +#define XLOADER_TABLE_ADDRESS 0xD2801FF0 + +#define DDRMOBILE 1 +#define DDR2 2 + +#define REV_BA 1 +#define REV_AA 2 +#define REV_AB 3 + +struct xloader_table_1_1 { + unsigned short ddrfreq; + unsigned char ddrsize; + unsigned char ddrtype; + + unsigned char soc_rev; +} __attribute__ ((packed)); + +struct xloader_table_1_2 { + unsigned const char *version; + + unsigned short ddrfreq; + unsigned char ddrsize; + unsigned char ddrtype; + + unsigned char soc_rev; +} __attribute__ ((packed)); + +union table_contents { + struct xloader_table_1_1 table_1_1; + struct xloader_table_1_2 table_1_2; +}; + +struct xloader_table { + unsigned char table_version; + union table_contents table; +} __attribute__ ((packed)); + +#endif diff --git a/include/asm-arm/u-boot.h b/include/asm-arm/u-boot.h index cfd5a9b..0ead5d9 100644 --- a/include/asm-arm/u-boot.h +++ b/include/asm-arm/u-boot.h @@ -47,6 +47,11 @@ typedef struct bd_info { ulong start; ulong size; } bi_dram[CONFIG_NR_DRAM_BANKS]; +#if defined(CONFIG_SPEAR600) || defined(CONFIG_SPEAR3XX) + unsigned char version[32]; + int dramfreq; + int dramtype; +#endif } bd_t; #define bi_env_data bi_env->data diff --git a/include/configs/spear600.h b/include/configs/spear600.h new file mode 100755 index 0000000..755114d --- /dev/null +++ b/include/configs/spear600.h @@ -0,0 +1,260 @@ +/* + * (C) Copyright 2009 + * Vipin Kumar, STMicroelectronics, <vipin.kumar@st.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * High Level Configuration Options + * (easy to change) + */ +#define CONFIG_SPEAR600 1 + +/* + * Ethernet MAC driver configuration + */ +/* #define CONFIG_SPEARMAC */ +/* #define CONFIG_ETHAUTONEG */ +/* #define CONFIG_ETHDEBUG */ + +/* + * USBD driver configuration + */ +#define CONFIG_SPEARUDC +#define CONFIG_USB_DEVICE +#define CONFIG_USB_TTY +#define CONFIG_SYS_USBD_BASE (0xE1100000) +#define CONFIG_SYS_PLUG_BASE (0xE1200000) +#define CONFIG_SYS_FIFO_BASE (0xE1000800) +#define CONFIG_USBD_PRODUCT_NAME "SPEAr SoC" +#define CONFIG_USBD_MANUFACTURER "ST Microelectronics" + +#define CONFIG_EXTRA_ENV_SETTINGS "usbtty=cdc_acm" + +/* + * I2C driver configuration + */ +#define CONFIG_HARD_I2C +#define CONFIG_SPEARI2C +#define CONFIG_SYS_I2C_BASE 0xD0200000 +#define CONFIG_SYS_I2C_SPEED 400000 +#define CONFIG_SYS_I2C_SLAVE 0x02 + +/* #define CONFIG_SYS_I2C_MULTI_EEPROMS */ +/* #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 0x1 */ + +/* + * SMI driver configuration + */ +#define CONFIG_SPEARSMI +#undef CONFIG_SYS_NO_FLASH +#define CONFIG_SYS_SMI_BASE 0xFC000000 + +/* + * Serial Configuration (PL011) + */ +#define CONFIG_PL011_SERIAL +#define CONFIG_PL011_CLOCK (48 * 1000 * 1000) +#define CONFIG_PL01x_PORTS { (void *)CONFIG_SYS_SERIAL0, \ + (void *)CONFIG_SYS_SERIAL1 } +#define CONFIG_CONS_INDEX 0 +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, \ + 57600, 115200 } +#define CONFIG_SYS_SERIAL0 0xD0000000 +#define CONFIG_SYS_SERIAL1 0xD0080000 + +#define CONFIG_SYS_LOADS_BAUD_CHANGE + +/* + * Platform specific defines (SPEAr) + */ +#define CONFIG_SPEAR_SYSCNTLBASE (0xFCA00000) +#define CONFIG_SPEAR_TIMERBASE (0xFC800000) +#define CONFIG_SPEAR_MISCBASE (0xFCA80000) +#define CONFIG_SYS_HZ (26000) + +/* + * Board Specific Defines (SPEAr600) + */ + +/* + * FLASH Configuration + */ +#define CONFIG_SYS_MAX_FLASH_BANKS 2 +#define CONFIG_SYS_FLASH_BASE (0xF8000000) +#define CONFIG_SYS_FLASH_BANK_SIZE (0x01000000) +#define CONFIG_SYS_FLASH_ADDR_BASE {0xF8000000, 0xF9000000} +#define CONFIG_SYS_MAX_FLASH_SECT 128 + +#define CONFIG_SYS_FLASH_EMPTY_INFO 1 +#define CONFIG_SYS_FLASH_ERASE_TOUT (3 * CONFIG_SYS_HZ) +#define CONFIG_SYS_FLASH_WRITE_TOUT (3 * CONFIG_SYS_HZ) + +/* + * NAND FLASH Configuration + */ +#define CONFIG_NAND_SPEAR 1 +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE 0xD2000000 +#define CONFIG_SYS_NAND_CLE (1 << 16) +#define CONFIG_SYS_NAND_ALE (1 << 17) +#define CONFIG_MTD_NAND_VERIFY_WRITE 1 + +/* + * FSMC NAND driver configuration + */ +#define CONFIG_SPEAR_FSMCBASE (0xD1800000) + +/* + * Command support defines + */ +/* #define CONFIG_CMD_CACHE */ +/* #define CONFIG_CMD_CDP */ +/* #define CONFIG_CMD_DHCP */ +#define CONFIG_CMD_I2C +/* #define CONFIG_CMD_ELF */ +/* #define CONFIG_CMD_PING */ +#define CONFIG_CMD_NAND +#define CONFIG_CMD_ENV +/* #define CONFIG_CMD_JFFS2 */ +/* #define CONFIG_CMD_YAFFS2 */ +#define CONFIG_CMD_MEMORY +/* #define CONFIG_CMD_MII */ +/* #define CONFIG_MII */ +/* #define CONFIG_NET_MULTI */ +/* #define CONFIG_CMD_NET */ +#define CONFIG_CMD_RUN +#define CONFIG_CMD_SAVES +#define CONFIG_CMD_SETFREQ +/* #define CONFIG_CMD_EEPROM */ + +/* This must be included AFTER the definition of CONFIG_COMMANDS (if any) */ +#include <config_cmd_default.h> +#undef CONFIG_CMD_NET +#undef CONFIG_CMD_NFS + +/* + * Default Environment Varible definitions + */ +#define CONFIG_BOOTDELAY 1 +#define CONFIG_BOOTARGS_NFS "root=/dev/nfs ip=dhcp " \ + "console=ttyS0 init=/bin/sh" + +/* #define CONFIG_ETHADDR 00:11:22:33:44:55 */ + +/* #define CONFIG_NETMASK 255.255.255.0 */ +/* #define CONFIG_IPADDR 192.168.1.10 */ +/* #define CONFIG_SERVERIP 192.168.1.1 */ +/* #define CONFIG_GATEWAYIP 192.168.1.1 */ +#define CONFIG_ENV_OVERWRITE + +/* + * U-Boot Environment placing definitions. + */ +#ifdef ENV_IN_NAND +#define CONFIG_ENV_IS_IN_NAND +#else +#define CONFIG_ENV_IS_IN_FLASH +#endif + +#ifdef CONFIG_ENV_IS_IN_FLASH +#define CONFIG_SYS_MONITOR_LEN 0x00040000 +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE +#define CONFIG_ENV_SIZE 0x00002000 +#define CONFIG_ENV_SECT_SIZE 0x10000 +#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \ + CONFIG_SYS_MONITOR_LEN) + +#define CONFIG_BOOTARGS "console=ttyS0 mem=128M " \ + "root=/dev/mtdblock3 " \ + "rootfstype=jffs2" +#define CONFIG_BOOTCOMMAND "bootm 0xf8050000" + +#else +#ifdef CONFIG_ENV_IS_IN_NAND + +#define CONFIG_ENV_OFFSET 0x50000 +#define CONFIG_ENV_SIZE 0x04000 +/* #define CONFIG_ENV_OFFSET_REDUND 0x58000 */ +#define CONFIG_ENV_RANGE 0x10000 + +#define CONFIG_BOOTARGS "console=ttyS0 mem=128M " \ + "root=/dev/mtdblock8 " \ + "rootfstype=jffs2" +#define CONFIG_BOOTCOMMAND "nand read.jffs2 0x1600000 " \ + "0x60000 0x4C0000; " \ + "bootm 0x1600000" + +#endif +#endif + +/* + * Miscellaneous configurable options + */ + +#define CONFIG_BOOT_PARAMS_ADDR 0x00000100 +#define CONFIG_CMDLINE_TAG 1 +#define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_MISC_INIT_R 1 +#define CONFIG_ZERO_BOOTDELAY_CHECK 1 +#define CONFIG_AUTOBOOT_KEYED 1 +#define CONFIG_AUTOBOOT_STOP_STR " " +#define CONFIG_AUTOBOOT_PROMPT \ + "Hit SPACE in %d seconds to stop autoboot.\n", bootdelay + +#define CONFIG_SYS_MEMTEST_START 0x00800000 +#define CONFIG_SYS_MEMTEST_END 0x04000000 +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 256*1024) +#define CONFIG_SYS_GBL_DATA_SIZE 128 +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_PROMPT "u-boot> " +#define CONFIG_CMDLINE_EDITING +#define CONFIG_SYS_CBSIZE 256 +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +#define CONFIG_SYS_LOAD_ADDR 0x00800000 +#define CONFIG_SYS_CONSOLE_INFO_QUIET 1 +#define CONFIG_SYS_64BIT_VSPRINTF 1 + +/* + * Stack sizes + */ +#define CONFIG_STACKSIZE (128*1024) + +#ifdef CONFIG_USE_IRQ +#define CONFIG_STACKSIZE_IRQ (4*1024) +#define CONFIG_STACKSIZE_FIQ (4*1024) +#endif + +/* + * Physical Memory Map + */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM_1 0x00000000 +#define PHYS_SDRAM_1_MAXSIZE 0x40000000 + +#endif /* __CONFIG_H */ + -- 1.6.0.2 ^ permalink raw reply related [flat|nested] 44+ messages in thread
* [U-Boot] [PATCH 6/9] SPEAr300 SoC support added 2009-12-16 9:18 ` [U-Boot] [PATCH 5/9] SPEAr600 SoC support added Vipin KUMAR @ 2009-12-16 9:18 ` Vipin KUMAR 2009-12-16 9:18 ` [U-Boot] [PATCH 7/9] SPEAr310 " Vipin KUMAR 2009-12-17 20:09 ` [U-Boot] [PATCH 6/9] SPEAr300 " Wolfgang Denk 2009-12-16 17:30 ` [U-Boot] [PATCH 5/9] SPEAr600 " Peter Tyser 2009-12-16 23:09 ` Wolfgang Denk 2 siblings, 2 replies; 44+ messages in thread From: Vipin KUMAR @ 2009-12-16 9:18 UTC (permalink / raw) To: u-boot Signed-off-by: Vipin <vipin.kumar@st.com> --- MAKEALL | 1 + Makefile | 3 + board/spear/spear300/Makefile | 52 +++++++ board/spear/spear300/config.mk | 39 +++++ board/spear/spear300/spr300_board.c | 57 ++++++++ include/configs/spear300.h | 260 +++++++++++++++++++++++++++++++++++ 6 files changed, 412 insertions(+), 0 deletions(-) create mode 100755 board/spear/spear300/Makefile create mode 100755 board/spear/spear300/config.mk create mode 100755 board/spear/spear300/spr300_board.c create mode 100755 include/configs/spear300.h diff --git a/MAKEALL b/MAKEALL index ab1bb6f..e280e37 100755 --- a/MAKEALL +++ b/MAKEALL @@ -572,6 +572,7 @@ LIST_ARM9=" \ sheevaplug \ smdk2400 \ smdk2410 \ + spear300 \ trab \ VCMA9 \ versatile \ diff --git a/Makefile b/Makefile index 536ccb3..4489167 100644 --- a/Makefile +++ b/Makefile @@ -3056,6 +3056,9 @@ smdk2400_config : unconfig smdk2410_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm920t smdk2410 samsung s3c24x0 +spear300_config : unconfig + @$(MKCONFIG) $(@:_config=) arm arm926ejs spear300 spear spear + SX1_stdout_serial_config \ SX1_config: unconfig @mkdir -p $(obj)include diff --git a/board/spear/spear300/Makefile b/board/spear/spear300/Makefile new file mode 100755 index 0000000..247c302 --- /dev/null +++ b/board/spear/spear300/Makefile @@ -0,0 +1,52 @@ +# +# (C) Copyright 2000-2004 +# Wolfgang Denk, DENX Software Engineering, wd at denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := spr300_board.o \ + ../common/spr_misc.o +SOBJS := ../common/spr_lowlevel_init.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/spear/spear300/config.mk b/board/spear/spear300/config.mk new file mode 100755 index 0000000..90a6cf9 --- /dev/null +++ b/board/spear/spear300/config.mk @@ -0,0 +1,39 @@ +# +# (C) Copyright 2009 +# Vipin Kumar, ST Microelectronics <vipin.kumar@st.com> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +######################################################################### + +TEXT_BASE = 0x00700000 + +ALL += $(obj)u-boot.img + +# Environment variables in NAND +ifeq ($(ENV),NAND) +PLATFORM_RELFLAGS += -DENV_IN_NAND +endif + +# Compile uboot as USB boot firmware +ifeq ($(CONSOLE),USB) +PLATFORM_RELFLAGS += -DCONFIG_SPEAR_USBTTY +endif + diff --git a/board/spear/spear300/spr300_board.c b/board/spear/spear300/spr300_board.c new file mode 100755 index 0000000..97de0be --- /dev/null +++ b/board/spear/spear300/spr300_board.c @@ -0,0 +1,57 @@ +/* + * (C) Copyright 2009 + * Vipin Kumar, ST Micoelectronics, vipin.kumar at st.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <nand.h> +#include <asm/io.h> +#include <asm/arch/spr_defs.h> +#include <asm/arch/spr_misc.h> +#include <asm/arch/spr_nand.h> + +int board_init(void) +{ + return spear_board_init(MACH_TYPE_SPEAR300); +} + +/** + * board_nand_init - Board specific NAND initialization + * @nand: mtd private chip structure + * + * Called by nand_init_chip to initialize the board specific functions + */ + +int board_nand_init(struct nand_chip *nand) +{ + struct misc_regs *const misc_regs_p = + (struct misc_regs *)CONFIG_SPEAR_MISCBASE; + + if (((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) == + MISC_SOCCFG30) || + ((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) == + MISC_SOCCFG31)) { + + return spear_nand_init(nand); + } else { + return -1; + } +} diff --git a/include/configs/spear300.h b/include/configs/spear300.h new file mode 100755 index 0000000..59b1f45 --- /dev/null +++ b/include/configs/spear300.h @@ -0,0 +1,260 @@ +/* + * (C) Copyright 2009 + * Vipin Kumar, STMicroelectronics, <vipin.kumar@st.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * High Level Configuration Options + * (easy to change) + */ +#define CONFIG_SPEAR3XX 1 +#define CONFIG_SPEAR300 1 + +/* + * Ethernet MAC driver configuration + */ +/* #define CONFIG_SPEARMAC */ +/* #define CONFIG_ETHAUTONEG */ +/* #define CONFIG_ETHDEBUG */ + +/* + * USBD driver configuration + */ +#define CONFIG_SPEARUDC +#define CONFIG_USB_DEVICE +#define CONFIG_USB_TTY +#define CONFIG_SYS_USBD_BASE (0xE1100000) +#define CONFIG_SYS_PLUG_BASE (0xE1200000) +#define CONFIG_SYS_FIFO_BASE (0xE1000800) +#define CONFIG_USBD_PRODUCT_NAME "SPEAr SoC" +#define CONFIG_USBD_MANUFACTURER "ST Microelectronics" + +#define CONFIG_EXTRA_ENV_SETTINGS "usbtty=cdc_acm" + +/* + * I2C driver configuration + */ +#define CONFIG_HARD_I2C +#define CONFIG_SPEARI2C +#define CONFIG_SYS_I2C_BASE 0xD0180000 +#define CONFIG_SYS_I2C_SPEED 400000 +#define CONFIG_SYS_I2C_SLAVE 0x02 + +/* #define CONFIG_SYS_I2C_MULTI_EEPROMS */ +/* #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 0x1 */ + +/* + * SMI driver configuration + */ +#define CONFIG_SPEARSMI +#undef CONFIG_SYS_NO_FLASH +#define CONFIG_SYS_SMI_BASE 0xFC000000 + +/* + * Serial Configuration (PL011) + */ +#define CONFIG_PL011_SERIAL +#define CONFIG_PL011_CLOCK (48 * 1000 * 1000) +#define CONFIG_PL01x_PORTS { (void *)CONFIG_SYS_SERIAL0 } +#define CONFIG_CONS_INDEX 0 +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, \ + 57600, 115200 } +#define CONFIG_SYS_SERIAL0 0xD0000000 + +#define CONFIG_SYS_LOADS_BAUD_CHANGE + +/* + * Platform specific defines (SPEAr) + */ +#define CONFIG_SPEAR_SYSCNTLBASE (0xFCA00000) +#define CONFIG_SPEAR_TIMERBASE (0xFC800000) +#define CONFIG_SPEAR_MISCBASE (0xFCA80000) +#define CONFIG_SYS_HZ (26000) + +/* + * Board Specific Defines (SPEAr300) + */ + +/* + * FLASH Configuration + */ +#define CONFIG_SYS_MAX_FLASH_BANKS 2 +#define CONFIG_SYS_FLASH_BASE (0xF8000000) +#define CONFIG_SYS_FLASH_BANK_SIZE (0x01000000) +#define CONFIG_SYS_FLASH_ADDR_BASE {0xF8000000, 0xF9000000} +#define CONFIG_SYS_MAX_FLASH_SECT 128 + +#define CONFIG_SYS_FLASH_EMPTY_INFO 1 +#define CONFIG_SYS_FLASH_ERASE_TOUT (3 * CONFIG_SYS_HZ) +#define CONFIG_SYS_FLASH_WRITE_TOUT (3 * CONFIG_SYS_HZ) + +/* + * NAND FLASH Configuration + */ +#define CONFIG_NAND_SPEAR 1 +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE 0x80000000 +#define CONFIG_SYS_NAND_CLE (1 << 16) +#define CONFIG_SYS_NAND_ALE (1 << 17) +#define CONFIG_MTD_NAND_VERIFY_WRITE 1 + +/* + * FSMC NAND driver configuration + */ +#define CONFIG_SPEAR_FSMCBASE (0x94000000) + +/* + * Command support defines + */ +/* #define CONFIG_CMD_CACHE */ +/* #define CONFIG_CMD_CDP */ +/* #define CONFIG_CMD_DHCP */ +#define CONFIG_CMD_I2C +/* #define CONFIG_CMD_ELF */ +/* #define CONFIG_CMD_PING */ +#define CONFIG_CMD_NAND +#define CONFIG_CMD_ENV +/* #define CONFIG_CMD_JFFS2 */ +/* #define CONFIG_CMD_YAFFS2 */ +#define CONFIG_CMD_MEMORY +/* #define CONFIG_CMD_MII */ +/* #define CONFIG_MII */ +/* #define CONFIG_NET_MULTI */ +/* #define CONFIG_CMD_NET */ +#define CONFIG_CMD_RUN +#define CONFIG_CMD_SAVES +#define CONFIG_CMD_SETFREQ +/* #define CONFIG_CMD_EEPROM */ + +/* This must be included AFTER the definition of CONFIG_COMMANDS (if any) */ +#include <config_cmd_default.h> +#undef CONFIG_CMD_NET +#undef CONFIG_CMD_NFS + +/* + * Default Environment Varible definitions + */ +#define CONFIG_BOOTDELAY 1 +#define CONFIG_BOOTARGS_NFS "root=/dev/nfs ip=dhcp " \ + "console=ttyS0 init=/bin/sh" + +/* #define CONFIG_ETHADDR 00:11:22:33:44:55 */ + +/* #define CONFIG_NETMASK 255.255.255.0 */ +/* #define CONFIG_IPADDR 192.168.1.10 */ +/* #define CONFIG_SERVERIP 192.168.1.1 */ +/* #define CONFIG_GATEWAYIP 192.168.1.1 */ +#define CONFIG_ENV_OVERWRITE + +/* + * U-Boot Environment placing definitions. + */ +#ifdef ENV_IN_NAND +#define CONFIG_ENV_IS_IN_NAND +#else +#define CONFIG_ENV_IS_IN_FLASH +#endif + +#ifdef CONFIG_ENV_IS_IN_FLASH +#define CONFIG_SYS_MONITOR_LEN 0x00040000 +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE +#define CONFIG_ENV_SIZE 0x00002000 +#define CONFIG_ENV_SECT_SIZE 0x10000 +#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \ + CONFIG_SYS_MONITOR_LEN) + +#define CONFIG_BOOTARGS "console=ttyS0 mem=128M " \ + "root=/dev/mtdblock3 " \ + "rootfstype=jffs2" +#define CONFIG_BOOTCOMMAND "bootm 0xf8050000" + +#else +#ifdef CONFIG_ENV_IS_IN_NAND + +#define CONFIG_ENV_OFFSET 0x50000 +#define CONFIG_ENV_SIZE 0x04000 +/* #define CONFIG_ENV_OFFSET_REDUND 0x58000 */ +#define CONFIG_ENV_RANGE 0x10000 + +#define CONFIG_BOOTARGS "console=ttyS0 mem=128M " \ + "root=/dev/mtdblock8 " \ + "rootfstype=jffs2" +#define CONFIG_BOOTCOMMAND "nand read.jffs2 0x1600000 " \ + "0x60000 0x4C0000; " \ + "bootm 0x1600000" + +#endif +#endif + +/* + * Miscellaneous configurable options + */ + +#define CONFIG_BOOT_PARAMS_ADDR 0x00000100 +#define CONFIG_CMDLINE_TAG 1 +#define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_MISC_INIT_R 1 +#define CONFIG_ZERO_BOOTDELAY_CHECK 1 +#define CONFIG_AUTOBOOT_KEYED 1 +#define CONFIG_AUTOBOOT_STOP_STR " " +#define CONFIG_AUTOBOOT_PROMPT \ + "Hit SPACE in %d seconds to stop autoboot.\n", bootdelay + +#define CONFIG_SYS_MEMTEST_START 0x00800000 +#define CONFIG_SYS_MEMTEST_END 0x04000000 +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 256*1024) +#define CONFIG_SYS_GBL_DATA_SIZE 128 +#define CONFIG_IDENT_STRING "-SPEAr300" +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_PROMPT "u-boot> " +#define CONFIG_CMDLINE_EDITING +#define CONFIG_SYS_CBSIZE 256 +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +#define CONFIG_SYS_LOAD_ADDR 0x00800000 +#define CONFIG_SYS_CONSOLE_INFO_QUIET 1 +#define CONFIG_SYS_64BIT_VSPRINTF 1 + +/* + * Stack sizes + */ +#define CONFIG_STACKSIZE (128*1024) + +#ifdef CONFIG_USE_IRQ +#define CONFIG_STACKSIZE_IRQ (4*1024) +#define CONFIG_STACKSIZE_FIQ (4*1024) +#endif + +/* + * Physical Memory Map + */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM_1 0x00000000 +#define PHYS_SDRAM_1_MAXSIZE 0x40000000 + +#endif /* __CONFIG_H */ + -- 1.6.0.2 ^ permalink raw reply related [flat|nested] 44+ messages in thread
* [U-Boot] [PATCH 7/9] SPEAr310 SoC support added 2009-12-16 9:18 ` [U-Boot] [PATCH 6/9] SPEAr300 " Vipin KUMAR @ 2009-12-16 9:18 ` Vipin KUMAR 2009-12-16 9:18 ` [U-Boot] [PATCH 8/9] SPEAr320 " Vipin KUMAR 2009-12-17 20:13 ` [U-Boot] [PATCH 7/9] SPEAr310 " Wolfgang Denk 2009-12-17 20:09 ` [U-Boot] [PATCH 6/9] SPEAr300 " Wolfgang Denk 1 sibling, 2 replies; 44+ messages in thread From: Vipin KUMAR @ 2009-12-16 9:18 UTC (permalink / raw) To: u-boot Signed-off-by: Vipin <vipin.kumar@st.com> --- MAKEALL | 1 + Makefile | 3 + board/spear/spear310/Makefile | 52 +++++ board/spear/spear310/config.mk | 42 ++++ board/spear/spear310/spr310_board.c | 58 ++++++ include/configs/spear310.h | 353 +++++++++++++++++++++++++++++++++++ 6 files changed, 509 insertions(+), 0 deletions(-) create mode 100755 board/spear/spear310/Makefile create mode 100755 board/spear/spear310/config.mk create mode 100755 board/spear/spear310/spr310_board.c create mode 100755 include/configs/spear310.h diff --git a/MAKEALL b/MAKEALL index e280e37..3abb4f0 100755 --- a/MAKEALL +++ b/MAKEALL @@ -573,6 +573,7 @@ LIST_ARM9=" \ smdk2400 \ smdk2410 \ spear300 \ + spear310 \ trab \ VCMA9 \ versatile \ diff --git a/Makefile b/Makefile index 4489167..44f1d8b 100644 --- a/Makefile +++ b/Makefile @@ -3059,6 +3059,9 @@ smdk2410_config : unconfig spear300_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm926ejs spear300 spear spear +spear310_config : unconfig + @$(MKCONFIG) $(@:_config=) arm arm926ejs spear310 spear spear + SX1_stdout_serial_config \ SX1_config: unconfig @mkdir -p $(obj)include diff --git a/board/spear/spear310/Makefile b/board/spear/spear310/Makefile new file mode 100755 index 0000000..94d68e3 --- /dev/null +++ b/board/spear/spear310/Makefile @@ -0,0 +1,52 @@ +# +# (C) Copyright 2000-2004 +# Wolfgang Denk, DENX Software Engineering, wd at denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := spr310_board.o \ + ../common/spr_misc.o +SOBJS := ../common/spr_lowlevel_init.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/spear/spear310/config.mk b/board/spear/spear310/config.mk new file mode 100755 index 0000000..8b7aa05 --- /dev/null +++ b/board/spear/spear310/config.mk @@ -0,0 +1,42 @@ +# +# (C) Copyright 2009 +# Vipin Kumar, ST Microelectronics <vipin.kumar@st.com> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +######################################################################### + +TEXT_BASE = 0x00700000 + +ALL += $(obj)u-boot.img + +# Environment variables in NAND +ifeq ($(ENV),NAND) +PLATFORM_RELFLAGS += -DENV_IN_NAND +endif + +ifeq ($(FLASH),PNOR) +PLATFORM_RELFLAGS += -DPNOR_FLASH +endif + +ifeq ($(CONSOLE),USB) +PLATFORM_RELFLAGS += -DCONFIG_SPEAR_USBTTY +endif + diff --git a/board/spear/spear310/spr310_board.c b/board/spear/spear310/spr310_board.c new file mode 100755 index 0000000..750e303 --- /dev/null +++ b/board/spear/spear310/spr310_board.c @@ -0,0 +1,58 @@ +/* + * (C) Copyright 2009 + * Ryan Chen, ST Micoelectronics, ryan.chen at st.com. + * Vipin Kumar, ST Micoelectronics, vipin.kumar at st.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <nand.h> +#include <asm/io.h> +#include <asm/arch/spr_defs.h> +#include <asm/arch/spr_misc.h> +#include <asm/arch/spr_nand.h> + +int board_init(void) +{ + return spear_board_init(MACH_TYPE_SPEAR300); +} + +/** + * board_nand_init - Board specific NAND initialization + * @nand: mtd private chip structure + * + * Called by nand_init_chip to initialize the board specific functions + */ + +int board_nand_init(struct nand_chip *nand) +{ + struct misc_regs *const misc_regs_p = + (struct misc_regs *)CONFIG_SPEAR_MISCBASE; + + if (((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) == + MISC_SOCCFG30) || + ((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) == + MISC_SOCCFG31)) { + + return spear_nand_init(nand); + } else { + return -1; + } +} diff --git a/include/configs/spear310.h b/include/configs/spear310.h new file mode 100755 index 0000000..d457894 --- /dev/null +++ b/include/configs/spear310.h @@ -0,0 +1,353 @@ +/* + * (C) Copyright 2009 + * Vipin Kumar, STMicroelectronics, <vipin.kumar@st.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * High Level Configuration Options + * (easy to change) + */ +#define CONFIG_SPEAR3XX 1 +#define CONFIG_SPEAR310 1 + +/* + * Ethernet MAC driver configuration + */ +/* #define CONFIG_SPEAR_SMII */ +/* #define CONFIG_SPEARMAC */ +/* #define CONFIG_ETHAUTONEG */ +/* #define CONFIG_ETHDEBUG */ + +/* + * SMII driver configuratin + */ +#ifdef CONFIG_SPEAR_SMII +#define SPR310_SMII0_BASE 0xB0000000 +#define SPR310_SMII1_BASE 0xB0800000 +#define SPR310_SMII2_BASE 0xB1000000 +#define SPR310_SMII3_BASE 0xB1800000 + +#define SPR310_SMII0_PHY 0x01 +#define SPR310_SMII1_PHY 0x03 +#define SPR310_SMII2_PHY 0x05 +#define SPR310_SMII3_PHY 0x07 +#endif + + +/* + * USBD driver configuration + */ +#define CONFIG_SPEARUDC +#define CONFIG_USB_DEVICE +#define CONFIG_USB_TTY +#define CONFIG_SYS_USBD_BASE (0xE1100000) +#define CONFIG_SYS_PLUG_BASE (0xE1200000) +#define CONFIG_SYS_FIFO_BASE (0xE1000800) +#define CONFIG_USBD_PRODUCT_NAME "SPEAr SoC" +#define CONFIG_USBD_MANUFACTURER "ST Microelectronics" + +#define CONFIG_EXTRA_ENV_SETTINGS "usbtty=cdc_acm" + +/* + * I2C driver configuration + */ +#define CONFIG_HARD_I2C +#define CONFIG_SPEARI2C +#define CONFIG_SYS_I2C_BASE 0xD0180000 +#define CONFIG_SYS_I2C_SPEED 400000 +#define CONFIG_SYS_I2C_SLAVE 0x02 + +/* #define CONFIG_SYS_I2C_MULTI_EEPROMS */ +/* #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 0x1 */ + +/* + * SMI driver configuration + */ +#if defined(PNOR_FLASH) +#define CONFIG_SPEAR_EMI 1 +#else +#define CONFIG_SPEARSMI 1 +#endif + +#undef CONFIG_SYS_NO_FLASH +#define CONFIG_SYS_SMI_BASE 0xFC000000 + +/* + * Serial Configuration (PL011) + */ +#define CONFIG_SPEAR310_CUST_UART 1 + +#define CONFIG_PL011_SERIAL +#define CONFIG_PL011_CLOCK (48 * 1000 * 1000) +#define CONFIG_CONS_INDEX 0 +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, \ + 57600, 115200 } +#define CONFIG_SYS_SERIAL0 0xD0000000 + +#ifdef CONFIG_SPEAR310_CUST_UART + +#if (CONFIG_CONS_INDEX) +#undef CONFIG_PL011_CLOCK +#define CONFIG_PL011_CLOCK (83 * 1000 * 1000) +#endif + +#define CONFIG_SYS_SERIAL1 0xB2000000 +#define CONFIG_SYS_SERIAL2 0xB2080000 +#define CONFIG_SYS_SERIAL3 0xB2100000 +#define CONFIG_SYS_SERIAL4 0xB2180000 +#define CONFIG_SYS_SERIAL5 0xB2200000 +#define CONFIG_PL01x_PORTS { (void *)CONFIG_SYS_SERIAL0, \ + (void *)CONFIG_SYS_SERIAL1, \ + (void *)CONFIG_SYS_SERIAL2, \ + (void *)CONFIG_SYS_SERIAL3, \ + (void *)CONFIG_SYS_SERIAL4, \ + (void *)CONFIG_SYS_SERIAL5} +#else +#define CONFIG_PL01x_PORTS { (void *)CONFIG_SYS_SERIAL0 } +#endif + +#define CONFIG_SYS_LOADS_BAUD_CHANGE + +/* + * Platform specific defines (SPEAr) + */ +#define CONFIG_SPEAR_SYSCNTLBASE (0xFCA00000) +#define CONFIG_SPEAR_TIMERBASE (0xFC800000) +#define CONFIG_SPEAR_MISCBASE (0xFCA80000) +#define CONFIG_SYS_HZ (26000) +#define CONFIG_SPEAR_EMIBASE (0x4F000000) +#define CONFIG_SPEAR_RASBASE (0xB4000000) + +/* + * Board Specific Defines (SPEAr310) + */ + +/* + * FLASH Configuration + */ +#if defined(CONFIG_SPEARSMI) + +#define CONFIG_SYS_MAX_FLASH_BANKS 2 +#define CONFIG_SYS_FLASH_BASE (0xF8000000) +#define CONFIG_SYS_FLASH_BANK_SIZE (0x01000000) +#define CONFIG_SYS_FLASH_ADDR_BASE {0xF8000000, 0xF9000000} +#define CONFIG_SYS_MAX_FLASH_SECT 128 + +#define CONFIG_SYS_FLASH_EMPTY_INFO 1 +#define CONFIG_SYS_FLASH_ERASE_TOUT (3 * CONFIG_SYS_HZ) +#define CONFIG_SYS_FLASH_WRITE_TOUT (3 * CONFIG_SYS_HZ) + +#elif defined(CONFIG_SPEAR_EMI) + +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_FLASH_CFI_DRIVER +/* #define CONFIG_SYS_FLASH_PROTECTION */ +#define CONFIG_SYS_FLASH_BASE 0x50000000 +#define CONFIG_SYS_CS1_FLASH_BASE 0x60000000 +#define CONFIG_SYS_CS2_FLASH_BASE 0x70000000 +#define CONFIG_SYS_CS3_FLASH_BASE 0x80000000 +#define CONFIG_SYS_CS4_FLASH_BASE 0x90000000 +#define CONFIG_SYS_CS5_FLASH_BASE 0xA0000000 +#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE, \ + CONFIG_SYS_CS1_FLASH_BASE, \ + CONFIG_SYS_CS2_FLASH_BASE, \ + CONFIG_SYS_CS3_FLASH_BASE, \ + CONFIG_SYS_CS4_FLASH_BASE, \ + CONFIG_SYS_CS5_FLASH_BASE } +#define CONFIG_SYS_MAX_FLASH_BANKS 6 +#define CONFIG_SYS_MAX_FLASH_SECT (127 + 8) + +#define CONFIG_SYS_FLASH_QUIET_TEST 1 + +/* For Intel/ST legacy flash */ +/* #define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes" */ + +#endif +/* + * NAND FLASH Configuration + */ +#define CONFIG_NAND_SPEAR 1 +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE 0x40000000 +#define CONFIG_SYS_NAND_CLE (1 << 17) +#define CONFIG_SYS_NAND_ALE (1 << 16) +#define CONFIG_MTD_NAND_VERIFY_WRITE 1 + +/* + * FSMC NAND driver configuration + */ +#define CONFIG_SPEAR_FSMCBASE (0x44000000) + +/* + * Command support defines + */ +/* #define CONFIG_CMD_CACHE */ +/* #define CONFIG_CMD_CDP */ +/* #define CONFIG_CMD_DHCP */ +#define CONFIG_CMD_I2C +/* #define CONFIG_CMD_ELF */ +/* #define CONFIG_CMD_PING */ +#define CONFIG_CMD_NAND +#define CONFIG_CMD_ENV +/* #define CONFIG_CMD_JFFS2 */ +/* #define CONFIG_CMD_YAFFS2 */ +#define CONFIG_CMD_MEMORY +/* #define CONFIG_CMD_MII */ +/* #define CONFIG_MII */ +/* #define CONFIG_NET_MULTI */ +/* #define CONFIG_CMD_NET */ +#define CONFIG_CMD_RUN +#define CONFIG_CMD_SAVES +#define CONFIG_CMD_SETFREQ +/* #define CONFIG_CMD_EEPROM */ + +/* This must be included AFTER the definition of CONFIG_COMMANDS (if any) */ +#include <config_cmd_default.h> +#undef CONFIG_CMD_NET +#undef CONFIG_CMD_NFS + +/* + * Default Environment Varible definitions + */ +#define CONFIG_BOOTDELAY 1 +#define CONFIG_BOOTARGS_NFS "root=/dev/nfs ip=dhcp " \ + "console=ttyS0 init=/bin/sh" + +/* #define CONFIG_ETHADDR 00:11:22:33:44:55 */ + +/* #define CONFIG_NETMASK 255.255.255.0 */ +/* #define CONFIG_IPADDR 192.168.1.10 */ +/* #define CONFIG_SERVERIP 192.168.1.1 */ +/* #define CONFIG_GATEWAYIP 192.168.1.1 */ +#define CONFIG_ENV_OVERWRITE + +/* + * U-Boot Environment placing definitions. + */ +#ifdef ENV_IN_NAND +#define CONFIG_ENV_IS_IN_NAND +#else +#define CONFIG_ENV_IS_IN_FLASH +#endif + +#if defined(CONFIG_ENV_IS_IN_FLASH) +#ifdef CONFIG_SPEARSMI +/* + * Environment is in serial NOR flash + */ +#define CONFIG_SYS_MONITOR_LEN 0x00040000 +#define CONFIG_ENV_SECT_SIZE 0x00010000 + +#define CONFIG_BOOTARGS "console=ttyS0 mem=128M " \ + "root=/dev/mtdblock8 " \ + "rootfstype=jffs2" +#define CONFIG_BOOTCOMMAND "bootm 0xf8050000" + +#elif defined(CONFIG_SPEAR_EMI) +/* + * Environment is in parallel NOR flash + */ +#define CONFIG_SYS_MONITOR_LEN 0x00060000 +#define CONFIG_ENV_SECT_SIZE 0x00020000 + +#define CONFIG_BOOTARGS "console=ttyS0 mem=128M " \ + "root=/dev/mtdblock3 " \ + "rootfstype=jffs2" +#define CONFIG_BOOTCOMMAND "cp.b 0x50080000 0x1600000 " \ + "0x4C0000; bootm 0x1600000" + +#endif + +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE +#define CONFIG_ENV_SIZE 0x00002000 +#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \ + CONFIG_SYS_MONITOR_LEN) + +#elif defined(CONFIG_ENV_IS_IN_NAND) + +#define CONFIG_ENV_OFFSET 0x60000 +#define CONFIG_ENV_SIZE 0x04000 +/* #define CONFIG_ENV_OFFSET_REDUND 0x58000 */ +#define CONFIG_ENV_RANGE 0x10000 + +#define CONFIG_BOOTARGS "console=ttyS0 mem=128M " \ + "root=/dev/mtdblock12 " \ + "rootfstype=jffs2" +#define CONFIG_BOOTCOMMAND "nand read.jffs2 0x1600000 " \ + "0x60000 0x4C0000; " \ + "bootm 0x1600000" + +#endif + +/* + * Miscellaneous configurable options + */ + +#define CONFIG_BOOT_PARAMS_ADDR 0x00000100 +#define CONFIG_CMDLINE_TAG 1 +#define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_MISC_INIT_R 1 +#define CONFIG_ZERO_BOOTDELAY_CHECK 1 +#define CONFIG_AUTOBOOT_KEYED 1 +#define CONFIG_AUTOBOOT_STOP_STR " " +#define CONFIG_AUTOBOOT_PROMPT \ + "Hit SPACE in %d seconds to stop autoboot.\n", bootdelay + +#define CONFIG_SYS_MEMTEST_START 0x00800000 +#define CONFIG_SYS_MEMTEST_END 0x04000000 +#define CONFIG_SYS_MALLOC_LEN (1024*1024) +#define CONFIG_IDENT_STRING "-SPEAr310" +#define CONFIG_SYS_GBL_DATA_SIZE 128 +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_PROMPT "u-boot> " +#define CONFIG_CMDLINE_EDITING +#define CONFIG_SYS_CBSIZE 256 +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +#define CONFIG_SYS_LOAD_ADDR 0x00800000 +#define CONFIG_SYS_CONSOLE_INFO_QUIET 1 +#define CONFIG_SYS_64BIT_VSPRINTF 1 + +/* + * Stack sizes + */ +#define CONFIG_STACKSIZE (128*1024) + +#ifdef CONFIG_USE_IRQ +#define CONFIG_STACKSIZE_IRQ (4*1024) +#define CONFIG_STACKSIZE_FIQ (4*1024) +#endif + +/* + * Physical Memory Map + */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM_1 0x00000000 +#define PHYS_SDRAM_1_MAXSIZE 0x10000000 + +#endif /* __CONFIG_H */ + -- 1.6.0.2 ^ permalink raw reply related [flat|nested] 44+ messages in thread
* [U-Boot] [PATCH 8/9] SPEAr320 SoC support added 2009-12-16 9:18 ` [U-Boot] [PATCH 7/9] SPEAr310 " Vipin KUMAR @ 2009-12-16 9:18 ` Vipin KUMAR 2009-12-16 9:18 ` [U-Boot] [PATCH 9/9] SPEAr600 build " Vipin KUMAR 2009-12-17 20:14 ` [U-Boot] [PATCH 8/9] SPEAr320 SoC " Wolfgang Denk 2009-12-17 20:13 ` [U-Boot] [PATCH 7/9] SPEAr310 " Wolfgang Denk 1 sibling, 2 replies; 44+ messages in thread From: Vipin KUMAR @ 2009-12-16 9:18 UTC (permalink / raw) To: u-boot Signed-off-by: Vipin <vipin.kumar@st.com> --- MAKEALL | 1 + Makefile | 3 + board/spear/spear320/Makefile | 52 ++++++ board/spear/spear320/config.mk | 42 +++++ board/spear/spear320/spr320_board.c | 58 ++++++ include/configs/spear320.h | 336 +++++++++++++++++++++++++++++++++++ 6 files changed, 492 insertions(+), 0 deletions(-) create mode 100755 board/spear/spear320/Makefile create mode 100755 board/spear/spear320/config.mk create mode 100755 board/spear/spear320/spr320_board.c create mode 100755 include/configs/spear320.h diff --git a/MAKEALL b/MAKEALL index 3abb4f0..0672ba0 100755 --- a/MAKEALL +++ b/MAKEALL @@ -574,6 +574,7 @@ LIST_ARM9=" \ smdk2410 \ spear300 \ spear310 \ + spear320 \ trab \ VCMA9 \ versatile \ diff --git a/Makefile b/Makefile index 44f1d8b..1f60204 100644 --- a/Makefile +++ b/Makefile @@ -3062,6 +3062,9 @@ spear300_config : unconfig spear310_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm926ejs spear310 spear spear +spear320_config : unconfig + @$(MKCONFIG) $(@:_config=) arm arm926ejs spear320 spear spear + SX1_stdout_serial_config \ SX1_config: unconfig @mkdir -p $(obj)include diff --git a/board/spear/spear320/Makefile b/board/spear/spear320/Makefile new file mode 100755 index 0000000..1ddd1c2 --- /dev/null +++ b/board/spear/spear320/Makefile @@ -0,0 +1,52 @@ +# +# (C) Copyright 2000-2004 +# Wolfgang Denk, DENX Software Engineering, wd at denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := spr320_board.o \ + ../common/spr_misc.o +SOBJS := ../common/spr_lowlevel_init.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/spear/spear320/config.mk b/board/spear/spear320/config.mk new file mode 100755 index 0000000..8b7aa05 --- /dev/null +++ b/board/spear/spear320/config.mk @@ -0,0 +1,42 @@ +# +# (C) Copyright 2009 +# Vipin Kumar, ST Microelectronics <vipin.kumar@st.com> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +######################################################################### + +TEXT_BASE = 0x00700000 + +ALL += $(obj)u-boot.img + +# Environment variables in NAND +ifeq ($(ENV),NAND) +PLATFORM_RELFLAGS += -DENV_IN_NAND +endif + +ifeq ($(FLASH),PNOR) +PLATFORM_RELFLAGS += -DPNOR_FLASH +endif + +ifeq ($(CONSOLE),USB) +PLATFORM_RELFLAGS += -DCONFIG_SPEAR_USBTTY +endif + diff --git a/board/spear/spear320/spr320_board.c b/board/spear/spear320/spr320_board.c new file mode 100755 index 0000000..750e303 --- /dev/null +++ b/board/spear/spear320/spr320_board.c @@ -0,0 +1,58 @@ +/* + * (C) Copyright 2009 + * Ryan Chen, ST Micoelectronics, ryan.chen at st.com. + * Vipin Kumar, ST Micoelectronics, vipin.kumar at st.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <nand.h> +#include <asm/io.h> +#include <asm/arch/spr_defs.h> +#include <asm/arch/spr_misc.h> +#include <asm/arch/spr_nand.h> + +int board_init(void) +{ + return spear_board_init(MACH_TYPE_SPEAR300); +} + +/** + * board_nand_init - Board specific NAND initialization + * @nand: mtd private chip structure + * + * Called by nand_init_chip to initialize the board specific functions + */ + +int board_nand_init(struct nand_chip *nand) +{ + struct misc_regs *const misc_regs_p = + (struct misc_regs *)CONFIG_SPEAR_MISCBASE; + + if (((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) == + MISC_SOCCFG30) || + ((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) == + MISC_SOCCFG31)) { + + return spear_nand_init(nand); + } else { + return -1; + } +} diff --git a/include/configs/spear320.h b/include/configs/spear320.h new file mode 100755 index 0000000..1fb0474 --- /dev/null +++ b/include/configs/spear320.h @@ -0,0 +1,336 @@ +/* + * (C) Copyright 2009 + * Vipin Kumar, STMicroelectronics, <vipin.kumar@st.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * High Level Configuration Options + * (easy to change) + */ +#define CONFIG_SPEAR3XX 1 +#define CONFIG_SPEAR320 1 + +/* + * Ethernet MAC driver configuration + */ +/* #define CONFIG_SPEAR_SMII */ +/* #define CONFIG_SPEARMAC */ +/* #define CONFIG_ETHAUTONEG */ +/* #define CONFIG_ETHDEBUG */ + +/* + * SMII driver configuratin + */ +#ifdef CONFIG_SPEAR_SMII +#define SPR320_SMII0_BASE 0xAA000000 +#define SPR320_SMII0_PHY 0x01 +#endif + + +/* + * USBD driver configuration + */ +#define CONFIG_SPEARUDC +#define CONFIG_USB_DEVICE +#define CONFIG_USB_TTY +#define CONFIG_SYS_USBD_BASE (0xE1100000) +#define CONFIG_SYS_PLUG_BASE (0xE1200000) +#define CONFIG_SYS_FIFO_BASE (0xE1000800) +#define CONFIG_USBD_PRODUCT_NAME "SPEAr SoC" +#define CONFIG_USBD_MANUFACTURER "ST Microelectronics" + +#define CONFIG_EXTRA_ENV_SETTINGS "usbtty=cdc_acm" + +/* + * I2C driver configuration + */ +#define CONFIG_HARD_I2C +#define CONFIG_SPEARI2C +#define CONFIG_SYS_I2C_BASE 0xD0180000 +#define CONFIG_SYS_I2C_SPEED 400000 +#define CONFIG_SYS_I2C_SLAVE 0x02 + +/* #define CONFIG_SYS_I2C_MULTI_EEPROMS */ +/* #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 0x1 */ + +/* + * SMI driver configuration + */ +#if defined(PNOR_FLASH) +#define CONFIG_SPEAR_EMI 1 +#else +#define CONFIG_SPEARSMI 1 +#endif + +#undef CONFIG_SYS_NO_FLASH +#define CONFIG_SYS_SMI_BASE 0xFC000000 + +/* + * Serial Configuration (PL011) + */ +#define CONFIG_SPEAR320_CUST_UART 1 + +#define CONFIG_PL011_SERIAL +#define CONFIG_PL011_CLOCK (48 * 1000 * 1000) +#define CONFIG_CONS_INDEX 0 +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, \ + 57600, 115200 } +#define CONFIG_SYS_SERIAL0 0xD0000000 + +#ifdef CONFIG_SPEAR320_CUST_UART + +#if (CONFIG_CONS_INDEX) +#undef CONFIG_PL011_CLOCK +#define CONFIG_PL011_CLOCK (83 * 1000 * 1000) +#endif + +#define CONFIG_SYS_SERIAL1 0xA3000000 +#define CONFIG_SYS_SERIAL2 0xA4000000 +#define CONFIG_PL01x_PORTS { (void *)CONFIG_SYS_SERIAL0, \ + (void *)CONFIG_SYS_SERIAL1, \ + (void *)CONFIG_SYS_SERIAL2} +#else +#define CONFIG_PL01x_PORTS { (void *)CONFIG_SYS_SERIAL0 } +#endif + +#define CONFIG_SYS_LOADS_BAUD_CHANGE + +/* + * Platform specific defines (SPEAr) + */ +#define CONFIG_SPEAR_SYSCNTLBASE (0xFCA00000) +#define CONFIG_SPEAR_TIMERBASE (0xFC800000) +#define CONFIG_SPEAR_MISCBASE (0xFCA80000) +#define CONFIG_SYS_HZ (26000) +#define CONFIG_SPEAR_EMIBASE (0x40000000) +#define CONFIG_SPEAR_RASBASE (0xB3000000) + +/* + * Board Specific Defines (SPEAr320) + */ + +/* + * FLASH Configuration + */ +#if defined(CONFIG_SPEARSMI) + +#define CONFIG_SYS_MAX_FLASH_BANKS 2 +#define CONFIG_SYS_FLASH_BASE (0xF8000000) +#define CONFIG_SYS_FLASH_BANK_SIZE (0x01000000) +#define CONFIG_SYS_FLASH_ADDR_BASE {0xF8000000, 0xF9000000} +#define CONFIG_SYS_MAX_FLASH_SECT 128 + +#define CONFIG_SYS_FLASH_EMPTY_INFO 1 +#define CONFIG_SYS_FLASH_ERASE_TOUT (3 * CONFIG_SYS_HZ) +#define CONFIG_SYS_FLASH_WRITE_TOUT (3 * CONFIG_SYS_HZ) + +#elif defined(CONFIG_SPEAR_EMI) + +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_FLASH_CFI_DRIVER +/* #define CONFIG_SYS_FLASH_PROTECTION */ +#define CONFIG_SYS_FLASH_BASE 0x44000000 +#define CONFIG_SYS_CS1_FLASH_BASE 0x45000000 +#define CONFIG_SYS_CS2_FLASH_BASE 0x46000000 +#define CONFIG_SYS_CS3_FLASH_BASE 0x47000000 +#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE, \ + CONFIG_SYS_CS1_FLASH_BASE, \ + CONFIG_SYS_CS2_FLASH_BASE, \ + CONFIG_SYS_CS3_FLASH_BASE } +#define CONFIG_SYS_MAX_FLASH_BANKS 4 +#define CONFIG_SYS_MAX_FLASH_SECT (127 + 8) + +#define CONFIG_SYS_FLASH_QUIET_TEST 1 + +/* For Intel/ST legacy flash */ +/* #define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes" */ + +#endif +/* + * NAND FLASH Configuration + */ +#define CONFIG_NAND_SPEAR 1 +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE 0x50000000 +#define CONFIG_SYS_NAND_CLE (1 << 16) +#define CONFIG_SYS_NAND_ALE (1 << 17) +#define CONFIG_MTD_NAND_VERIFY_WRITE 1 + +/* + * FSMC NAND driver configuration + */ +#define CONFIG_SPEAR_FSMCBASE (0x4C000000) + +/* + * Command support defines + */ +/* #define CONFIG_CMD_CACHE */ +/* #define CONFIG_CMD_CDP */ +/* #define CONFIG_CMD_DHCP */ +#define CONFIG_CMD_I2C +/* #define CONFIG_CMD_ELF */ +/* #define CONFIG_CMD_PING */ +#define CONFIG_CMD_NAND +#define CONFIG_CMD_ENV +/* #define CONFIG_CMD_JFFS2 */ +/* #define CONFIG_CMD_YAFFS2 */ +#define CONFIG_CMD_MEMORY +/* #define CONFIG_CMD_MII */ +/* #define CONFIG_MII */ +/* #define CONFIG_NET_MULTI */ +/* #define CONFIG_CMD_NET */ +#define CONFIG_CMD_RUN +#define CONFIG_CMD_SAVES +#define CONFIG_CMD_SETFREQ +/* #define CONFIG_CMD_EEPROM */ + +/* This must be included AFTER the definition of CONFIG_COMMANDS (if any) */ +#include <config_cmd_default.h> +#undef CONFIG_CMD_NET +#undef CONFIG_CMD_NFS + +/* + * Default Environment Varible definitions + */ +#define CONFIG_BOOTDELAY 1 +#define CONFIG_BOOTARGS_NFS "root=/dev/nfs ip=dhcp " \ + "console=ttyS0 init=/bin/sh" + +/* #define CONFIG_ETHADDR 00:11:22:33:44:55 */ + +/* #define CONFIG_NETMASK 255.255.255.0 */ +/* #define CONFIG_IPADDR 192.168.1.10 */ +/* #define CONFIG_SERVERIP 192.168.1.1 */ +/* #define CONFIG_GATEWAYIP 192.168.1.1 */ +#define CONFIG_ENV_OVERWRITE + +/* + * U-Boot Environment placing definitions. + */ +#ifdef ENV_IN_NAND +#define CONFIG_ENV_IS_IN_NAND +#else +#define CONFIG_ENV_IS_IN_FLASH +#endif + +#if defined(CONFIG_ENV_IS_IN_FLASH) +#ifdef CONFIG_SPEARSMI +/* + * Environment is in serial NOR flash + */ +#define CONFIG_SYS_MONITOR_LEN 0x00040000 +#define CONFIG_ENV_SECT_SIZE 0x00010000 + +#define CONFIG_BOOTARGS "console=ttyS0 mem=128M " \ + "root=/dev/mtdblock3 " \ + "rootfstype=jffs2" +#define CONFIG_BOOTCOMMAND "bootm 0xf8050000" + +#elif defined(CONFIG_SPEAR_EMI) +/* + * Environment is in parallel NOR flash + */ +#define CONFIG_SYS_MONITOR_LEN 0x00060000 +#define CONFIG_ENV_SECT_SIZE 0x00020000 + +#define CONFIG_BOOTARGS "console=ttyS0 mem=128M " \ + "root=/dev/mtdblock8 " \ + "rootfstype=jffs2" +#define CONFIG_BOOTCOMMAND "cp.b 0x50080000 0x1600000 "\ + "0x4C0000; bootm 0x1600000" + +#endif + +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE +#define CONFIG_ENV_SIZE 0x00002000 +#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \ + CONFIG_SYS_MONITOR_LEN) + +#elif defined(CONFIG_ENV_IS_IN_NAND) + +#define CONFIG_ENV_OFFSET 0x60000 +#define CONFIG_ENV_SIZE 0x04000 +/* #define CONFIG_ENV_OFFSET_REDUND 0x58000 */ +#define CONFIG_ENV_RANGE 0x10000 + +#define CONFIG_BOOTARGS "console=ttyS0 mem=128M " \ + "root=/dev/mtdblock12 " \ + "rootfstype=jffs2" +#define CONFIG_BOOTCOMMAND "nand read.jffs2 0x1600000 "\ + "0x60000 0x4C0000; " \ + "bootm 0x1600000" + +#endif + +/* + * Miscellaneous configurable options + */ + +#define CONFIG_BOOT_PARAMS_ADDR 0x00000100 +#define CONFIG_CMDLINE_TAG 1 +#define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_MISC_INIT_R 1 +#define CONFIG_ZERO_BOOTDELAY_CHECK 1 +#define CONFIG_AUTOBOOT_KEYED 1 +#define CONFIG_AUTOBOOT_STOP_STR " " +#define CONFIG_AUTOBOOT_PROMPT \ + "Hit SPACE in %d seconds to stop autoboot.\n", bootdelay + +#define CONFIG_SYS_MEMTEST_START 0x00800000 +#define CONFIG_SYS_MEMTEST_END 0x04000000 +#define CONFIG_SYS_MALLOC_LEN (1024*1024) +#define CONFIG_IDENT_STRING "-SPEAr320" +#define CONFIG_SYS_GBL_DATA_SIZE 128 +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_PROMPT "u-boot> " +#define CONFIG_CMDLINE_EDITING +#define CONFIG_SYS_CBSIZE 256 +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +#define CONFIG_SYS_LOAD_ADDR 0x00800000 +#define CONFIG_SYS_CONSOLE_INFO_QUIET 1 +#define CONFIG_SYS_64BIT_VSPRINTF 1 + +/* + * Stack sizes + */ +#define CONFIG_STACKSIZE (128*1024) + +#ifdef CONFIG_USE_IRQ +#define CONFIG_STACKSIZE_IRQ (4*1024) +#define CONFIG_STACKSIZE_FIQ (4*1024) +#endif + +/* + * Physical Memory Map + */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM_1 0x00000000 +#define PHYS_SDRAM_1_MAXSIZE 0x40000000 + +#endif /* __CONFIG_H */ + -- 1.6.0.2 ^ permalink raw reply related [flat|nested] 44+ messages in thread
* [U-Boot] [PATCH 9/9] SPEAr600 build support added 2009-12-16 9:18 ` [U-Boot] [PATCH 8/9] SPEAr320 " Vipin KUMAR @ 2009-12-16 9:18 ` Vipin KUMAR 2009-12-17 20:14 ` Wolfgang Denk 2009-12-17 20:14 ` [U-Boot] [PATCH 8/9] SPEAr320 SoC " Wolfgang Denk 1 sibling, 1 reply; 44+ messages in thread From: Vipin KUMAR @ 2009-12-16 9:18 UTC (permalink / raw) To: u-boot Signed-off-by: Vipin <vipin.kumar@st.com> --- MAKEALL | 1 + Makefile | 3 +++ 2 files changed, 4 insertions(+), 0 deletions(-) diff --git a/MAKEALL b/MAKEALL index 0672ba0..a76ab8f 100755 --- a/MAKEALL +++ b/MAKEALL @@ -575,6 +575,7 @@ LIST_ARM9=" \ spear300 \ spear310 \ spear320 \ + spear600 \ trab \ VCMA9 \ versatile \ diff --git a/Makefile b/Makefile index 1f60204..cfff455 100644 --- a/Makefile +++ b/Makefile @@ -3065,6 +3065,9 @@ spear310_config : unconfig spear320_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm926ejs spear320 spear spear +spear600_config : unconfig + @$(MKCONFIG) $(@:_config=) arm arm926ejs spear600 spear spear + SX1_stdout_serial_config \ SX1_config: unconfig @mkdir -p $(obj)include -- 1.6.0.2 ^ permalink raw reply related [flat|nested] 44+ messages in thread
* [U-Boot] [PATCH 9/9] SPEAr600 build support added 2009-12-16 9:18 ` [U-Boot] [PATCH 9/9] SPEAr600 build " Vipin KUMAR @ 2009-12-17 20:14 ` Wolfgang Denk 2009-12-19 7:26 ` Vipin Kumar 0 siblings, 1 reply; 44+ messages in thread From: Wolfgang Denk @ 2009-12-17 20:14 UTC (permalink / raw) To: u-boot Dear Vipin KUMAR, In message <1260955110-5656-10-git-send-email-vipin.kumar@st.com> you wrote: > > Signed-off-by: Vipin <vipin.kumar@st.com> > --- > MAKEALL | 1 + > Makefile | 3 +++ > 2 files changed, 4 insertions(+), 0 deletions(-) This patch must be merged with the one adding the actual code for this board. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de The only way to learn a new programming language is by writing pro- grams in it. - Brian Kernighan ^ permalink raw reply [flat|nested] 44+ messages in thread
* [U-Boot] [PATCH 9/9] SPEAr600 build support added 2009-12-17 20:14 ` Wolfgang Denk @ 2009-12-19 7:26 ` Vipin Kumar 0 siblings, 0 replies; 44+ messages in thread From: Vipin Kumar @ 2009-12-19 7:26 UTC (permalink / raw) To: u-boot Dear Wolfgang, >> >> Signed-off-by: Vipin <vipin.kumar@st.com> >> --- >> ?MAKEALL ?| ? ?1 + >> ?Makefile | ? ?3 +++ >> ?2 files changed, 4 insertions(+), 0 deletions(-) > > This patch must be merged with the one adding the actual code for this > board. Ok. Patch merged with the previous one where actual code for SPEAr600 is added Regards Vipin ^ permalink raw reply [flat|nested] 44+ messages in thread
* [U-Boot] [PATCH 8/9] SPEAr320 SoC support added 2009-12-16 9:18 ` [U-Boot] [PATCH 8/9] SPEAr320 " Vipin KUMAR 2009-12-16 9:18 ` [U-Boot] [PATCH 9/9] SPEAr600 build " Vipin KUMAR @ 2009-12-17 20:14 ` Wolfgang Denk 2009-12-19 7:21 ` Vipin Kumar 1 sibling, 1 reply; 44+ messages in thread From: Wolfgang Denk @ 2009-12-17 20:14 UTC (permalink / raw) To: u-boot Dear Vipin KUMAR, In message <1260955110-5656-9-git-send-email-vipin.kumar@st.com> you wrote: > > Signed-off-by: Vipin <vipin.kumar@st.com> > --- > MAKEALL | 1 + > Makefile | 3 + > board/spear/spear320/Makefile | 52 ++++++ > board/spear/spear320/config.mk | 42 +++++ > board/spear/spear320/spr320_board.c | 58 ++++++ > include/configs/spear320.h | 336 +++++++++++++++++++++++++++++++++++ > 6 files changed, 492 insertions(+), 0 deletions(-) > create mode 100755 board/spear/spear320/Makefile > create mode 100755 board/spear/spear320/config.mk > create mode 100755 board/spear/spear320/spr320_board.c > create mode 100755 include/configs/spear320.h Again: you seem to be adding just a new board, not a new SoC - please fix commit message. See review comments for previous patch; they all apply here, too. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de There's nothing disgusting about it [the Companion]. It's just another life form, that's all. You get used to those things. -- McCoy, "Metamorphosis", stardate 3219.8 ^ permalink raw reply [flat|nested] 44+ messages in thread
* [U-Boot] [PATCH 8/9] SPEAr320 SoC support added 2009-12-17 20:14 ` [U-Boot] [PATCH 8/9] SPEAr320 SoC " Wolfgang Denk @ 2009-12-19 7:21 ` Vipin Kumar 0 siblings, 0 replies; 44+ messages in thread From: Vipin Kumar @ 2009-12-19 7:21 UTC (permalink / raw) To: u-boot Dear Wolfgang, >> Signed-off-by: Vipin <vipin.kumar@st.com> >> --- >> ?MAKEALL ? ? ? ? ? ? ? ? ? ? ? ? ? ? | ? ?1 + >> ?Makefile ? ? ? ? ? ? ? ? ? ? ? ? ? ?| ? ?3 + >> ?board/spear/spear320/Makefile ? ? ? | ? 52 ++++++ >> ?board/spear/spear320/config.mk ? ? ?| ? 42 +++++ >> ?board/spear/spear320/spr320_board.c | ? 58 ++++++ >> ?include/configs/spear320.h ? ? ? ? ?| ?336 +++++++++++++++++++++++++++++++++++ >> ?6 files changed, 492 insertions(+), 0 deletions(-) >> ?create mode 100755 board/spear/spear320/Makefile >> ?create mode 100755 board/spear/spear320/config.mk >> ?create mode 100755 board/spear/spear320/spr320_board.c >> ?create mode 100755 include/configs/spear320.h > > Again: you seem to be adding just a new board, not a new SoC - please > fix commit message. > > See review comments for previous patch; they all apply here, too. Ok. Changed according to previous patch comments Best Regards Vipin ^ permalink raw reply [flat|nested] 44+ messages in thread
* [U-Boot] [PATCH 7/9] SPEAr310 SoC support added 2009-12-16 9:18 ` [U-Boot] [PATCH 7/9] SPEAr310 " Vipin KUMAR 2009-12-16 9:18 ` [U-Boot] [PATCH 8/9] SPEAr320 " Vipin KUMAR @ 2009-12-17 20:13 ` Wolfgang Denk 2009-12-19 7:19 ` Vipin Kumar 1 sibling, 1 reply; 44+ messages in thread From: Wolfgang Denk @ 2009-12-17 20:13 UTC (permalink / raw) To: u-boot Dear Vipin KUMAR, In message <1260955110-5656-8-git-send-email-vipin.kumar@st.com> you wrote: > > Signed-off-by: Vipin <vipin.kumar@st.com> > --- > MAKEALL | 1 + > Makefile | 3 + > board/spear/spear310/Makefile | 52 +++++ > board/spear/spear310/config.mk | 42 ++++ > board/spear/spear310/spr310_board.c | 58 ++++++ > include/configs/spear310.h | 353 +++++++++++++++++++++++++++++++++++ The commit message seems wrong. You just add a new board, not a new SoC. > diff --git a/board/spear/spear310/config.mk b/board/spear/spear310/config.mk > new file mode 100755 > index 0000000..8b7aa05 > --- /dev/null > +++ b/board/spear/spear310/config.mk ... > +ifeq ($(CONSOLE),USB) > +PLATFORM_RELFLAGS += -DCONFIG_SPEAR_USBTTY > +endif > + No trailing empty lines, please. > +int board_nand_init(struct nand_chip *nand) > +{ > + struct misc_regs *const misc_regs_p = > + (struct misc_regs *)CONFIG_SPEAR_MISCBASE; > + > + if (((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) == > + MISC_SOCCFG30) || > + ((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) == > + MISC_SOCCFG31)) { > + > + return spear_nand_init(nand); > + } else { > + return -1; > + } No else, unindent the "return -1;". > +/* > + * Ethernet MAC driver configuration > + */ > +/* #define CONFIG_SPEAR_SMII */ > +/* #define CONFIG_SPEARMAC */ > +/* #define CONFIG_ETHAUTONEG */ > +/* #define CONFIG_ETHDEBUG */ Don't add dead code (fix globally). > + > +#define CONFIG_SYS_SERIAL1 0xB2000000 > +#define CONFIG_SYS_SERIAL2 0xB2080000 > +#define CONFIG_SYS_SERIAL3 0xB2100000 > +#define CONFIG_SYS_SERIAL4 0xB2180000 > +#define CONFIG_SYS_SERIAL5 0xB2200000 > +#define CONFIG_PL01x_PORTS { (void *)CONFIG_SYS_SERIAL0, \ > + (void *)CONFIG_SYS_SERIAL1, \ > + (void *)CONFIG_SYS_SERIAL2, \ > + (void *)CONFIG_SYS_SERIAL3, \ > + (void *)CONFIG_SYS_SERIAL4, \ > + (void *)CONFIG_SYS_SERIAL5} Indentation / avertical alignment by TABs, please. [Globally.] > +#define CONFIG_BOOTARGS "console=ttyS0 mem=128M " \ ... > +#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \ etc.: Lines too long. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de The explanation requiring the fewest assumptions is the most likely to be correct. -- William of Occam ^ permalink raw reply [flat|nested] 44+ messages in thread
* [U-Boot] [PATCH 7/9] SPEAr310 SoC support added 2009-12-17 20:13 ` [U-Boot] [PATCH 7/9] SPEAr310 " Wolfgang Denk @ 2009-12-19 7:19 ` Vipin Kumar 0 siblings, 0 replies; 44+ messages in thread From: Vipin Kumar @ 2009-12-19 7:19 UTC (permalink / raw) To: u-boot Dear Wolfgang, >> >> Signed-off-by: Vipin <vipin.kumar@st.com> >> --- >> ?MAKEALL ? ? ? ? ? ? ? ? ? ? ? ? ? ? | ? ?1 + >> ?Makefile ? ? ? ? ? ? ? ? ? ? ? ? ? ?| ? ?3 + >> ?board/spear/spear310/Makefile ? ? ? | ? 52 +++++ >> ?board/spear/spear310/config.mk ? ? ?| ? 42 ++++ >> ?board/spear/spear310/spr310_board.c | ? 58 ++++++ >> ?include/configs/spear310.h ? ? ? ? ?| ?353 +++++++++++++++++++++++++++++++++++ > > The commit message seems wrong. You just add a new board, not a new > SoC. SPEAr310 is a new SoC but it has a lot in common with SPEAr300 Offcourse, since only the common IP's are supported in uboot, there is no new driver required for SPEAr310. >> diff --git a/board/spear/spear310/config.mk b/board/spear/spear310/config.mk >> new file mode 100755 >> index 0000000..8b7aa05 >> --- /dev/null >> +++ b/board/spear/spear310/config.mk > ... >> +ifeq ($(CONSOLE),USB) >> +PLATFORM_RELFLAGS += -DCONFIG_SPEAR_USBTTY >> +endif >> + > > No trailing empty lines, please. Ok. Trailing empty lines removed globally >> +int board_nand_init(struct nand_chip *nand) >> +{ >> + ? ? struct misc_regs *const misc_regs_p = >> + ? ? ? ? ? ? (struct misc_regs *)CONFIG_SPEAR_MISCBASE; >> + >> + ? ? if (((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) == >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? MISC_SOCCFG30) || >> + ? ? ? ?((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) == >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? MISC_SOCCFG31)) { >> + >> + ? ? ? ? ? ? return spear_nand_init(nand); >> + ? ? } else { >> + ? ? ? ? ? ? return -1; >> + ? ? } > > No else, unindent the "return -1;". Ok. else removed and return -1 unindented >> +/* >> + * Ethernet MAC driver configuration >> + */ >> +/* #define CONFIG_SPEAR_SMII */ >> +/* #define CONFIG_SPEARMAC */ >> +/* #define CONFIG_ETHAUTONEG */ >> +/* #define CONFIG_ETHDEBUG */ > > Don't add dead code (fix globally). Fixed globally >> + >> +#define CONFIG_SYS_SERIAL1 ? ? ? ? ? ? ? ? ? ? ?0xB2000000 >> +#define CONFIG_SYS_SERIAL2 ? ? ? ? ? ? ? ? ? ? ?0xB2080000 >> +#define CONFIG_SYS_SERIAL3 ? ? ? ? ? ? ? ? ? ? ?0xB2100000 >> +#define CONFIG_SYS_SERIAL4 ? ? ? ? ? ? ? ? ? ? ?0xB2180000 >> +#define CONFIG_SYS_SERIAL5 ? ? ? ? ? ? ? ? ? ? ?0xB2200000 >> +#define CONFIG_PL01x_PORTS ? ? ? ? ? ? ? ? ? ? ?{ (void *)CONFIG_SYS_SERIAL0, ?\ >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? (void *)CONFIG_SYS_SERIAL1, ? ?\ >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? (void *)CONFIG_SYS_SERIAL2, ? ?\ >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? (void *)CONFIG_SYS_SERIAL3, ? ?\ >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? (void *)CONFIG_SYS_SERIAL4, ? ?\ >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? (void *)CONFIG_SYS_SERIAL5} > > Indentation / avertical alignment by TABs, please. [Globally.] Changed to use tabs for indenting and vertical alignment >> +#define CONFIG_BOOTARGS ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?"console=ttyS0 mem=128M " ?\ > ... >> +#define CONFIG_ENV_ADDR ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?(CONFIG_SYS_MONITOR_BASE + \ > > etc.: Lines too long. Long lines curtailed globally Best Regards Vipin ^ permalink raw reply [flat|nested] 44+ messages in thread
* [U-Boot] [PATCH 6/9] SPEAr300 SoC support added 2009-12-16 9:18 ` [U-Boot] [PATCH 6/9] SPEAr300 " Vipin KUMAR 2009-12-16 9:18 ` [U-Boot] [PATCH 7/9] SPEAr310 " Vipin KUMAR @ 2009-12-17 20:09 ` Wolfgang Denk 2009-12-19 7:10 ` Vipin Kumar 1 sibling, 1 reply; 44+ messages in thread From: Wolfgang Denk @ 2009-12-17 20:09 UTC (permalink / raw) To: u-boot Dear Vipin KUMAR, In message <1260955110-5656-7-git-send-email-vipin.kumar@st.com> you wrote: > > Signed-off-by: Vipin <vipin.kumar@st.com> ... > diff --git a/board/spear/spear300/config.mk b/board/spear/spear300/config.mk > new file mode 100755 > index 0000000..90a6cf9 > --- /dev/null > +++ b/board/spear/spear300/config.mk ... > +PLATFORM_RELFLAGS += -DCONFIG_SPEAR_USBTTY > +endif > + Please do not add trailing empty lines. [Please check globally.] > diff --git a/board/spear/spear300/spr300_board.c b/board/spear/spear300/spr300_board.c > new file mode 100755 > index 0000000..97de0be > --- /dev/null > +++ b/board/spear/spear300/spr300_board.c Usually the file name is the same as the board config name. > +int board_nand_init(struct nand_chip *nand) > +{ > + struct misc_regs *const misc_regs_p = > + (struct misc_regs *)CONFIG_SPEAR_MISCBASE; > + > + if (((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) == > + MISC_SOCCFG30) || > + ((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) == > + MISC_SOCCFG31)) { > + > + return spear_nand_init(nand); > + } else { > + return -1; "else" not needed. Unindent the "return -1;". > diff --git a/include/configs/spear300.h b/include/configs/spear300.h > new file mode 100755 > index 0000000..59b1f45 > --- /dev/null > +++ b/include/configs/spear300.h ... > +/* > + * Ethernet MAC driver configuration > + */ > +/* #define CONFIG_SPEARMAC */ > +/* #define CONFIG_ETHAUTONEG */ > +/* #define CONFIG_ETHDEBUG */ Don't add dead code. > +#define CONFIG_SYS_FIFO_BASE (0xE1000800) > +#define CONFIG_USBD_PRODUCT_NAME "SPEAr SoC" > +#define CONFIG_USBD_MANUFACTURER "ST Microelectronics" > + > +#define CONFIG_EXTRA_ENV_SETTINGS "usbtty=cdc_acm" Vertial alignment by TABs only, please. > +/* #define CONFIG_SYS_I2C_MULTI_EEPROMS */ > +/* #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 0x1 */ Don't add dead code. Please fix globally. > +/* > + * SMI driver configuration > + */ > +#define CONFIG_SPEARSMI > +#undef CONFIG_SYS_NO_FLASH Don't undef what is not defined anyway. > +#define CONFIG_SYS_HZ (26000) CONFIG_SYS_HZ _must_ be defined as 1000. > +/* #define CONFIG_ETHADDR 00:11:22:33:44:55 */ > + > +/* #define CONFIG_NETMASK 255.255.255.0 */ > +/* #define CONFIG_IPADDR 192.168.1.10 */ > +/* #define CONFIG_SERVERIP 192.168.1.1 */ > +/* #define CONFIG_GATEWAYIP 192.168.1.1 */ Get rid of all this stuff. > +#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \ > + CONFIG_SYS_MONITOR_LEN) > + > +#define CONFIG_BOOTARGS "console=ttyS0 mem=128M " \ Lines too long. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de But it's real. And if it's real it can be affected ... we may not be able to break it, but, I'll bet you credits to Navy Beans we can put a dent in it. -- deSalle, "Catspaw", stardate 3018.2 ^ permalink raw reply [flat|nested] 44+ messages in thread
* [U-Boot] [PATCH 6/9] SPEAr300 SoC support added 2009-12-17 20:09 ` [U-Boot] [PATCH 6/9] SPEAr300 " Wolfgang Denk @ 2009-12-19 7:10 ` Vipin Kumar 2009-12-19 7:25 ` Wolfgang Denk 0 siblings, 1 reply; 44+ messages in thread From: Vipin Kumar @ 2009-12-19 7:10 UTC (permalink / raw) To: u-boot Dear Wolfgang, >> >> Signed-off-by: Vipin <vipin.kumar@st.com> > ... >> diff --git a/board/spear/spear300/config.mk b/board/spear/spear300/config.mk >> new file mode 100755 >> index 0000000..90a6cf9 >> --- /dev/null >> +++ b/board/spear/spear300/config.mk > ... >> +PLATFORM_RELFLAGS += -DCONFIG_SPEAR_USBTTY >> +endif >> + > > Please do not add trailing empty lines. [Please check globally.] Ok. Corrected globally >> diff --git a/board/spear/spear300/spr300_board.c b/board/spear/spear300/spr300_board.c >> new file mode 100755 >> index 0000000..97de0be >> --- /dev/null >> +++ b/board/spear/spear300/spr300_board.c > > Usually the file name is the same as the board config name. Ok. filename corrected >> +int board_nand_init(struct nand_chip *nand) >> +{ >> + ? ? struct misc_regs *const misc_regs_p = >> + ? ? ? ? ? ? (struct misc_regs *)CONFIG_SPEAR_MISCBASE; >> + >> + ? ? if (((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) == >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? MISC_SOCCFG30) || >> + ? ? ? ?((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) == >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? MISC_SOCCFG31)) { >> + >> + ? ? ? ? ? ? return spear_nand_init(nand); >> + ? ? } else { >> + ? ? ? ? ? ? return -1; > > "else" not needed. Unindent the "return -1;". Ok. Removed else and unindented >> diff --git a/include/configs/spear300.h b/include/configs/spear300.h >> new file mode 100755 >> index 0000000..59b1f45 >> --- /dev/null >> +++ b/include/configs/spear300.h > ... >> +/* >> + * Ethernet MAC driver configuration >> + */ >> +/* #define CONFIG_SPEARMAC */ >> +/* #define CONFIG_ETHAUTONEG */ >> +/* #define CONFIG_ETHDEBUG */ > > Don't add dead code. Ok. dead code removed >> +#define CONFIG_SYS_FIFO_BASE ? ? ? ? ? ? ? ? (0xE1000800) >> +#define CONFIG_USBD_PRODUCT_NAME ? ? ? ? ? ? "SPEAr SoC" >> +#define CONFIG_USBD_MANUFACTURER ? ? ? ? ? ? "ST Microelectronics" >> + >> +#define CONFIG_EXTRA_ENV_SETTINGS ? ? ? ? ? ? ? "usbtty=cdc_acm" > > Vertial alignment by TABs only, please. Ok. Used tabs for vertical alignment >> +/* #define CONFIG_SYS_I2C_MULTI_EEPROMS */ >> +/* #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN ? ? ? ?0x1 */ > > Don't add dead code. Please fix globally. Ok. Corrected globally >> +/* >> + * SMI driver configuration >> + */ >> +#define CONFIG_SPEARSMI >> +#undef ?CONFIG_SYS_NO_FLASH > > Don't undef what is not defined anyway. Ok. undef removed >> +#define CONFIG_SYS_HZ ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?(26000) > > CONFIG_SYS_HZ _must_ be defined as 1000. Could not understand the reason why it is necessary >> +/* #define CONFIG_ETHADDR ? ? ? ? ? ? ? ? ? ?00:11:22:33:44:55 */ >> + >> +/* #define CONFIG_NETMASK ? ? ? ? ? ? ? ? ? ?255.255.255.0 */ >> +/* #define CONFIG_IPADDR ? ? ? ? ? ? ? ? ? ? 192.168.1.10 */ >> +/* #define CONFIG_SERVERIP ? ? ? ? ? ? ? ? ? 192.168.1.1 */ >> +/* #define CONFIG_GATEWAYIP ? ? ? ? ? ? ? ? ?192.168.1.1 */ > > Get rid of all this stuff. Ok. Dead code removed >> +#define CONFIG_ENV_ADDR ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?(CONFIG_SYS_MONITOR_BASE + \ >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? CONFIG_SYS_MONITOR_LEN) >> + >> +#define CONFIG_BOOTARGS ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?"console=ttyS0 mem=128M " ?\ > > Lines too long. Ok. Corrected. Best Regards Vipin ^ permalink raw reply [flat|nested] 44+ messages in thread
* [U-Boot] [PATCH 6/9] SPEAr300 SoC support added 2009-12-19 7:10 ` Vipin Kumar @ 2009-12-19 7:25 ` Wolfgang Denk 2009-12-19 7:58 ` Vipin Kumar 0 siblings, 1 reply; 44+ messages in thread From: Wolfgang Denk @ 2009-12-19 7:25 UTC (permalink / raw) To: u-boot Dear Vipin Kumar, In message <83d1d72b0912182310i1abf805jf6e338fd01faead1@mail.gmail.com> you wrote: > > > CONFIG_SYS_HZ _must_ be defined as 1000. > > Could not understand the reason why it is necessary Some parts of the code rely on this. It has been a bad idea to ever make this a config variable (but that's history, and we cannot change it). Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de If you hear an onion ring, answer it. ^ permalink raw reply [flat|nested] 44+ messages in thread
* [U-Boot] [PATCH 6/9] SPEAr300 SoC support added 2009-12-19 7:25 ` Wolfgang Denk @ 2009-12-19 7:58 ` Vipin Kumar 0 siblings, 0 replies; 44+ messages in thread From: Vipin Kumar @ 2009-12-19 7:58 UTC (permalink / raw) To: u-boot Dear Wolfgang, > In message <83d1d72b0912182310i1abf805jf6e338fd01faead1@mail.gmail.com> you wrote: >> >> > CONFIG_SYS_HZ _must_ be defined as 1000. >> >> Could not understand the reason why it is necessary > > Some parts of the code rely on this. It has been a bad idea to ever > make this a config variable (but that's history, and we cannot change > it). > Ok. change accepted Best Regards Vipin ^ permalink raw reply [flat|nested] 44+ messages in thread
* [U-Boot] [PATCH 5/9] SPEAr600 SoC support added 2009-12-16 9:18 ` [U-Boot] [PATCH 5/9] SPEAr600 SoC support added Vipin KUMAR 2009-12-16 9:18 ` [U-Boot] [PATCH 6/9] SPEAr300 " Vipin KUMAR @ 2009-12-16 17:30 ` Peter Tyser 2009-12-16 18:00 ` Armando VISCONTI 2009-12-16 23:09 ` Wolfgang Denk 2 siblings, 1 reply; 44+ messages in thread From: Peter Tyser @ 2009-12-16 17:30 UTC (permalink / raw) To: u-boot On Wed, 2009-12-16 at 14:48 +0530, Vipin KUMAR wrote: > Signed-off-by: Vipin <vipin.kumar@st.com> > --- > board/spear/common/spr_lowlevel_init.S | 202 ++++++++++++++++++ > board/spear/common/spr_misc.c | 270 ++++++++++++++++++++++++ > board/spear/spear600/Makefile | 52 +++++ > board/spear/spear600/config.mk | 39 ++++ > board/spear/spear600/spr600_board.c | 53 +++++ The changes to board/* should be moved out of this patch and into patch 9 "SPEAr600 build support added". Same comment for include/configs/spear600.h. > common/cmd_bdinfo.c | 20 ++ > cpu/arm926ejs/spear/Makefile | 52 +++++ > cpu/arm926ejs/spear/reset.c | 49 +++++ > cpu/arm926ejs/spear/timer.c | 148 +++++++++++++ > include/asm-arm/arch-spear/spr_defs.h | 31 +++ > include/asm-arm/arch-spear/spr_emi.h | 55 +++++ > include/asm-arm/arch-spear/spr_gpt.h | 83 ++++++++ > include/asm-arm/arch-spear/spr_syscntl.h | 38 ++++ > include/asm-arm/arch-spear/spr_xloader_table.h | 67 ++++++ > include/asm-arm/u-boot.h | 5 + > include/configs/spear600.h | 260 +++++++++++++++++++++++ It'd also be nice to give a description of each board and SOC you add. Eg what's the difference between the 300, 310, 320, 600? What peripherals do they support? What does SPEAr stand for? More commit messages in general wouldn't hurt:) Best, Peter ^ permalink raw reply [flat|nested] 44+ messages in thread
* [U-Boot] [PATCH 5/9] SPEAr600 SoC support added 2009-12-16 17:30 ` [U-Boot] [PATCH 5/9] SPEAr600 " Peter Tyser @ 2009-12-16 18:00 ` Armando VISCONTI 2009-12-16 18:28 ` Peter Tyser 0 siblings, 1 reply; 44+ messages in thread From: Armando VISCONTI @ 2009-12-16 18:00 UTC (permalink / raw) To: u-boot Ciao Peter, > The changes to board/* should be moved out of this patch and into patch > 9 "SPEAr600 build support added". Same comment for > include/configs/spear600.h. > Tomorrow we will resend patch_5 and patch_9. > It'd also be nice to give a description of each board and SOC you add. > Eg what's the difference between the 300, 310, 320, 600? What > peripherals do they support? What does SPEAr stand for? More commit > messages in general wouldn't hurt:) > SPEAr (Structured Processor Enhanced Architecture). You can find some description throughout Internet, for example here: http://embedded-system.net/spear-basic-customizable-arm-based-soc-stmicroelectronics.html (SPEARBasic means SPEAr300.) As you can see this SoC family embeds a customizable logic that could be programmed one-time by a customer at silicon mask level (i.e. not at runtime!). We are now adding the support in u-boot for two SoC: SPEAr600 and SPEAr3xx. Pls note that SPEAr300/310/320 differs only for the default customization. All 4 SoCs share common peripherals. 1. ARM926ejs core based (sp600 has two AMP cores, the 2nd handled only in Linux) 2. FastEthernet (sp600 has Gbit version, but same controller - GMAC) 3. USB Host 4. USB Device 5. NAND controller (FSMC) 6. Serial NOR ctrl 7. I2C 8. SPI 9. CLCD 10. others .. sp600 is not customized by default. sp3xx are differently customized... sp300 is more oriented to TELECOM/video (it has tdm, i2s, ITU i/f support) sp310 for networking (a part GMAC in fixed part, it has 5 MACB ctrls in custom) sp320 for industrial (SPP ctrl, CAN ctrl, 2 MACBs, ...) Everything is supported in Linux. u-boot is not currently supporting all peripeharls (just a few). Regards, Arm Peter Tyser wrote: > On Wed, 2009-12-16 at 14:48 +0530, Vipin KUMAR wrote: > >> Signed-off-by: Vipin <vipin.kumar@st.com> >> --- >> board/spear/common/spr_lowlevel_init.S | 202 ++++++++++++++++++ >> board/spear/common/spr_misc.c | 270 ++++++++++++++++++++++++ >> board/spear/spear600/Makefile | 52 +++++ >> board/spear/spear600/config.mk | 39 ++++ >> board/spear/spear600/spr600_board.c | 53 +++++ >> > The changes to board/* should be moved out of this patch and into patch > 9 "SPEAr600 build support added". Same comment for > include/configs/spear600.h. > > >> common/cmd_bdinfo.c | 20 ++ >> cpu/arm926ejs/spear/Makefile | 52 +++++ >> cpu/arm926ejs/spear/reset.c | 49 +++++ >> cpu/arm926ejs/spear/timer.c | 148 +++++++++++++ >> include/asm-arm/arch-spear/spr_defs.h | 31 +++ >> include/asm-arm/arch-spear/spr_emi.h | 55 +++++ >> include/asm-arm/arch-spear/spr_gpt.h | 83 ++++++++ >> include/asm-arm/arch-spear/spr_syscntl.h | 38 ++++ >> include/asm-arm/arch-spear/spr_xloader_table.h | 67 ++++++ >> include/asm-arm/u-boot.h | 5 + >> include/configs/spear600.h | 260 +++++++++++++++++++++++ >> > > It'd also be nice to give a description of each board and SOC you add. > Eg what's the difference between the 300, 310, 320, 600? What > peripherals do they support? What does SPEAr stand for? More commit > messages in general wouldn't hurt:) > > Best, > Peter > > _______________________________________________ > U-Boot mailing list > U-Boot at lists.denx.de > http://lists.denx.de/mailman/listinfo/u-boot > -- -- "Every step appears to be the unavoidable consequence of the -- preceding one." (A. Einstein) -- Armando Visconti Mobile: (+39) 346 8879146 Senior SW Engineer Fax: (+39) 02 93519290 CPG Work: (+39) 02 93519683 Computer System Division e-mail: armando.visconti at st.com ST Microelectronics TINA: 051 4683 ^ permalink raw reply [flat|nested] 44+ messages in thread
* [U-Boot] [PATCH 5/9] SPEAr600 SoC support added 2009-12-16 18:00 ` Armando VISCONTI @ 2009-12-16 18:28 ` Peter Tyser 2009-12-17 22:44 ` Wolfgang Denk 0 siblings, 1 reply; 44+ messages in thread From: Peter Tyser @ 2009-12-16 18:28 UTC (permalink / raw) To: u-boot Hi Arm, <snip> > > It'd also be nice to give a description of each board and SOC you add. > > Eg what's the difference between the 300, 310, 320, 600? What > > peripherals do they support? What does SPEAr stand for? More commit > > messages in general wouldn't hurt:) > > > SPEAr (Structured Processor Enhanced Architecture). > You can find some description throughout Internet, for example here: > > http://embedded-system.net/spear-basic-customizable-arm-based-soc-stmicroelectronics.html > (SPEARBasic means SPEAr300.) > > As you can see this SoC family embeds a customizable logic that could > be programmed one-time by a customer at silicon mask level (i.e. not at > runtime!). > > We are now adding the support in u-boot for two SoC: SPEAr600 and SPEAr3xx. > Pls note that SPEAr300/310/320 differs only for the default customization. > > All 4 SoCs share common peripherals. > > 1. ARM926ejs core based (sp600 has two AMP cores, the 2nd handled only > in Linux) > 2. FastEthernet (sp600 has Gbit version, but same controller - GMAC) > 3. USB Host > 4. USB Device > 5. NAND controller (FSMC) > 6. Serial NOR ctrl > 7. I2C > 8. SPI > 9. CLCD > 10. others .. > > sp600 is not customized by default. > > sp3xx are differently customized... > sp300 is more oriented to TELECOM/video (it has tdm, i2s, ITU i/f support) > sp310 for networking (a part GMAC in fixed part, it has 5 MACB ctrls in > custom) > sp320 for industrial (SPP ctrl, CAN ctrl, 2 MACBs, ...) > > Everything is supported in Linux. > u-boot is not currently supporting all peripeharls (just a few). I see. It'd be nice to put some of the above information in the U-Boot commit logs to give people an idea about what's going on without having to use google, etc. I haven't looked at the code differences between the sp3xx boards, but you might be able to use 1 common board file/header file to support them all. For example, take a look at the M5475AFE_config rule in U-Boot's ./Makefile. Some extra code in the Makefile and some #ifdefs in the sp3xx code might accommodate all 3 boards. Best, Peter ^ permalink raw reply [flat|nested] 44+ messages in thread
* [U-Boot] [PATCH 5/9] SPEAr600 SoC support added 2009-12-16 18:28 ` Peter Tyser @ 2009-12-17 22:44 ` Wolfgang Denk 2009-12-17 22:54 ` Peter Tyser 0 siblings, 1 reply; 44+ messages in thread From: Wolfgang Denk @ 2009-12-17 22:44 UTC (permalink / raw) To: u-boot Dear Peter Tyser, In message <1260988086.11634.3576.camel@localhost.localdomain> you wrote: > > I see. It'd be nice to put some of the above information in the U-Boot > commit logs to give people an idea about what's going on without having > to use google, etc. ...and even better in some doc/README.??? so it is part of the source code. > I haven't looked at the code differences between the sp3xx boards, but > you might be able to use 1 common board file/header file to support them > all. For example, take a look at the M5475AFE_config rule in > U-Boot's ./Makefile. Some extra code in the Makefile and some #ifdefs > in the sp3xx code might accommodate all 3 boards. Extra code in the Makefile should not be needed any more. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de Zero is an enigmatic value. It can mean success (fclose) or failure (scanf). It can mean black or white. It can mean no permissions (chmod) or all permissions (umask). It can mean now (setjmp) or later (atexit). It can mean the beginning (lseek) or the end (read). It can mean myself (getpgrp) or child (fork). It can mean all (kill's 1st argument) or nothing (kill's 2nd argument). It can mean `default' (SIG_IGN) or `I don't care' (waitpid) or `try to guess' (strtol). Indeed 0 lets you talk to God (setuid). Verily is 0 all things to all people. ^ permalink raw reply [flat|nested] 44+ messages in thread
* [U-Boot] [PATCH 5/9] SPEAr600 SoC support added 2009-12-17 22:44 ` Wolfgang Denk @ 2009-12-17 22:54 ` Peter Tyser 2009-12-17 23:13 ` Wolfgang Denk 0 siblings, 1 reply; 44+ messages in thread From: Peter Tyser @ 2009-12-17 22:54 UTC (permalink / raw) To: u-boot Hi Wolfgang, <snip> > > I haven't looked at the code differences between the sp3xx boards, but > > you might be able to use 1 common board file/header file to support them > > all. For example, take a look at the M5475AFE_config rule in > > U-Boot's ./Makefile. Some extra code in the Makefile and some #ifdefs > > in the sp3xx code might accommodate all 3 boards. > > Extra code in the Makefile should not be needed any more. To be clear, you still think its a good idea to look into combining the similar boards, correct? I haven't dealt with the MKCONFIG voodoo, so maybe I chose a poor example. Perhaps the CPCI405 and friends is a better example? Best, Peter ^ permalink raw reply [flat|nested] 44+ messages in thread
* [U-Boot] [PATCH 5/9] SPEAr600 SoC support added 2009-12-17 22:54 ` Peter Tyser @ 2009-12-17 23:13 ` Wolfgang Denk 2009-12-19 7:31 ` Vipin Kumar 0 siblings, 1 reply; 44+ messages in thread From: Wolfgang Denk @ 2009-12-17 23:13 UTC (permalink / raw) To: u-boot Dear Peter Tyser, In message <1261090481.11634.5308.camel@localhost.localdomain> you wrote: > > > > I haven't looked at the code differences between the sp3xx boards, but > > > you might be able to use 1 common board file/header file to support them > > > all. For example, take a look at the M5475AFE_config rule in > > > U-Boot's ./Makefile. Some extra code in the Makefile and some #ifdefs > > > in the sp3xx code might accommodate all 3 boards. > > > > Extra code in the Makefile should not be needed any more. > > To be clear, you still think its a good idea to look into combining the > similar boards, correct? I haven't dealt with the MKCONFIG voodoo, so Yes, of course. > maybe I chose a poor example. Perhaps the CPCI405 and friends is a > better example? Or this: 2485 P1011RDB_config \ 2486 P1011RDB_NAND_config \ 2487 P1011RDB_SDCARD_config \ 2488 P1011RDB_SPIFLASH_config \ 2489 P1020RDB_config \ 2490 P1020RDB_NAND_config \ 2491 P1020RDB_SDCARD_config \ 2492 P1020RDB_SPIFLASH_config \ 2493 P2010RDB_config \ 2494 P2010RDB_NAND_config \ 2495 P2010RDB_SDCARD_config \ 2496 P2010RDB_SPIFLASH_config \ 2497 P2020RDB_config \ 2498 P2020RDB_NAND_config \ 2499 P2020RDB_SDCARD_config \ 2500 P2020RDB_SPIFLASH_config: unconfig 2501 @$(MKCONFIG) -t $(@:_config=) P1_P2_RDB ppc mpc85xx p1_p2_rdb freescale No scripting any more in the Makefile :-) Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de Vulcans worship peace above all. -- McCoy, "Return to Tomorrow", stardate 4768.3 ^ permalink raw reply [flat|nested] 44+ messages in thread
* [U-Boot] [PATCH 5/9] SPEAr600 SoC support added 2009-12-17 23:13 ` Wolfgang Denk @ 2009-12-19 7:31 ` Vipin Kumar 0 siblings, 0 replies; 44+ messages in thread From: Vipin Kumar @ 2009-12-19 7:31 UTC (permalink / raw) To: u-boot Dear Wolfgang, > In message <1261090481.11634.5308.camel@localhost.localdomain> you wrote: >> >> > > I haven't looked at the code differences between the sp3xx boards, but >> > > you might be able to use 1 common board file/header file to support them >> > > all. ?For example, take a look at the M5475AFE_config rule in >> > > U-Boot's ./Makefile. ?Some extra code in the Makefile and some #ifdefs >> > > in the sp3xx code might accommodate all 3 boards. >> > >> > Extra code in the Makefile should not be needed any more. >> >> To be clear, you still think its a good idea to look into combining the >> similar boards, correct? ?I haven't dealt with the MKCONFIG voodoo, so > > Yes, of course. > >> maybe I chose a poor example. ?Perhaps the CPCI405 and friends is a >> better example? > > Or this: > > 2485 P1011RDB_config \ > 2486 P1011RDB_NAND_config \ > 2487 P1011RDB_SDCARD_config \ > 2488 P1011RDB_SPIFLASH_config \ > 2489 P1020RDB_config \ > 2490 P1020RDB_NAND_config \ > 2491 P1020RDB_SDCARD_config \ > 2492 P1020RDB_SPIFLASH_config \ > 2493 P2010RDB_config \ > 2494 P2010RDB_NAND_config \ > 2495 P2010RDB_SDCARD_config \ > 2496 P2010RDB_SPIFLASH_config \ > 2497 P2020RDB_config \ > 2498 P2020RDB_NAND_config \ > 2499 P2020RDB_SDCARD_config \ > 2500 P2020RDB_SPIFLASH_config: ? ? ? unconfig > 2501 ? ? ? ? @$(MKCONFIG) -t $(@:_config=) P1_P2_RDB ppc mpc85xx p1_p2_rdb freescale > > > No scripting any more in the Makefile :-) Ok. Used the above example to combine SPEAr boards Best Regards Vipin ^ permalink raw reply [flat|nested] 44+ messages in thread
* [U-Boot] [PATCH 5/9] SPEAr600 SoC support added 2009-12-16 9:18 ` [U-Boot] [PATCH 5/9] SPEAr600 SoC support added Vipin KUMAR 2009-12-16 9:18 ` [U-Boot] [PATCH 6/9] SPEAr300 " Vipin KUMAR 2009-12-16 17:30 ` [U-Boot] [PATCH 5/9] SPEAr600 " Peter Tyser @ 2009-12-16 23:09 ` Wolfgang Denk 2009-12-19 8:56 ` Vipin Kumar 2 siblings, 1 reply; 44+ messages in thread From: Wolfgang Denk @ 2009-12-16 23:09 UTC (permalink / raw) To: u-boot Dear Vipin KUMAR, In message <1260955110-5656-6-git-send-email-vipin.kumar@st.com> you wrote: > > Signed-off-by: Vipin <vipin.kumar@st.com> ... > +int misc_init_r(void) > +{ > +#if defined(CONFIG_CMD_NET) > + uchar mac_id[6]; > + > + if (!i2c_read_mac(mac_id)) > + eth_setenv_enetaddr("ethaddr", mac_id); > +#endif > + setenv("verify", "n"); NAK. Please do not enforce such a policy on all your users. Let them decide if they want this, or not. ... > +int do_setfreq(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) > +{ > + void (*sram_setfreq) (unsigned int, unsigned int); > + unsigned int frequency; > + > + if (argc != 3) { > + printf("Usage:\n%s\n", cmdtp->usage); > + return 1; > + } > + > + frequency = simple_strtoul(argv[2], NULL, 0); > + > + if (frequency > 333) { > + printf("Frequency is limited to 333MHz\n"); > + return 1; > + } > + sram_setfreq = memcpy((void *)0xD2801000, setfreq, setfreq_sz); > + > + if (!strcmp(argv[1], "ddr")) { > + sram_setfreq(DDR, frequency); > + printf("DDR frequency changed to %u\n", frequency); > + > + } else if (!strcmp(argv[1], "cpu")) { > + sram_setfreq(CPU, frequency); > + printf("CPU frequency changed to %u\n", frequency); > + } else { > + printf("Usage:\n%s\n", cmdtp->usage); > + return 1; > + } > + > + return 0; > +} > + > +U_BOOT_CMD(setfreq, 3, 1, do_setfreq, > + "change ddr/cpu frequency", "device[ddr/cpu] frequency"); > +#endif Do we need a new custom command for this? Either allow setting by environment variable only ("cpuclk" is already used by a number of systems), or use a common command name ("chip_config" was chosen for this after some discussion a while ago). Also, is no further checking needed? Can I set arbitrary frequencies, like 307 for CPU and 277 for DDR? > + if ((buf[0] == 0x55) && (buf[1] == 0xAA)) { > + /* Valid MAC address is saved in I2C EEPROM, > + read the MAC address from the > + EEPROM & update the buffer */ Incorrect multiline comment once more. > + buf[0] = 0x55; > + buf[1] = 0xAA; > + i2c_write(0x50, /* Chip address */ > + 0x0, /* Offset */ > + 1, /* Address length */ > + buf, /* buffer */ > + 2); /* Length */ Argh. Please do not do this. > + buf[0] = 0x44; > + buf[1] = 0x66; > + > + i2c_read(0x50, /* Chip address */ > + 0x0, /* Offset */ > + 1, /* Address length */ > + buf, /* buffer */ > + 2); /* Length */ Ditto. > diff --git a/common/cmd_bdinfo.c b/common/cmd_bdinfo.c > index 11c1547..412cad6 100644 > --- a/common/cmd_bdinfo.c > +++ b/common/cmd_bdinfo.c > @@ -27,6 +27,10 @@ > #include <common.h> > #include <command.h> > > +#if defined(CONFIG_SPEAR600) || defined(CONFIG_SPEAR3XX) > +#include <asm/arch/spr_xloader_table.h> > +#endif > + > DECLARE_GLOBAL_DATA_PTR; > > static void print_num(const char *, ulong); > @@ -339,6 +343,22 @@ int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) > #endif > printf ("baudrate = %d bps\n", bd->bi_baudrate); > > +#if defined(CONFIG_SPEAR600) || defined(CONFIG_SPEAR3XX) > + if (bd->dramfreq == -1) > + printf("DDR Freq = Not Known\n"); > + else > + printf("DDR Freq = %d\n", bd->dramfreq); > + > + if (bd->dramtype == DDRMOBILE) > + printf("DDR Type = MOBILE\n"); > + else if (bd->dramtype == DDR2) > + printf("DDR Type = DDR2\n"); > + else > + printf("DDR Type = Not Known\n"); > + > + printf("Xloader Rev = %s\n", bd->version); > +#endif > + > return 0; > } I don't like such board-specific code in this common file. > diff --git a/include/configs/spear600.h b/include/configs/spear600.h > new file mode 100755 > index 0000000..755114d ... > +/* #define CONFIG_ETHADDR 00:11:22:33:44:55 */ > + > +/* #define CONFIG_NETMASK 255.255.255.0 */ > +/* #define CONFIG_IPADDR 192.168.1.10 */ > +/* #define CONFIG_SERVERIP 192.168.1.1 */ > +/* #define CONFIG_GATEWAYIP 192.168.1.1 */ Please remove. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de "A witty saying proves nothing." - Voltaire ^ permalink raw reply [flat|nested] 44+ messages in thread
* [U-Boot] [PATCH 5/9] SPEAr600 SoC support added 2009-12-16 23:09 ` Wolfgang Denk @ 2009-12-19 8:56 ` Vipin Kumar 0 siblings, 0 replies; 44+ messages in thread From: Vipin Kumar @ 2009-12-19 8:56 UTC (permalink / raw) To: u-boot Dear Wolfgang, > In message <1260955110-5656-6-git-send-email-vipin.kumar@st.com> you wrote: >> >> Signed-off-by: Vipin <vipin.kumar@st.com> > ... >> +int misc_init_r(void) >> +{ >> +#if defined(CONFIG_CMD_NET) >> + ? ? uchar mac_id[6]; >> + >> + ? ? if (!i2c_read_mac(mac_id)) >> + ? ? ? ? ? ? eth_setenv_enetaddr("ethaddr", mac_id); >> +#endif >> + ? ? setenv("verify", "n"); > > NAK. > > Please do not enforce such a policy on all your users. ?Let them > decide if they want this, or not. > > ... Source modified to if (ethaddr from environment fails) read mac from i2c memory This should be ok. Right >> +int do_setfreq(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) >> +{ >> + ? ? void (*sram_setfreq) (unsigned int, unsigned int); >> + ? ? unsigned int frequency; >> + >> + ? ? if (argc != 3) { >> + ? ? ? ? ? ? printf("Usage:\n%s\n", cmdtp->usage); >> + ? ? ? ? ? ? return 1; >> + ? ? } >> + >> + ? ? frequency = simple_strtoul(argv[2], NULL, 0); >> + >> + ? ? if (frequency > 333) { >> + ? ? ? ? ? ? printf("Frequency is limited to 333MHz\n"); >> + ? ? ? ? ? ? return 1; >> + ? ? } >> + ? ? sram_setfreq = memcpy((void *)0xD2801000, setfreq, setfreq_sz); >> + >> + ? ? if (!strcmp(argv[1], "ddr")) { >> + ? ? ? ? ? ? sram_setfreq(DDR, frequency); >> + ? ? ? ? ? ? printf("DDR frequency changed to %u\n", frequency); >> + >> + ? ? } else if (!strcmp(argv[1], "cpu")) { >> + ? ? ? ? ? ? sram_setfreq(CPU, frequency); >> + ? ? ? ? ? ? printf("CPU frequency changed to %u\n", frequency); >> + ? ? } else { >> + ? ? ? ? ? ? printf("Usage:\n%s\n", cmdtp->usage); >> + ? ? ? ? ? ? return 1; >> + ? ? } >> + >> + ? ? return 0; >> +} >> + >> +U_BOOT_CMD(setfreq, 3, 1, do_setfreq, >> + ? ? ? ?"change ddr/cpu frequency", "device[ddr/cpu] frequency"); >> +#endif > > Do we need a new custom command for this? Either allow setting by > environment variable only ("cpuclk" is already used by a number of > systems), or use a common command name ("chip_config" was chosen for > this after some discussion a while ago). > Code modified to use chip_config. this command is implemented in board specific file. I guess that should be ok since there is no standard interface for the command > Also, is no further checking needed? Can I set arbitrary frequencies, > like 307 for CPU and 277 for DDR? > Yes, all values below 333 are acceptable. This command is added for testing purposes only so no further checking is required >> + ? ? if ((buf[0] == 0x55) && (buf[1] == 0xAA)) { >> + ? ? ? ? ? ? /* Valid MAC address is saved in I2C EEPROM, >> + ? ? ? ? ? ? ? ?read the MAC address from the >> + ? ? ? ? ? ? ? ?EEPROM & update the buffer */ > > Incorrect multiline comment once more. Corrected multiline comments globally > >> + ? ? buf[0] = 0x55; >> + ? ? buf[1] = 0xAA; >> + ? ? i2c_write(0x50, ? ? ? ? /* Chip address */ >> + ? ? ? ? ? ? ? 0x0, ? ? ? ? ?/* Offset */ >> + ? ? ? ? ? ? ? 1, ? ? ? ? ? ?/* Address length */ >> + ? ? ? ? ? ? ? buf, ? ? ? ? ?/* buffer */ >> + ? ? ? ? ? ? ? 2); ? ? ? ? ? /* Length */ > > Argh. Please do not do this. Ok, modified to single line function call >> + ? ? buf[0] = 0x44; >> + ? ? buf[1] = 0x66; >> + >> + ? ? i2c_read(0x50, ? ? ? ? ?/* Chip address */ >> + ? ? ? ? ? ? ?0x0, ? ? ? ? ? /* Offset */ >> + ? ? ? ? ? ? ?1, ? ? ? ? ? ? /* Address length */ >> + ? ? ? ? ? ? ?buf, ? ? ? ? ? /* buffer */ >> + ? ? ? ? ? ? ?2); ? ? ? ? ? ?/* Length */ > Ok, modified to single line function call >> diff --git a/common/cmd_bdinfo.c b/common/cmd_bdinfo.c >> index 11c1547..412cad6 100644 >> --- a/common/cmd_bdinfo.c >> +++ b/common/cmd_bdinfo.c >> @@ -27,6 +27,10 @@ >> ?#include <common.h> >> ?#include <command.h> >> >> +#if defined(CONFIG_SPEAR600) || defined(CONFIG_SPEAR3XX) >> +#include <asm/arch/spr_xloader_table.h> >> +#endif >> + >> ?DECLARE_GLOBAL_DATA_PTR; >> >> ?static void print_num(const char *, ulong); >> @@ -339,6 +343,22 @@ int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) >> ?#endif >> ? ? ? printf ("baudrate ? ?= %d bps\n", bd->bi_baudrate); >> >> +#if defined(CONFIG_SPEAR600) || defined(CONFIG_SPEAR3XX) >> + ? ? if (bd->dramfreq == -1) >> + ? ? ? ? ? ? printf("DDR Freq ? ?= Not Known\n"); >> + ? ? else >> + ? ? ? ? ? ? printf("DDR Freq ? ?= %d\n", bd->dramfreq); >> + >> + ? ? if (bd->dramtype == DDRMOBILE) >> + ? ? ? ? ? ? printf("DDR Type ? ?= MOBILE\n"); >> + ? ? else if (bd->dramtype == DDR2) >> + ? ? ? ? ? ? printf("DDR Type ? ?= DDR2\n"); >> + ? ? else >> + ? ? ? ? ? ? printf("DDR Type ? ?= Not Known\n"); >> + >> + ? ? printf("Xloader Rev = %s\n", bd->version); >> +#endif >> + >> ? ? ? return 0; >> ?} > > I don't like such board-specific code in this common file. Ok. But then bdinfo should ideally contain a generic callback to be implemented by board specific code. >> diff --git a/include/configs/spear600.h b/include/configs/spear600.h >> new file mode 100755 >> index 0000000..755114d > ... >> +/* #define CONFIG_ETHADDR ? ? ? ? ? ? ? ? ? ?00:11:22:33:44:55 */ >> + >> +/* #define CONFIG_NETMASK ? ? ? ? ? ? ? ? ? ?255.255.255.0 */ >> +/* #define CONFIG_IPADDR ? ? ? ? ? ? ? ? ? ? 192.168.1.10 */ >> +/* #define CONFIG_SERVERIP ? ? ? ? ? ? ? ? ? 192.168.1.1 */ >> +/* #define CONFIG_GATEWAYIP ? ? ? ? ? ? ? ? ?192.168.1.1 */ > > Please remove. Ok.removed commented code Regards Vipin ^ permalink raw reply [flat|nested] 44+ messages in thread
* [U-Boot] [PATCH 4/9] usbd driver and usb boot firmware support for SPEAr SoCs 2009-12-16 9:18 ` [U-Boot] [PATCH 4/9] usbd driver and usb boot firmware " Vipin KUMAR 2009-12-16 9:18 ` [U-Boot] [PATCH 5/9] SPEAr600 SoC support added Vipin KUMAR @ 2009-12-16 22:56 ` Wolfgang Denk 2009-12-19 7:02 ` Vipin Kumar 1 sibling, 1 reply; 44+ messages in thread From: Wolfgang Denk @ 2009-12-16 22:56 UTC (permalink / raw) To: u-boot Dear Vipin KUMAR, In message <1260955110-5656-5-git-send-email-vipin.kumar@st.com> you wrote: > > Signed-off-by: Vipin <vipin.kumar@st.com> > --- > common/main.c | 2 + > drivers/serial/usbtty.h | 2 + > drivers/usb/gadget/Makefile | 1 + > drivers/usb/gadget/spr_udc.c | 996 +++++++++++++++++++++++++++++++++ > include/asm-arm/arch-spear/spr_misc.h | 126 +++++ > include/usb/spr_udc.h | 227 ++++++++ > 6 files changed, 1354 insertions(+), 0 deletions(-) > mode change 100644 => 100755 drivers/serial/usbtty.h > mode change 100644 => 100755 drivers/usb/gadget/Makefile > create mode 100755 drivers/usb/gadget/spr_udc.c > create mode 100644 include/asm-arm/arch-spear/spr_misc.h > create mode 100755 include/usb/spr_udc.h Please split into two patches: one with generic usbd driver, and the second adding support for SPEAr. > diff --git a/common/main.c b/common/main.c > index 10d8904..79f3018 100644 > --- a/common/main.c > +++ b/common/main.c > @@ -397,6 +397,7 @@ void main_loop (void) > > debug ("### main_loop: bootcmd=\"%s\"\n", s ? s : "<UNDEFINED>"); > > +#if !defined(CONFIG_SPEAR_USBTTY) > if (bootdelay >= 0 && s && !abortboot (bootdelay)) { > # ifdef CONFIG_AUTOBOOT_KEYED > int prev = disable_ctrlc(1); /* disable Control C checking */ > @@ -413,6 +414,7 @@ void main_loop (void) > disable_ctrlc(prev); /* restore Control C checking */ > # endif > } > +# endif Why would this be needed? > diff --git a/drivers/usb/gadget/spr_udc.c b/drivers/usb/gadget/spr_udc.c > new file mode 100755 > index 0000000..5b135c7 > --- /dev/null > +++ b/drivers/usb/gadget/spr_udc.c ... > +/* Some kind of debugging output... */ > +#if 1 > +#define UDCDBG(str) > +#define UDCDBGA(fmt, args...) > +#else > +#define UDCDBG(str) serial_printf(str "\n") > +#define UDCDBGA(fmt, args...) serial_printf(fmt "\n", ##args) > +#endif This looks wrong. Should that be a "#ifndef DEBUG" instead of "#if 1"? And cannot we use standard debug facilities? > +static struct udc_endp_regs *const outep_regs_p = > + &((struct udc_regs *const)CONFIG_SYS_USBD_BASE)->out_regs[0]; > +static struct udc_endp_regs *const inep_regs_p = > + &((struct udc_regs *const)CONFIG_SYS_USBD_BASE)->in_regs[0]; > + > +/* > + * udc_state_transition - Write the next packet to TxFIFO. > + * @initial: Initial state. > + * @final: Final state. > + * > + * Helper function to implement device state changes. The device states and > + * the events that transition between them are: > + * > + * STATE_ATTACHED > + * || /\ > + * \/ || > + * DEVICE_HUB_CONFIGURED DEVICE_HUB_RESET > + * || /\ > + * \/ || > + * STATE_POWERED > + * || /\ > + * \/ || > + * DEVICE_RESET DEVICE_POWER_INTERRUPTION > + * || /\ > + * \/ || > + * STATE_DEFAULT > + * || /\ > + * \/ || > + * DEVICE_ADDRESS_ASSIGNED DEVICE_RESET > + * || /\ > + * \/ || > + * STATE_ADDRESSED > + * || /\ > + * \/ || > + * DEVICE_CONFIGURED DEVICE_DE_CONFIGURED > + * || /\ > + * \/ || > + * STATE_CONFIGURED > + * > + * udc_state_transition transitions up (in the direction from STATE_ATTACHED > + * to STATE_CONFIGURED) from the specified initial state to the specified final > + * state, passing through each intermediate state on the way. If the initial > + * state is at or above (i.e. nearer to STATE_CONFIGURED) the final state, then > + * no state transitions will take place. > + * > + * udc_state_transition also transitions down (in the direction from > + * STATE_CONFIGURED to STATE_ATTACHED) from the specified initial state to the > + * specified final state, passing through each intermediate state on the way. > + * If the initial state is at or below (i.e. nearer to STATE_ATTACHED) the final > + * state, then no state transitions will take place. > + * > + * This function must only be called with interrupts disabled. > + */ > +static void udc_state_transition(usb_device_state_t initial, > + usb_device_state_t final) ... > +/* Stall endpoint */ > +static void udc_stall_ep(u32 ep_num) ... > +static void *get_fifo(int ep_num, int in) ... > +static short usbgetpckfromfifo(int epNum, u8 *bufp, u32 len) ... > +static void usbputpcktofifo(int epNum, u8 *bufp, u32 len) ... So far this code looks pretty generic to me. > +/* > + * spear_write_noniso_tx_fifo - Write the next packet to TxFIFO. > + * @endpoint: Endpoint pointer. > + * > + * If the endpoint has an active tx_urb, then the next packet of data from the > + * URB is written to the tx FIFO. The total amount of data in the urb is given > + * by urb->actual_length. The maximum amount of data that can be sent in any > + * one packet is given by endpoint->tx_packetSize. The number of data bytes > + * from this URB that have already been transmitted is given by endpoint->sent. > + * endpoint->last is updated by this routine with the number of data bytes > + * transmitted in this packet. > + * > + */ > +static void spear_write_noniso_tx_fifo(struct usb_endpoint_instance > + *endpoint) Now her eit becomes clearly SPEAr-specific. Should this not be split into separate source files to allow reuse of the common code by other processors? > + > + /* This ensures that USBD packet fifo is accessed > + :- through word aligned pointer or > + :- through non word aligned pointer but only with a > + max length to make the next packet word aligned */ Incorrect multiline comment style. Too long lines. > + /* This rx interrupt must be for a control write data > + * stage packet. > + * > + * We don't support control write data stages. > + * We should never end up here. > + */ Incorrect multiline comment style. Please fix globally. > +struct misc_regs { ... > + u32 BIST5_RSLT_REG; /* 0x118 */ > + u32 SYST_ERROR_REG; /* 0x11C */ ... > + u32 RAS_GPP1_IN; /* 0x8000 */ Variable names must be lower case. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de "Now here's something you're really going to like!" - Rocket J. Squirrel ^ permalink raw reply [flat|nested] 44+ messages in thread
* [U-Boot] [PATCH 4/9] usbd driver and usb boot firmware support for SPEAr SoCs 2009-12-16 22:56 ` [U-Boot] [PATCH 4/9] usbd driver and usb boot firmware support for SPEAr SoCs Wolfgang Denk @ 2009-12-19 7:02 ` Vipin Kumar 2009-12-19 7:24 ` Wolfgang Denk 0 siblings, 1 reply; 44+ messages in thread From: Vipin Kumar @ 2009-12-19 7:02 UTC (permalink / raw) To: u-boot Dear Wolfgang, >> >> Signed-off-by: Vipin <vipin.kumar@st.com> >> --- >> ?common/main.c ? ? ? ? ? ? ? ? ? ? ? ? | ? ?2 + >> ?drivers/serial/usbtty.h ? ? ? ? ? ? ? | ? ?2 + >> ?drivers/usb/gadget/Makefile ? ? ? ? ? | ? ?1 + >> ?drivers/usb/gadget/spr_udc.c ? ? ? ? ?| ?996 +++++++++++++++++++++++++++++++++ >> ?include/asm-arm/arch-spear/spr_misc.h | ?126 +++++ >> ?include/usb/spr_udc.h ? ? ? ? ? ? ? ? | ?227 ++++++++ >> ?6 files changed, 1354 insertions(+), 0 deletions(-) >> ?mode change 100644 => 100755 drivers/serial/usbtty.h >> ?mode change 100644 => 100755 drivers/usb/gadget/Makefile >> ?create mode 100755 drivers/usb/gadget/spr_udc.c >> ?create mode 100644 include/asm-arm/arch-spear/spr_misc.h >> ?create mode 100755 include/usb/spr_udc.h > > Please split into two patches: one with generic usbd driver, and the > second adding support for SPEAr. > Ok. Accepted. patch-set v2 would contain the changes >> diff --git a/common/main.c b/common/main.c >> index 10d8904..79f3018 100644 >> --- a/common/main.c >> +++ b/common/main.c >> @@ -397,6 +397,7 @@ void main_loop (void) >> >> ? ? ? debug ("### main_loop: bootcmd=\"%s\"\n", s ? s : "<UNDEFINED>"); >> >> +#if !defined(CONFIG_SPEAR_USBTTY) >> ? ? ? if (bootdelay >= 0 && s && !abortboot (bootdelay)) { >> ?# ifdef CONFIG_AUTOBOOT_KEYED >> ? ? ? ? ? ? ? int prev = disable_ctrlc(1); ? ?/* disable Control C checking */ >> @@ -413,6 +414,7 @@ void main_loop (void) >> ? ? ? ? ? ? ? disable_ctrlc(prev); ? ?/* restore Control C checking */ >> ?# endif >> ? ? ? } >> +# endif > > Why would this be needed? We also use u-boot as a firmware which runs on the board in a special mode in which the firmware fetches and burns images into NOR/NAND flashes. Under this mode, we would like to always jump to u-boot prompt. Also, the bootdelay variable should remain unchanged as we save default environment variables as well. > > >> diff --git a/drivers/usb/gadget/spr_udc.c b/drivers/usb/gadget/spr_udc.c >> new file mode 100755 >> index 0000000..5b135c7 >> --- /dev/null >> +++ b/drivers/usb/gadget/spr_udc.c > ... >> +/* Some kind of debugging output... */ >> +#if 1 >> +#define UDCDBG(str) >> +#define UDCDBGA(fmt, args...) >> +#else >> +#define UDCDBG(str) serial_printf(str "\n") >> +#define UDCDBGA(fmt, args...) serial_printf(fmt "\n", ##args) >> +#endif > > This looks wrong. Should that be a "#ifndef DEBUG" instead of "#if 1"? > > And cannot we use standard debug facilities? > Ok, changed to #ifndef DEBUG The standard debug facilities use printf and we also test and use this for usbtty feature. So, a serial_printf is required >> +static struct udc_endp_regs *const outep_regs_p = >> + ? ? ? ? ? ? &((struct udc_regs *const)CONFIG_SYS_USBD_BASE)->out_regs[0]; >> +static struct udc_endp_regs *const inep_regs_p = >> + ? ? ? ? ? ? &((struct udc_regs *const)CONFIG_SYS_USBD_BASE)->in_regs[0]; >> + >> +/* >> + * udc_state_transition - Write the next packet to TxFIFO. >> + * @initial: Initial state. >> + * @final: ? Final state. >> + * >> + * Helper function to implement device state changes. The device states and >> + * the events that transition between them are: >> + * >> + * ? ? ? ? ? ? ? ? ? ? ? ? ? STATE_ATTACHED >> + * ? ? ? ? ? ? ? ? ? ? ? ? ? || ? ? ?/\ >> + * ? ? ? ? ? ? ? ? ? ? ? ? ? \/ ? ? ?|| >> + * ? DEVICE_HUB_CONFIGURED ? ? ? ? ? ? ? ? ? DEVICE_HUB_RESET >> + * ? ? ? ? ? ? ? ? ? ? ? ? ? || ? ? ?/\ >> + * ? ? ? ? ? ? ? ? ? ? ? ? ? \/ ? ? ?|| >> + * ? ? ? ? ? ? ? ? ? ? ? ? ? STATE_POWERED >> + * ? ? ? ? ? ? ? ? ? ? ? ? ? || ? ? ?/\ >> + * ? ? ? ? ? ? ? ? ? ? ? ? ? \/ ? ? ?|| >> + * ? DEVICE_RESET ? ? ? ? ? ? ? ? ? ? ? ? ? ?DEVICE_POWER_INTERRUPTION >> + * ? ? ? ? ? ? ? ? ? ? ? ? ? || ? ? ?/\ >> + * ? ? ? ? ? ? ? ? ? ? ? ? ? \/ ? ? ?|| >> + * ? ? ? ? ? ? ? ? ? ? ? ? ? STATE_DEFAULT >> + * ? ? ? ? ? ? ? ? ? ? ? ? ? || ? ? ?/\ >> + * ? ? ? ? ? ? ? ? ? ? ? ? ? \/ ? ? ?|| >> + * ? DEVICE_ADDRESS_ASSIGNED ? ? ? ? ? ? ? ? DEVICE_RESET >> + * ? ? ? ? ? ? ? ? ? ? ? ? ? || ? ? ?/\ >> + * ? ? ? ? ? ? ? ? ? ? ? ? ? \/ ? ? ?|| >> + * ? ? ? ? ? ? ? ? ? ? ? ? ? STATE_ADDRESSED >> + * ? ? ? ? ? ? ? ? ? ? ? ? ? || ? ? ?/\ >> + * ? ? ? ? ? ? ? ? ? ? ? ? ? \/ ? ? ?|| >> + * ? DEVICE_CONFIGURED ? ? ? ? ? ? ? ? ? ? ? DEVICE_DE_CONFIGURED >> + * ? ? ? ? ? ? ? ? ? ? ? ? ? || ? ? ?/\ >> + * ? ? ? ? ? ? ? ? ? ? ? ? ? \/ ? ? ?|| >> + * ? ? ? ? ? ? ? ? ? ? ? ? ? STATE_CONFIGURED >> + * >> + * udc_state_transition transitions up (in the direction from STATE_ATTACHED >> + * to STATE_CONFIGURED) from the specified initial state to the specified final >> + * state, passing through each intermediate state on the way. If the initial >> + * state is at or above (i.e. nearer to STATE_CONFIGURED) the final state, then >> + * no state transitions will take place. >> + * >> + * udc_state_transition also transitions down (in the direction from >> + * STATE_CONFIGURED to STATE_ATTACHED) from the specified initial state to the >> + * specified final state, passing through each intermediate state on the way. >> + * If the initial state is at or below (i.e. nearer to STATE_ATTACHED) the final >> + * state, then no state transitions will take place. >> + * >> + * This function must only be called with interrupts disabled. >> + */ >> +static void udc_state_transition(usb_device_state_t initial, >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?usb_device_state_t final) > ... >> +/* Stall endpoint */ >> +static void udc_stall_ep(u32 ep_num) > ... >> +static void *get_fifo(int ep_num, int in) > ... >> +static short usbgetpckfromfifo(int epNum, u8 *bufp, u32 len) > ... >> +static void usbputpcktofifo(int epNum, u8 *bufp, u32 len) > ... > > So far this code looks pretty generic to me. No, this code is not generic. >> +/* >> + * spear_write_noniso_tx_fifo - Write the next packet to TxFIFO. >> + * @endpoint: ? ? ? ? ? ? ? ?Endpoint pointer. >> + * >> + * If the endpoint has an active tx_urb, then the next packet of data from the >> + * URB is written to the tx FIFO. ?The total amount of data in the urb is given >> + * by urb->actual_length. ?The maximum amount of data that can be sent in any >> + * one packet is given by endpoint->tx_packetSize. ?The number of data bytes >> + * from this URB that have already been transmitted is given by endpoint->sent. >> + * endpoint->last is updated by this routine with the number of data bytes >> + * transmitted in this packet. >> + * >> + */ >> +static void spear_write_noniso_tx_fifo(struct usb_endpoint_instance >> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?*endpoint) > > Now her eit becomes clearly SPEAr-specific. Should this not be split > into separate source files to allow reuse of the common code by other > processors? > Again, all the code is spear specific. Probably, only the unction names are confusing >> + >> + ? ? ? ? ? ? ? ? ? ? /* This ensures that USBD packet fifo is accessed >> + ? ? ? ? ? ? ? ? ? ? ? ?:- through word aligned pointer or >> + ? ? ? ? ? ? ? ? ? ? ? ?:- through non word aligned pointer but only with a >> + ? ? ? ? ? ? ? ? ? ? ? ?max length to make the next packet word aligned */ > > Incorrect multiline comment style. > Ok. Corrected globally > Too long lines. > I assume line length of 80 is acceptable. Right? >> + ? ? ? ? ? ? /* This rx interrupt must be for a control write data >> + ? ? ? ? ? ? ?* stage packet. >> + ? ? ? ? ? ? ?* >> + ? ? ? ? ? ? ?* We don't support control write data stages. >> + ? ? ? ? ? ? ?* We should never end up here. >> + ? ? ? ? ? ? ?*/ > > Incorrect multiline comment style. Please fix globally. Ok. Corrected globally > >> +struct misc_regs { > ... >> + ? ? u32 BIST5_RSLT_REG; ? ? ? ? ? ? /* 0x118 */ >> + ? ? u32 SYST_ERROR_REG; ? ? ? ? ? ? /* 0x11C */ > ... >> + ? ? u32 RAS_GPP1_IN; ? ? ? ? ? ? ? ?/* 0x8000 */ > > Variable names must be lower case. > Ok. Corrected globally Best Reagrds Vipin Kumar ^ permalink raw reply [flat|nested] 44+ messages in thread
* [U-Boot] [PATCH 4/9] usbd driver and usb boot firmware support for SPEAr SoCs 2009-12-19 7:02 ` Vipin Kumar @ 2009-12-19 7:24 ` Wolfgang Denk 2009-12-19 8:46 ` Vipin Kumar 0 siblings, 1 reply; 44+ messages in thread From: Wolfgang Denk @ 2009-12-19 7:24 UTC (permalink / raw) To: u-boot Dear Vipin Kumar, In message <83d1d72b0912182302m68e7ba06q5e23a695f85534f@mail.gmail.com> you wrote: > > >> --- a/common/main.c > >> +++ b/common/main.c > >> @@ -397,6 +397,7 @@ void main_loop (void) > >> > >> debug ("### main_loop: bootcmd=\"%s\"\n", s ? s : "<UNDEFI> NED>"); > >> > >> +#if !defined(CONFIG_SPEAR_USBTTY) > >> if (bootdelay >= 0 && s && !abortboot (bootdelay)) { > >> # ifdef CONFIG_AUTOBOOT_KEYED > >> int prev = disable_ctrlc(1); /* dis> able Control C checking */ > >> @@ -413,6 +414,7 @@ void main_loop (void) > >> disable_ctrlc(prev); /* restore Contr> ol C checking */ > >> # endif > >> } > >> +# endif > > > > Why would this be needed? > > We also use u-boot as a firmware which runs on the board in a special > mode in which the firmware fetches and burns images into > NOR/NAND flashes. Under this mode, we would like to always jump to > u-boot prompt. This can be done by plain config settings. No need to chang ethe code. > Also, the bootdelay variable should remain unchanged as we save default > environment variables as well. Think of a different way to switch modes, please. I don't accept this change to common code. > > Too long lines. > > I assume line length of 80 is acceptable. Right? Maximum, right. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de What is mind? No matter. What is matter? Never mind. -- Thomas Hewitt Key, 1799-1875 ^ permalink raw reply [flat|nested] 44+ messages in thread
* [U-Boot] [PATCH 4/9] usbd driver and usb boot firmware support for SPEAr SoCs 2009-12-19 7:24 ` Wolfgang Denk @ 2009-12-19 8:46 ` Vipin Kumar 0 siblings, 0 replies; 44+ messages in thread From: Vipin Kumar @ 2009-12-19 8:46 UTC (permalink / raw) To: u-boot Dear Wolfgang, > In message <83d1d72b0912182302m68e7ba06q5e23a695f85534f@mail.gmail.com> you wrote: >> >> >> --- a/common/main.c >> >> +++ b/common/main.c >> >> @@ -397,6 +397,7 @@ void main_loop (void) >> >> >> >> ? ? ? debug ("### main_loop: bootcmd=\"%s\"\n", s ? s : "<UNDEFI> NED>"); >> >> >> >> +#if !defined(CONFIG_SPEAR_USBTTY) >> >> ? ? ? if (bootdelay >= 0 && s && !abortboot (bootdelay)) { >> >> ?# ifdef CONFIG_AUTOBOOT_KEYED >> >> ? ? ? ? ? ? ? int prev = disable_ctrlc(1); ? ?/* dis> able Control C checking */ >> >> @@ -413,6 +414,7 @@ void main_loop (void) >> >> ? ? ? ? ? ? ? disable_ctrlc(prev); ? ?/* restore Contr> ol C checking */ >> >> ?# endif >> >> ? ? ? } >> >> +# endif >> > >> > Why would this be needed? >> >> We also use u-boot as a firmware which runs on the board in a special >> mode in which the firmware fetches and burns images into >> NOR/NAND flashes. Under this mode, we would like to always jump to >> u-boot prompt. > > This can be done by plain config settings. No need to chang ethe code. I didn't get this. I want the uboot behavior as if bootdelay is set to -1. And offcourse without changing bootdelay. I could not get if this can be done by any plain config setting Please let me know if I am missing something > >> Also, the bootdelay variable should remain unchanged as we save default >> environment variables as well. > > Think of a different way to switch modes, please. I don't accept this > change to common code. > Regards Vipin ^ permalink raw reply [flat|nested] 44+ messages in thread
* [U-Boot] [PATCH 3/9] nand driver support for SPEAr SoCs 2009-12-16 9:18 ` [U-Boot] [PATCH 3/9] nand " Vipin KUMAR 2009-12-16 9:18 ` [U-Boot] [PATCH 4/9] usbd driver and usb boot firmware " Vipin KUMAR @ 2010-01-04 23:06 ` Scott Wood 2010-01-05 3:53 ` Vipin KUMAR 1 sibling, 1 reply; 44+ messages in thread From: Scott Wood @ 2010-01-04 23:06 UTC (permalink / raw) To: u-boot On Wed, Dec 16, 2009 at 02:48:24PM +0530, Vipin KUMAR wrote: > > Signed-off-by: Vipin <vipin.kumar@st.com> Acked-by: Scott Wood <scottwood@freescale.com> Some of the whitespace is a bit inconsistent, though: > +int spear_nand_init(struct nand_chip *nand) > +{ > + writel(FSMC_DEVWID_8 | FSMC_DEVTYPE_NAND | FSMC_ENABLE | FSMC_WAITON, > + &fsmc_regs_p->genmemctrl_pc); > + writel(readl(&fsmc_regs_p->genmemctrl_pc) | FSMC_TCLR_1 | FSMC_TAR_1, > + &fsmc_regs_p->genmemctrl_pc); Here you continue with two tabs... > + writel(FSMC_THIZ_1 | FSMC_THOLD_4 | FSMC_TWAIT_6 | FSMC_TSET_0, > + &fsmc_regs_p->genmemctrl_comm); > + writel(FSMC_THIZ_1 | FSMC_THOLD_4 | FSMC_TWAIT_6 | FSMC_TSET_0, > + &fsmc_regs_p->genmemctrl_attrib); ...and here with one tab plus 7 spaces. > + nand->ecc.layout = &spear_nand_ecclayout; There's an extra space before '=' here. -Scott ^ permalink raw reply [flat|nested] 44+ messages in thread
* [U-Boot] [PATCH 3/9] nand driver support for SPEAr SoCs 2010-01-04 23:06 ` [U-Boot] [PATCH 3/9] nand driver " Scott Wood @ 2010-01-05 3:53 ` Vipin KUMAR 0 siblings, 0 replies; 44+ messages in thread From: Vipin KUMAR @ 2010-01-05 3:53 UTC (permalink / raw) To: u-boot Hello Scott, > > Acked-by: Scott Wood <scottwood@freescale.com> > > Some of the whitespace is a bit inconsistent, though: > > > +int spear_nand_init(struct nand_chip *nand) > > +{ > > + writel(FSMC_DEVWID_8 | FSMC_DEVTYPE_NAND | FSMC_ENABLE | > FSMC_WAITON, > > + &fsmc_regs_p->genmemctrl_pc); > > + writel(readl(&fsmc_regs_p->genmemctrl_pc) | FSMC_TCLR_1 | > FSMC_TAR_1, > > + &fsmc_regs_p->genmemctrl_pc); > > Here you continue with two tabs... > Thanks for pointing out. I would correct this in next revision of patch-set > > + writel(FSMC_THIZ_1 | FSMC_THOLD_4 | FSMC_TWAIT_6 | FSMC_TSET_0, > > + &fsmc_regs_p->genmemctrl_comm); > > + writel(FSMC_THIZ_1 | FSMC_THOLD_4 | FSMC_TWAIT_6 | FSMC_TSET_0, > > + &fsmc_regs_p->genmemctrl_attrib); > > ...and here with one tab plus 7 spaces. > > > + nand->ecc.layout = &spear_nand_ecclayout; > > There's an extra space before '=' here. > Corrected. Thanks for reviewing Best Regards Vipin ^ permalink raw reply [flat|nested] 44+ messages in thread
* [U-Boot] [PATCH 2/9] smi driver support for SPEAr SoCs 2009-12-16 9:18 ` [U-Boot] [PATCH 2/9] smi " Vipin KUMAR 2009-12-16 9:18 ` [U-Boot] [PATCH 3/9] nand " Vipin KUMAR @ 2009-12-16 22:44 ` Wolfgang Denk 2009-12-19 6:44 ` Vipin Kumar 1 sibling, 1 reply; 44+ messages in thread From: Wolfgang Denk @ 2009-12-16 22:44 UTC (permalink / raw) To: u-boot Dear Vipin KUMAR, In message <1260955110-5656-3-git-send-email-vipin.kumar@st.com> you wrote: > > Signed-off-by: Vipin <vipin.kumar@st.com> ... > +static ulong flash_get_size(ulong base, int banknum) > +{ > + flash_info_t *info = &flash_info[banknum]; > + unsigned int value = 0; > + unsigned int density = 0; remove useless initialization. > + int i; > + > + value = smi_read_id(info, banknum); > + density = (value >> 16) & 0xff; > + > + switch (density) { > + case 0x10: > + info->size = 64 * 1024; > + info->sector_count = 2; > + break; > + case 0x11: > + info->size = 128 * 1024; > + info->sector_count = 4; > + break; > + case 0x12: > + info->size = 256 * 1024; > + info->sector_count = 4; > + break; > + case 0x13: > + info->size = 512 * 1024; > + info->sector_count = 8; > + break; > + case 0x14: > + info->size = 1 * 1024 * 1024; > + info->sector_count = 16; > + break; > + case 0x15: > + info->size = 2 * 1024 * 1024; > + info->sector_count = 32; > + break; > + case 0x16: > + info->size = 4 * 1024 * 1024; > + info->sector_count = 64; > + break; > + case 0x17: > + info->size = 8 * 1024 * 1024; > + info->sector_count = 128; > + break; > + case 0x18: > + info->size = 16 * 1024 * 1024; > + info->sector_count = 64; > + break; > + default: > + return 0x0; > + } Consider using lookup tables? > + /* Assume that all sectors are unprotected by default */ > + for (i = 0; i < CONFIG_SYS_MAX_FLASH_SECT; i++) > + info->protect[i] = 0; Um... is this assumption correct? > +static int smi_wait_till_ready(int bank, int timeout) > +{ > + int count; > + int sr; > + > + /* One chip guarantees max 5 msec wait here after page writes, > + but potentially three seconds (!) after page erase. */ > + for (count = 0; count < timeout; count++) { > + sr = smi_read_sr(bank); > + if (sr < 0) > + break; > + else if (!(sr & WIP_BIT)) > + return 0; Use braces here. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de The IQ of the group is the lowest IQ of a member of the group divided by the number of people in the group. ^ permalink raw reply [flat|nested] 44+ messages in thread
* [U-Boot] [PATCH 2/9] smi driver support for SPEAr SoCs 2009-12-16 22:44 ` [U-Boot] [PATCH 2/9] smi " Wolfgang Denk @ 2009-12-19 6:44 ` Vipin Kumar 2009-12-19 7:20 ` Wolfgang Denk 0 siblings, 1 reply; 44+ messages in thread From: Vipin Kumar @ 2009-12-19 6:44 UTC (permalink / raw) To: u-boot Dear Wolfgang, >> Signed-off-by: Vipin <vipin.kumar@st.com> > ... >> +static ulong flash_get_size(ulong base, int banknum) >> +{ >> + ? ? flash_info_t *info = &flash_info[banknum]; >> + ? ? unsigned int value = 0; >> + ? ? unsigned int density = 0; > > remove useless initialization. Ok I will send out a fresh patchset v2 with your review comments incorporated. Please let me know if it is ok >> + ? ? int i; >> + >> + ? ? value = smi_read_id(info, banknum); >> + ? ? density = (value >> 16) & 0xff; >> + >> + ? ? switch (density) { >> + ? ? case 0x10: >> + ? ? ? ? ? ? info->size = 64 * 1024; >> + ? ? ? ? ? ? info->sector_count = 2; >> + ? ? ? ? ? ? break; >> + ? ? case 0x11: >> + ? ? ? ? ? ? info->size = 128 * 1024; >> + ? ? ? ? ? ? info->sector_count = 4; >> + ? ? ? ? ? ? break; >> + ? ? case 0x12: >> + ? ? ? ? ? ? info->size = 256 * 1024; >> + ? ? ? ? ? ? info->sector_count = 4; >> + ? ? ? ? ? ? break; >> + ? ? case 0x13: >> + ? ? ? ? ? ? info->size = 512 * 1024; >> + ? ? ? ? ? ? info->sector_count = 8; >> + ? ? ? ? ? ? break; >> + ? ? case 0x14: >> + ? ? ? ? ? ? info->size = 1 * 1024 * 1024; >> + ? ? ? ? ? ? info->sector_count = 16; >> + ? ? ? ? ? ? break; >> + ? ? case 0x15: >> + ? ? ? ? ? ? info->size = 2 * 1024 * 1024; >> + ? ? ? ? ? ? info->sector_count = 32; >> + ? ? ? ? ? ? break; >> + ? ? case 0x16: >> + ? ? ? ? ? ? info->size = 4 * 1024 * 1024; >> + ? ? ? ? ? ? info->sector_count = 64; >> + ? ? ? ? ? ? break; >> + ? ? case 0x17: >> + ? ? ? ? ? ? info->size = 8 * 1024 * 1024; >> + ? ? ? ? ? ? info->sector_count = 128; >> + ? ? ? ? ? ? break; >> + ? ? case 0x18: >> + ? ? ? ? ? ? info->size = 16 * 1024 * 1024; >> + ? ? ? ? ? ? info->sector_count = 64; >> + ? ? ? ? ? ? break; >> + ? ? default: >> + ? ? ? ? ? ? return 0x0; >> + ? ? } > > Consider using lookup tables? Currently supported flashes have consequent values of density. It may have random values supported in future. That's the reason I feel it's better to keep the code this way >> + ? ? /* Assume that all sectors are unprotected by default */ >> + ? ? for (i = 0; i < CONFIG_SYS_MAX_FLASH_SECT; i++) >> + ? ? ? ? ? ? info->protect[i] = 0; > > Um... is this assumption correct? It is intentional > >> +static int smi_wait_till_ready(int bank, int timeout) >> +{ >> + ? ? int count; >> + ? ? int sr; >> + >> + ? ? /* One chip guarantees max 5 msec wait here after page writes, >> + ? ? ? ?but potentially three seconds (!) after page erase. */ >> + ? ? for (count = 0; count < timeout; count++) { >> + ? ? ? ? ? ? sr = smi_read_sr(bank); >> + ? ? ? ? ? ? if (sr < 0) >> + ? ? ? ? ? ? ? ? ? ? break; >> + ? ? ? ? ? ? else if (!(sr & WIP_BIT)) >> + ? ? ? ? ? ? ? ? ? ? return 0; > > Use braces here. Ok. braces added Best Regards Vipin ^ permalink raw reply [flat|nested] 44+ messages in thread
* [U-Boot] [PATCH 2/9] smi driver support for SPEAr SoCs 2009-12-19 6:44 ` Vipin Kumar @ 2009-12-19 7:20 ` Wolfgang Denk 2009-12-19 7:56 ` Vipin Kumar 0 siblings, 1 reply; 44+ messages in thread From: Wolfgang Denk @ 2009-12-19 7:20 UTC (permalink / raw) To: u-boot Dear Vipin Kumar, In message <83d1d72b0912182244yb303c6ai3b61d7b896020c00@mail.gmail.com> you wrote: > > >> + switch (density) { > >> + case 0x10: > >> + info->size = 64 * 1024; > >> + info->sector_count = 2; > >> + break; > >> + case 0x11: > >> + info->size = 128 * 1024; > >> + info->sector_count = 4; > >> + break; > >> + case 0x12: > >> + info->size = 256 * 1024; > >> + info->sector_count = 4; > >> + break; > >> + case 0x13: > >> + info->size = 512 * 1024; > >> + info->sector_count = 8; > >> + break; > >> + case 0x14: > >> + info->size = 1 * 1024 * 1024; > >> + info->sector_count = 16; > >> + break; > >> + case 0x15: > >> + info->size = 2 * 1024 * 1024; > >> + info->sector_count = 32; > >> + break; > >> + case 0x16: > >> + info->size = 4 * 1024 * 1024; > >> + info->sector_count = 64; > >> + break; > >> + case 0x17: > >> + info->size = 8 * 1024 * 1024; > >> + info->sector_count = 128; > >> + break; > >> + case 0x18: > >> + info->size = 16 * 1024 * 1024; > >> + info->sector_count = 64; > >> + break; > >> + default: > >> + return 0x0; > >> + } > > > > Consider using lookup tables? > > Currently supported flashes have consequent values of density. > It may have random values supported in future. That's the reason > I feel it's better to keep the code this way That's why I did not recommend to calculate this witha simple formula, (which would be trivially possible for "size", but not so for "sector_count"), but using a lookup table - this is independent of the actual values. > >> + /* Assume that all sectors are unprotected by default */ > >> + for (i = 0; i < CONFIG_SYS_MAX_FLASH_SECT; i++) > >> + info->protect[i] = 0; > > > > Um... is this assumption correct? > > It is intentional Why don;t you protect sectors where the U-Bootimage and environment are stored? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de If you fail to plan, plan to fail. ^ permalink raw reply [flat|nested] 44+ messages in thread
* [U-Boot] [PATCH 2/9] smi driver support for SPEAr SoCs 2009-12-19 7:20 ` Wolfgang Denk @ 2009-12-19 7:56 ` Vipin Kumar 2009-12-19 7:59 ` Albert ARIBAUD 2009-12-19 21:37 ` Wolfgang Denk 0 siblings, 2 replies; 44+ messages in thread From: Vipin Kumar @ 2009-12-19 7:56 UTC (permalink / raw) To: u-boot Dear Wolfgang, > In message <83d1d72b0912182244yb303c6ai3b61d7b896020c00@mail.gmail.com> you wrote: >> >> >> + ? ? switch (density) { >> >> + ? ? case 0x10: >> >> + ? ? ? ? ? ? info->size = 64 * 1024; >> >> + ? ? ? ? ? ? info->sector_count = 2; >> >> + ? ? ? ? ? ? break; >> >> + ? ? case 0x11: >> >> + ? ? ? ? ? ? info->size = 128 * 1024; >> >> + ? ? ? ? ? ? info->sector_count = 4; >> >> + ? ? ? ? ? ? break; >> >> + ? ? case 0x12: >> >> + ? ? ? ? ? ? info->size = 256 * 1024; >> >> + ? ? ? ? ? ? info->sector_count = 4; >> >> + ? ? ? ? ? ? break; >> >> + ? ? case 0x13: >> >> + ? ? ? ? ? ? info->size = 512 * 1024; >> >> + ? ? ? ? ? ? info->sector_count = 8; >> >> + ? ? ? ? ? ? break; >> >> + ? ? case 0x14: >> >> + ? ? ? ? ? ? info->size = 1 * 1024 * 1024; >> >> + ? ? ? ? ? ? info->sector_count = 16; >> >> + ? ? ? ? ? ? break; >> >> + ? ? case 0x15: >> >> + ? ? ? ? ? ? info->size = 2 * 1024 * 1024; >> >> + ? ? ? ? ? ? info->sector_count = 32; >> >> + ? ? ? ? ? ? break; >> >> + ? ? case 0x16: >> >> + ? ? ? ? ? ? info->size = 4 * 1024 * 1024; >> >> + ? ? ? ? ? ? info->sector_count = 64; >> >> + ? ? ? ? ? ? break; >> >> + ? ? case 0x17: >> >> + ? ? ? ? ? ? info->size = 8 * 1024 * 1024; >> >> + ? ? ? ? ? ? info->sector_count = 128; >> >> + ? ? ? ? ? ? break; >> >> + ? ? case 0x18: >> >> + ? ? ? ? ? ? info->size = 16 * 1024 * 1024; >> >> + ? ? ? ? ? ? info->sector_count = 64; >> >> + ? ? ? ? ? ? break; >> >> + ? ? default: >> >> + ? ? ? ? ? ? return 0x0; >> >> + ? ? } >> > >> > Consider using lookup tables? >> >> Currently supported flashes have consequent values of density. >> It may have random values supported in future. That's the reason >> I feel it's better to keep the code this way > > That's why I did not recommend to calculate this witha simple > formula, (which would be trivially possible for "size", but not so > for "sector_count"), but using a lookup table - this is independent > of the actual values. Ok. I would implement the code using lookup tables >> >> + ? ? /* Assume that all sectors are unprotected by default */ >> >> + ? ? for (i = 0; i < CONFIG_SYS_MAX_FLASH_SECT; i++) >> >> + ? ? ? ? ? ? info->protect[i] = 0; >> > >> > Um... is this assumption correct? >> >> It is intentional > > Why don;t you protect sectors where the U-Bootimage and environment > are stored? Since the code is being developed for a development board, erasing and flashing the uboot is frequent. This is done only to save unprotect every time before erasing/flashing uboot Best Regards Vipin ^ permalink raw reply [flat|nested] 44+ messages in thread
* [U-Boot] [PATCH 2/9] smi driver support for SPEAr SoCs 2009-12-19 7:56 ` Vipin Kumar @ 2009-12-19 7:59 ` Albert ARIBAUD 2009-12-19 8:28 ` Vipin Kumar 2009-12-19 21:37 ` Wolfgang Denk 1 sibling, 1 reply; 44+ messages in thread From: Albert ARIBAUD @ 2009-12-19 7:59 UTC (permalink / raw) To: u-boot Vipin Kumar a ?crit : >> Why don;t you protect sectors where the U-Bootimage and environment >> are stored? > > Since the code is being developed for a development board, erasing and > flashing the uboot is frequent. This is done only to save unprotect every > time before erasing/flashing uboot You could protect the sectors and then have a script in the default environment that automates unprotecting as well as erasing, loading new u-boot and flashing. This way you get the best of both worlds, protection against accidental erasures and simplicity of reflashing. Amicalement, -- Albert. ^ permalink raw reply [flat|nested] 44+ messages in thread
* [U-Boot] [PATCH 2/9] smi driver support for SPEAr SoCs 2009-12-19 7:59 ` Albert ARIBAUD @ 2009-12-19 8:28 ` Vipin Kumar 0 siblings, 0 replies; 44+ messages in thread From: Vipin Kumar @ 2009-12-19 8:28 UTC (permalink / raw) To: u-boot Hi Albert, > >>> Why don;t you protect sectors where the U-Bootimage and environment >>> are stored? >> >> Since the code is being developed for a development board, erasing and >> flashing the uboot is frequent. This is done only to save unprotect every >> time before erasing/flashing uboot > > You could protect the sectors and then have a script in the default > environment that automates unprotecting as well as erasing, loading new > u-boot and flashing. This way you get the best of both worlds, protection > against accidental erasures and simplicity of reflashing. > Yes, I also tend to think this way is better. Thanks Regards Vipin ^ permalink raw reply [flat|nested] 44+ messages in thread
* [U-Boot] [PATCH 2/9] smi driver support for SPEAr SoCs 2009-12-19 7:56 ` Vipin Kumar 2009-12-19 7:59 ` Albert ARIBAUD @ 2009-12-19 21:37 ` Wolfgang Denk 1 sibling, 0 replies; 44+ messages in thread From: Wolfgang Denk @ 2009-12-19 21:37 UTC (permalink / raw) To: u-boot Dear Vipin Kumar, In message <83d1d72b0912182356u6b140b24g8ee1e97becc6285b@mail.gmail.com> you wrote: > > >> >> + /* Assume that all sectors are unprotected by default */ > >> >> + for (i = 0; i < CONFIG_SYS_MAX_FLASH_SECT; i++) > >> >> + info->protect[i] = 0; > >> > > >> > Um... is this assumption correct? > >> > >> It is intentional > > > > Why don;t you protect sectors where the U-Bootimage and environment > > are stored? > > Since the code is being developed for a development board, erasing and > flashing the uboot is frequent. This is done only to save unprotect every > time before erasing/flashing uboot That's what I expected. Please do add proper protection, so that everybody who copies the code for a real production board has a sane implementation. If you are worried about having to type too many commands for update, please consider pre-defining useful macros like we do in so many other boards; for example: "include/configs/aria.h": "u-boot=aria/u-boot.bin\0" ... "load=tftp ${u-boot_addr_r} ${u-boot}\0" ... "update=protect off ${u-boot_addr} +${filesize};" \ "era ${u-boot_addr} +${filesize};" \ "cp.b ${u-boot_addr_r} ${u-boot_addr} ${filesize}\0" so you only have to type "run load update". Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de "Unix is simple, but it takes a genius to understand the simplicity." - Dennis Ritchie ^ permalink raw reply [flat|nested] 44+ messages in thread
* [U-Boot] [PATCH 1/9] i2c driver support for SPEAr SoCs 2009-12-16 9:18 ` [U-Boot] [PATCH 1/9] i2c driver support " Vipin KUMAR 2009-12-16 9:18 ` [U-Boot] [PATCH 2/9] smi " Vipin KUMAR @ 2009-12-16 22:31 ` Wolfgang Denk 1 sibling, 0 replies; 44+ messages in thread From: Wolfgang Denk @ 2009-12-16 22:31 UTC (permalink / raw) To: u-boot Dear Vipin KUMAR, In message <1260955110-5656-2-git-send-email-vipin.kumar@st.com> you wrote: > > Signed-off-by: Vipin <vipin.kumar@st.com> > --- > drivers/i2c/Makefile | 1 + > drivers/i2c/spr_i2c.c | 321 ++++++++++++++++++++++++++++++++++ > include/asm-arm/arch-spear/spr_i2c.h | 143 +++++++++++++++ > 3 files changed, 465 insertions(+), 0 deletions(-) > mode change 100644 => 100755 drivers/i2c/Makefile > create mode 100755 drivers/i2c/spr_i2c.c > create mode 100755 include/asm-arm/arch-spear/spr_i2c.h Your patch order is, um, sub-optimal. You start adding an I2C driver for a non-existing CPU here. This makes no sense, please reorder. > --- a/drivers/i2c/Makefile > +++ b/drivers/i2c/Makefile > @@ -38,6 +38,7 @@ COBJS-$(CONFIG_DRIVER_S3C24X0_I2C) += s3c24x0_i2c.o > COBJS-$(CONFIG_S3C44B0_I2C) += s3c44b0_i2c.o > COBJS-$(CONFIG_SOFT_I2C) += soft_i2c.o > COBJS-$(CONFIG_TSI108_I2C) += tsi108_i2c.o > +COBJS-$(CONFIG_SPEARI2C) += spr_i2c.o Please keep lists sorted (fix globally). > +/** > + * i2c_setfreq - Set i2c working mode frequency > + * > + * Set i2c working mode frequency > + */ Incorrect multiline comment style. Please fix globally. > +static void set_speed(int i2c_spd) > +{ > + unsigned int cntl; > + > + if (i2c_spd == IC_SPEED_MODE_MAX) { > + cntl = readl(&i2c_regs_p->ic_con); > + cntl |= IC_CON_SPH | IC_CON_SPL; > + writel(cntl, &i2c_regs_p->ic_con); > + i2c_setfreq(MIN_HS_SCL_HIGHTIME, MIN_HS_SCL_LOWTIME); > + } else if (i2c_spd == IC_SPEED_MODE_FAST) { > + cntl = readl(&i2c_regs_p->ic_con); > + cntl |= IC_CON_SPH; > + cntl &= ~IC_CON_SPL; > + writel(cntl, &i2c_regs_p->ic_con); > + i2c_setfreq(MIN_FS_SCL_HIGHTIME, MIN_FS_SCL_LOWTIME); > + } else if (i2c_spd == IC_SPEED_MODE_STANDARD) { > + cntl = readl(&i2c_regs_p->ic_con); > + cntl |= IC_CON_SPF; > + cntl &= ~IC_CON_SPL; > + writel(cntl, &i2c_regs_p->ic_con); > + i2c_setfreq(MIN_SS_SCL_HIGHTIME, MIN_SS_SCL_LOWTIME); > + } It seems you can move the lines writel(cntl, &i2c_regs_p->ic_con); i2c_setfreq(MIN_FS_SCL_HIGHTIME, MIN_FS_SCL_LOWTIME); out of the if/else blocks and make them common code. > +void i2c_set_bus_speed(int speed) > +{ > + if (speed >= I2C_MAX_SPEED) > + set_speed(IC_SPEED_MODE_MAX); > + else > + if (speed >= I2C_FAST_SPEED) Missing braces (mandatory for multiline statements). > + set_speed(IC_SPEED_MODE_FAST); > + else > + set_speed(IC_SPEED_MODE_STANDARD); > +} > +/** > + * i2c_get_bus_speed - Gets the i2c speed > + * > + * Gets the i2c speed. > + */ > +int i2c_get_bus_speed(void) > +{ > + if (((readl(&i2c_regs_p->ic_con) & IC_CON_SPH) == IC_CON_SPH) && > + ((readl(&i2c_regs_p->ic_con) & IC_CON_SPL) == IC_CON_SPL)) { > + return I2C_MAX_SPEED; > + > + } else if (((readl(&i2c_regs_p->ic_con) & IC_CON_SPH) == IC_CON_SPH) && > + ((readl(&i2c_regs_p->ic_con) & IC_CON_SPL) == 0)) { > + return I2C_FAST_SPEED; > + > + } else if (((readl(&i2c_regs_p->ic_con) & IC_CON_SPF) == IC_CON_SPF) && > + ((readl(&i2c_regs_p->ic_con) & IC_CON_SPL) == 0)) { > + return I2C_STANDARD_SPEED; > + } It makes no sense to run "readl(&i2c_regs_p->ic_con)" six times - run it once and latch the value. Also I tend to think the logic can be written clearer. > +void i2c_init(int speed, int slaveadd) > +{ > + unsigned int enbl; > + > + /* Disable i2c */ > + enbl = readl(&i2c_regs_p->ic_enable); > + enbl &= ~IC_ENABLE_0B; > + writel(enbl, &i2c_regs_p->ic_enable); > + > + writel((IC_CON_SD | IC_CON_SPF | IC_CON_MM), &i2c_regs_p->ic_con); > + writel(IC_TL0, &i2c_regs_p->ic_rx_tl); > + writel(IC_TL0, &i2c_regs_p->ic_tx_tl); Is this duplication intentional? If so, a comment is needed to explain why. > +/** > + * i2c_probe - Probe the i2c chip > + * > + * TBD > + */ > +int i2c_probe(uchar chip) > +{ > + return 0; > +} Please do not add dead code. > +int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len) > +{ > + unsigned long start_time_rx; > + > + if (buffer == NULL) { > + printf("I2C read: buffer is invalid\n"); > + return 1; > + } > + > + if (alen > 1) { > + printf("I2C read: addr len %d not supported\n", alen); > + return 1; > + } > + > + if (addr + len > 256) { > + printf("I2C read: address out of range\n"); > + return 1; > + } > + > + if (i2c_wait_for_bb()) > + return 1; Why no error message here? > + i2c_setaddress(chip); > + writel(addr, &i2c_regs_p->ic_cmd_data); > + > + start_time_rx = get_timer_masked(); > + while (len) { > + writel(IC_CMD, &i2c_regs_p->ic_cmd_data); > + if ((readl(&i2c_regs_p->ic_status) & IC_STATUS_RFNE) == > + IC_STATUS_RFNE) { > + *buffer++ = (uchar)readl(&i2c_regs_p->ic_cmd_data); > + len--; > + start_time_rx = get_timer_masked(); > + } else { > + if (get_timer(start_time_rx) > I2C_BYTE_TO) > + return 1; Why no error message here? > + udelay(4000); Why is this needed? > + if ((readl(&i2c_regs_p->ic_raw_intr_stat) & IC_STOP_DET)) > + readl(&i2c_regs_p->ic_clr_stop_det); > + > + if (i2c_wait_for_bb()) > + return 1; Why no error message here? > + i2c_flush_rxfifo(); > + > + return 0; > +} > + > +/** > + * i2c_write - Write to i2c memory > + * @chip: target i2c address > + * @addr: address to read from > + * @alen: > + * @buffer: buffer for read data > + * @len: no of bytes to be read > + * > + * Write to i2c memory. > + */ > +int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len) > +{ > + int nb = len; > + unsigned long start_time_tx; > + > + if (buffer == NULL) { > + printf("I2C write: buffer is invalid\n"); > + return 1; > + } > + > + if (alen > 1) { > + printf("I2C write: addr len %d not supported\n", alen); > + return 1; > + } > + > + if (addr + len > 256) { > + printf("I2C write: address out of range\n"); > + return 1; > + } > + > + if (i2c_wait_for_bb()) > + return 1; > + > + i2c_setaddress(chip); > + > + writel(addr, &i2c_regs_p->ic_cmd_data); > + > + start_time_tx = get_timer_masked(); > + while (len) { > + if ((readl(&i2c_regs_p->ic_status) & IC_STATUS_TFNF) > + == IC_STATUS_TFNF) { > + writel(*buffer, &i2c_regs_p->ic_cmd_data); > + buffer++; > + len--; > + start_time_tx = get_timer_masked(); > + } else { > + if (get_timer(start_time_tx) > (nb * I2C_BYTE_TO)) > + return 1; > + } > + } > + > + udelay(4000); > + if ((readl(&i2c_regs_p->ic_raw_intr_stat) & IC_STOP_DET)) > + readl(&i2c_regs_p->ic_clr_stop_det); > + > + if (i2c_wait_for_bb()) > + return 1; > + > + i2c_flush_rxfifo(); > + > + return 0; > +} This shares a _lot_ of common code with i2c_read() - factor out? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de I have a theory that it's impossible to prove anything, but I can't prove it. ^ permalink raw reply [flat|nested] 44+ messages in thread
* [U-Boot] [PATCH 0/9] Support for SPEAr SoCs 2009-12-16 9:18 [U-Boot] [PATCH 0/9] Support for SPEAr SoCs Vipin KUMAR 2009-12-16 9:18 ` [U-Boot] [PATCH 1/9] i2c driver support " Vipin KUMAR @ 2009-12-16 16:49 ` Armando VISCONTI 1 sibling, 0 replies; 44+ messages in thread From: Armando VISCONTI @ 2009-12-16 16:49 UTC (permalink / raw) To: u-boot All, Just fyi SPEAr is an ARM based family of SoC designed by us here in STMicro. THx for your help in reviewing. Regards, Arm Vipin KUMAR wrote: > This patchset contains the support for 4 SoCs from SPEAr family > SPEAr300 > SPEAr310 > SPEAr320 > SPEAr600 > > It also contains the drivers needed for spear devices > > Regards > Vipin Kumar > > Vipin (9): > i2c driver support for SPEAr SoCs > smi driver support for SPEAr SoCs > nand driver support for SPEAr SoCs > usbd driver and usb boot firmware support for SPEAr SoCs > SPEAr600 SoC support added > SPEAr300 SoC support added > SPEAr310 SoC support added > SPEAr320 SoC support added > SPEAr600 build support added > > MAKEALL | 4 + > Makefile | 12 + > board/spear/common/spr_lowlevel_init.S | 202 +++++ > board/spear/common/spr_misc.c | 270 +++++++ > board/spear/spear300/Makefile | 52 ++ > board/spear/spear300/config.mk | 39 + > board/spear/spear300/spr300_board.c | 57 ++ > board/spear/spear310/Makefile | 52 ++ > board/spear/spear310/config.mk | 42 + > board/spear/spear310/spr310_board.c | 58 ++ > board/spear/spear320/Makefile | 52 ++ > board/spear/spear320/config.mk | 42 + > board/spear/spear320/spr320_board.c | 58 ++ > board/spear/spear600/Makefile | 52 ++ > board/spear/spear600/config.mk | 39 + > board/spear/spear600/spr600_board.c | 53 ++ > common/cmd_bdinfo.c | 20 + > common/main.c | 2 + > cpu/arm926ejs/spear/Makefile | 52 ++ > cpu/arm926ejs/spear/reset.c | 49 ++ > cpu/arm926ejs/spear/timer.c | 148 ++++ > drivers/i2c/Makefile | 1 + > drivers/i2c/spr_i2c.c | 321 ++++++++ > drivers/mtd/Makefile | 1 + > drivers/mtd/nand/Makefile | 1 + > drivers/mtd/nand/spr_nand.c | 126 +++ > drivers/mtd/spr_smi.c | 548 +++++++++++++ > drivers/serial/usbtty.h | 2 + > drivers/usb/gadget/Makefile | 1 + > drivers/usb/gadget/spr_udc.c | 996 ++++++++++++++++++++++++ > include/asm-arm/arch-spear/spr_defs.h | 31 + > include/asm-arm/arch-spear/spr_emi.h | 55 ++ > include/asm-arm/arch-spear/spr_gpt.h | 83 ++ > include/asm-arm/arch-spear/spr_i2c.h | 143 ++++ > include/asm-arm/arch-spear/spr_misc.h | 126 +++ > include/asm-arm/arch-spear/spr_nand.h | 58 ++ > include/asm-arm/arch-spear/spr_smi.h | 112 +++ > include/asm-arm/arch-spear/spr_syscntl.h | 38 + > include/asm-arm/arch-spear/spr_xloader_table.h | 67 ++ > include/asm-arm/u-boot.h | 5 + > include/configs/spear300.h | 260 ++++++ > include/configs/spear310.h | 353 +++++++++ > include/configs/spear320.h | 336 ++++++++ > include/configs/spear600.h | 260 ++++++ > include/usb/spr_udc.h | 227 ++++++ > 45 files changed, 5506 insertions(+), 0 deletions(-) > create mode 100755 board/spear/common/spr_lowlevel_init.S > create mode 100755 board/spear/common/spr_misc.c > create mode 100755 board/spear/spear300/Makefile > create mode 100755 board/spear/spear300/config.mk > create mode 100755 board/spear/spear300/spr300_board.c > create mode 100755 board/spear/spear310/Makefile > create mode 100755 board/spear/spear310/config.mk > create mode 100755 board/spear/spear310/spr310_board.c > create mode 100755 board/spear/spear320/Makefile > create mode 100755 board/spear/spear320/config.mk > create mode 100755 board/spear/spear320/spr320_board.c > create mode 100755 board/spear/spear600/Makefile > create mode 100755 board/spear/spear600/config.mk > create mode 100755 board/spear/spear600/spr600_board.c > create mode 100755 cpu/arm926ejs/spear/Makefile > create mode 100755 cpu/arm926ejs/spear/reset.c > create mode 100755 cpu/arm926ejs/spear/timer.c > mode change 100644 => 100755 drivers/i2c/Makefile > create mode 100755 drivers/i2c/spr_i2c.c > mode change 100644 => 100755 drivers/mtd/Makefile > create mode 100755 drivers/mtd/nand/spr_nand.c > create mode 100755 drivers/mtd/spr_smi.c > mode change 100644 => 100755 drivers/serial/usbtty.h > mode change 100644 => 100755 drivers/usb/gadget/Makefile > create mode 100755 drivers/usb/gadget/spr_udc.c > create mode 100644 include/asm-arm/arch-spear/spr_defs.h > create mode 100755 include/asm-arm/arch-spear/spr_emi.h > create mode 100755 include/asm-arm/arch-spear/spr_gpt.h > create mode 100755 include/asm-arm/arch-spear/spr_i2c.h > create mode 100644 include/asm-arm/arch-spear/spr_misc.h > create mode 100644 include/asm-arm/arch-spear/spr_nand.h > create mode 100755 include/asm-arm/arch-spear/spr_smi.h > create mode 100644 include/asm-arm/arch-spear/spr_syscntl.h > create mode 100755 include/asm-arm/arch-spear/spr_xloader_table.h > create mode 100755 include/configs/spear300.h > create mode 100755 include/configs/spear310.h > create mode 100755 include/configs/spear320.h > create mode 100755 include/configs/spear600.h > create mode 100755 include/usb/spr_udc.h > > ^ permalink raw reply [flat|nested] 44+ messages in thread
end of thread, other threads:[~2010-01-05 3:53 UTC | newest] Thread overview: 44+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2009-12-16 9:18 [U-Boot] [PATCH 0/9] Support for SPEAr SoCs Vipin KUMAR 2009-12-16 9:18 ` [U-Boot] [PATCH 1/9] i2c driver support " Vipin KUMAR 2009-12-16 9:18 ` [U-Boot] [PATCH 2/9] smi " Vipin KUMAR 2009-12-16 9:18 ` [U-Boot] [PATCH 3/9] nand " Vipin KUMAR 2009-12-16 9:18 ` [U-Boot] [PATCH 4/9] usbd driver and usb boot firmware " Vipin KUMAR 2009-12-16 9:18 ` [U-Boot] [PATCH 5/9] SPEAr600 SoC support added Vipin KUMAR 2009-12-16 9:18 ` [U-Boot] [PATCH 6/9] SPEAr300 " Vipin KUMAR 2009-12-16 9:18 ` [U-Boot] [PATCH 7/9] SPEAr310 " Vipin KUMAR 2009-12-16 9:18 ` [U-Boot] [PATCH 8/9] SPEAr320 " Vipin KUMAR 2009-12-16 9:18 ` [U-Boot] [PATCH 9/9] SPEAr600 build " Vipin KUMAR 2009-12-17 20:14 ` Wolfgang Denk 2009-12-19 7:26 ` Vipin Kumar 2009-12-17 20:14 ` [U-Boot] [PATCH 8/9] SPEAr320 SoC " Wolfgang Denk 2009-12-19 7:21 ` Vipin Kumar 2009-12-17 20:13 ` [U-Boot] [PATCH 7/9] SPEAr310 " Wolfgang Denk 2009-12-19 7:19 ` Vipin Kumar 2009-12-17 20:09 ` [U-Boot] [PATCH 6/9] SPEAr300 " Wolfgang Denk 2009-12-19 7:10 ` Vipin Kumar 2009-12-19 7:25 ` Wolfgang Denk 2009-12-19 7:58 ` Vipin Kumar 2009-12-16 17:30 ` [U-Boot] [PATCH 5/9] SPEAr600 " Peter Tyser 2009-12-16 18:00 ` Armando VISCONTI 2009-12-16 18:28 ` Peter Tyser 2009-12-17 22:44 ` Wolfgang Denk 2009-12-17 22:54 ` Peter Tyser 2009-12-17 23:13 ` Wolfgang Denk 2009-12-19 7:31 ` Vipin Kumar 2009-12-16 23:09 ` Wolfgang Denk 2009-12-19 8:56 ` Vipin Kumar 2009-12-16 22:56 ` [U-Boot] [PATCH 4/9] usbd driver and usb boot firmware support for SPEAr SoCs Wolfgang Denk 2009-12-19 7:02 ` Vipin Kumar 2009-12-19 7:24 ` Wolfgang Denk 2009-12-19 8:46 ` Vipin Kumar 2010-01-04 23:06 ` [U-Boot] [PATCH 3/9] nand driver " Scott Wood 2010-01-05 3:53 ` Vipin KUMAR 2009-12-16 22:44 ` [U-Boot] [PATCH 2/9] smi " Wolfgang Denk 2009-12-19 6:44 ` Vipin Kumar 2009-12-19 7:20 ` Wolfgang Denk 2009-12-19 7:56 ` Vipin Kumar 2009-12-19 7:59 ` Albert ARIBAUD 2009-12-19 8:28 ` Vipin Kumar 2009-12-19 21:37 ` Wolfgang Denk 2009-12-16 22:31 ` [U-Boot] [PATCH 1/9] i2c " Wolfgang Denk 2009-12-16 16:49 ` [U-Boot] [PATCH 0/9] Support " Armando VISCONTI
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