From: Stefan Roese <sr@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH] ppc4xx: Corrected EBC register bit definitions
Date: Wed, 24 Feb 2010 17:15:19 +0100 [thread overview]
Message-ID: <201002241715.19869.sr@denx.de> (raw)
In-Reply-To: <8B3930FEA8618C44B48EB06B5D33A06E01CCE3E2@satmail.Advantech.ca>
Hi Eugene,
On Wednesday 24 February 2010 16:12:48 Eugene O'Brien wrote:
> I am working on another platform based on the PPC405GPr. You are correct
> in your observation and my patch is incorrect. The original bit masks
> are correct for the PPC440EP and PPC440EPx but **not** for the PPC405GPr
> so a correction is required.
I see.
> According to the AMCC documentation, the EMPL, EMPH bit positions are as
> you defined them for the PPC440 processors and they are as I define them
> for the PPC405 processors (in the group of processors defined as
> CONFIG_EBC_PPC4xx_IBM_VER1). The PPC405EP is an exception since it does
> not seem to allow external bus mastering and these bits are reserved.
> Therefore a proper patch needs to set the bit position of the EMPL and
> EMPH fields differently with the CONFIG_EBC_PPC4xx_IBM_VER1 group
> accordingly. I can attempt a patch for that if you like.
Yes, please do so. Thanks.
Cheers,
Stefan
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
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next prev parent reply other threads:[~2010-02-24 16:15 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-02-23 21:19 [U-Boot] [PATCH] ppc4xx: Corrected EBC register bit definitions Eugene O'Brien
2010-02-23 22:06 ` Wolfgang Denk
2010-02-24 7:30 ` Stefan Roese
2010-02-24 15:12 ` Eugene O'Brien
2010-02-24 16:15 ` Stefan Roese [this message]
-- strict thread matches above, loose matches on Subject: below --
2010-02-24 19:10 Eugene O'Brien
2010-03-02 13:14 ` Stefan Roese
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