[U-Boot] [PATCH] Add support for Indefia Nimbus Cloud Board

Stefan Roese
2010-03-22T09:23:15Z

Hi Wolfgang,

On Sunday 21 March 2010 17:34:50 Wolfgang Denk wrote:
> > The problem with AVR32 and the CFI flash driver has a few possible
> > solutions as noted by Haavard Skinnemoen in the email [1]. The only
> > thing I can do is to go with the first alternative and set the flash
> > address as the virtual address which is cache-disabled and works
> > flawless with the CFI driver.
> >
> > That solution can also be used by other AVR32 boards, and I _think_ it
> > also solves the JFFS2 scanning problem which was mentioned in [2].
> >
> > The only ugly thing (for me) is when using the CFI commands, the flash
> > addresses has to be shifted by 0xa0000000. (e.g. copy to flash at 0x1000
> > must be written as cp.b 0xa0001000 <size>).
>
> I really dislike such an approach. From the user interface point of
> view this is unacceptable to me.
>
>
> My understanding is that there are only three pretty local areas where
> uncached access to the flash is needed: initialization (i. e. probing
> and querying), erasing, and programming.

Yes. If I don't miss anything then this is correct.

> So it should be possible to switch off caching when entering these
> functions, and turn it on again upon return. Eventually other
> architectures might want to implement such a feature, too, so adding
> generic infrastructure to do that makes sense to me.
>
> Stefan might want to comment here, too ?

Currently I see 2 approaches to support NOR FLASH mapped via a cached memory
region in the common CFI driver:

a) Use write-through cache support (if possible) and add required cache
handling calls (invalidate and flush) at the "correct locations" (TM)
in the CFI driver.

b) Temporarily disable cache in the NOR FLASH memory region before using
the CFI driver. This could be done in some generic places (like Wolfgang
mentioned above) and should not require any additional user action/input.

Not all platforms will support both alternatives.

Semih, would one of the above options be possible for your platform? Does the
AVR support write-through cache? Is it possible to enable such a caching
attribute selectively for the NOR FLASH region?

BTW: It might be that I start working on such a cached NOR FLASH support in
the next few weeks. My current preference is option a) right now.

Cheers,
Stefan

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