[U-Boot] [PATCH] Add support for Indefia Nimbus Cloud Board

Semih Hazar
2010-03-23T17:41:34Z

On 3/22/10 11:23 AM, Stefan Roese wrote:
>
> Currently I see 2 approaches to support NOR FLASH mapped via a cached memory
> region in the common CFI driver:
>
> a) Use write-through cache support (if possible) and add required cache
> handling calls (invalidate and flush) at the "correct locations" (TM)
> in the CFI driver.
>
> b) Temporarily disable cache in the NOR FLASH memory region before using
> the CFI driver. This could be done in some generic places (like Wolfgang
> mentioned above) and should not require any additional user action/input.
>
>
> Not all platforms will support both alternatives.
>
> Semih, would one of the above options be possible for your platform? Does the
> AVR support write-through cache? Is it possible to enable such a caching
> attribute selectively for the NOR FLASH region?
>
>
I'm not the expert on the AVR32 memory architecture, but as far as I
know it goes like this for the NOR Flash area:
The Flash is mapped at the physical address at 0x0 and this region is
cached.
This same memory region is also mapped at 0xa000000 which is not cached.

Quoting directly from the architecture datasheet:
"The mapping between virtual addresses and physical addresses is
therefore implemented by clearing of MSBs in the virtual address."

In other words, if you want uncached access to the Flash, read/write at
0xa0000000, otherwise use 0x0.

It's not possible to simply disable caching for 0x0 region. It can be
achieved using paging, but it's more complicated.

> BTW: It might be that I start working on such a cached NOR FLASH support in
> the next few weeks. My current preference is option a) right now.
>
>
>

If we go with Stefan's option a, then we need to put some #ifdefs or
function calls in the flash code to enable/disable cache, right?
Since caching can't be enabled/disabled in AVR32, the solution Haavard
proposed long time ago seems a good one, considering that you're now
willing to integrate cached flash support. It was a (un)map_physmem
function which returns a new address for the cached/uncached region.

I think all possible scenarios have been talked in the past. I just
wanted to submit my patch, since it was way long overdue. If we can't
move any further, Wolfgang, I'd like you to accept this patch as it is.

PS: Related discussions can be seen in this long thread:
http://www.mail-archive.com/u-boot at lists.denx.de/msg20778.html

Best Regards,
Semih Hazar