[U-Boot] [PATCH v2 0/7] Add support for PDM360NG board

[U-Boot] [PATCH v2 0/7] Add support for PDM360NG board

[Anatolij Gustschin]

This patch series intend to support MPC5121e based
PDM360NG board. Patches preceding the actual board
support patch 6 prepare needed infrastructure for
the PDM360NG board.

Changes since first version:
 - addressed comments, detailed log of changes is
   provided in patch description.

NOTE:
 - if splashscreen is used, another fix should also
   be applied, see patch
   http://lists.denx.de/pipermail/u-boot/2010-March/068505.html

 - for RLE8 BMP support see patch
   http://lists.denx.de/pipermail/u-boot/2010-March/068476.html

Anatolij Gustschin (7):
  mpc512x: make MEM IO Control configuration a board config option
  mpc512x: add multi serial PSC support
  mpc5121: add PSC serial communication routines
  fdt_support: add partitions fixup in mtd node
  mpc5121: add common post_word_load/store code
  mpc5121: add support for PDM360NG board
  mpc5121: cpu/mpc512x/diu.c: fix warnings

 MAKEALL                             |    1 +
 Makefile                            |    3 +
 board/freescale/common/fsl_diu_fb.c |   29 ++-
 board/pdm360ng/Makefile             |   52 ++++
 board/pdm360ng/config.mk            |   24 ++
 board/pdm360ng/pdm360ng.c           |  525 +++++++++++++++++++++++++++++++++++
 board/pdm360ng/post.c               |   75 +++++
 common/cmd_mtdparts.c               |    2 +-
 common/fdt_support.c                |  219 +++++++++++++++
 common/serial.c                     |   23 ++
 cpu/mpc512x/Makefile                |    1 +
 cpu/mpc512x/commproc.c              |   25 ++
 cpu/mpc512x/diu.c                   |   18 +-
 cpu/mpc512x/fixed_sdram.c           |    2 +-
 cpu/mpc512x/serial.c                |  353 ++++++++++++++++++++++--
 include/asm-ppc/immap_512x.h        |  112 ++++----
 include/configs/aria.h              |    2 +
 include/configs/mecp5123.h          |    2 +
 include/configs/mpc5121-common.h    |   52 ++++
 include/configs/mpc5121ads.h        |    2 +
 include/configs/pdm360ng.h          |  520 ++++++++++++++++++++++++++++++++++
 include/fdt_support.h               |    2 +
 include/jffs2/load_kernel.h         |    1 +
 include/mtd_node.h                  |   11 +
 include/post.h                      |    1 +
 include/serial.h                    |   15 +
 post/tests.c                        |    4 +
 27 files changed, 1981 insertions(+), 95 deletions(-)
 create mode 100644 board/pdm360ng/Makefile
 create mode 100644 board/pdm360ng/config.mk
 create mode 100644 board/pdm360ng/pdm360ng.c
 create mode 100644 board/pdm360ng/post.c
 create mode 100644 cpu/mpc512x/commproc.c
 create mode 100644 include/configs/mpc5121-common.h
 create mode 100644 include/configs/pdm360ng.h
 create mode 100644 include/mtd_node.h

[U-Boot] [PATCH v2 1/7] mpc512x: make MEM IO Control configuration a board config option

[Anatolij Gustschin]

Signed-off-by: Anatolij Gustschin <agust@denx.de>
---
No changes since v1.

 cpu/mpc512x/fixed_sdram.c    |    2 +-
 include/asm-ppc/immap_512x.h |    4 ----
 include/configs/aria.h       |    2 ++
 include/configs/mecp5123.h   |    2 ++
 include/configs/mpc5121ads.h |    2 ++
 5 files changed, 7 insertions(+), 5 deletions(-)

diff --git a/cpu/mpc512x/fixed_sdram.c b/cpu/mpc512x/fixed_sdram.c
index 442b5fc..72d524c 100644
--- a/cpu/mpc512x/fixed_sdram.c
+++ b/cpu/mpc512x/fixed_sdram.c
@@ -91,7 +91,7 @@ long int fixed_sdram(ddr512x_config_t *mddrc_config,
 	}
 
 	/* Initialize IO Control */
-	out_be32(&im->io_ctrl.io_control_mem, IOCTRL_MUX_DDR);
+	out_be32(&im->io_ctrl.io_control_mem, CONFIG_SYS_IOCTRL_MUX_DDR);
 
 	/* Initialize DDR Local Window */
 	out_be32(&im->sysconf.ddrlaw.bar, CONFIG_SYS_DDR_BASE & 0xFFFFF000);
diff --git a/include/asm-ppc/immap_512x.h b/include/asm-ppc/immap_512x.h
index 95350fd..1dc47e5 100644
--- a/include/asm-ppc/immap_512x.h
+++ b/include/asm-ppc/immap_512x.h
@@ -848,10 +848,6 @@ typedef struct ioctrl512x {
 	u8	reserved[0x0cfc];		/* fill to 4096 bytes size */
 } ioctrl512x_t;
 
-/* Indexes in regs array */
-/* Set for DDR */
-#define IOCTRL_MUX_DDR		0x00000036
-
 /* IO pin fields */
 #define IO_PIN_FMUX(v)	((v) << 7)	/* pin function */
 #define IO_PIN_HOLD(v)	((v) << 5)	/* hold time, pci only */
diff --git a/include/configs/aria.h b/include/configs/aria.h
index f89fc57..a73c0c7 100644
--- a/include/configs/aria.h
+++ b/include/configs/aria.h
@@ -79,6 +79,8 @@
 #define CONFIG_SYS_DDR_BASE		0x00000000
 #define CONFIG_SYS_SDRAM_BASE		CONFIG_SYS_DDR_BASE
 
+#define CONFIG_SYS_IOCTRL_MUX_DDR	0x00000036
+
 /* DDR Controller Configuration
  *
  * SYS_CFG:
diff --git a/include/configs/mecp5123.h b/include/configs/mecp5123.h
index cccc31d..cafd6a7 100644
--- a/include/configs/mecp5123.h
+++ b/include/configs/mecp5123.h
@@ -67,6 +67,8 @@
 #define CONFIG_SYS_DDR_BASE		0x00000000	/* DDR is sys memory*/
 #define CONFIG_SYS_SDRAM_BASE		CONFIG_SYS_DDR_BASE
 
+#define CONFIG_SYS_IOCTRL_MUX_DDR	0x00000036
+
 /* DDR Controller Configuration
  *
  * SYS_CFG:
diff --git a/include/configs/mpc5121ads.h b/include/configs/mpc5121ads.h
index fb49388..8ecc9e1 100644
--- a/include/configs/mpc5121ads.h
+++ b/include/configs/mpc5121ads.h
@@ -86,6 +86,8 @@
 #define CONFIG_SYS_DDR_BASE		0x00000000	/* DDR is system memory*/
 #define CONFIG_SYS_SDRAM_BASE		CONFIG_SYS_DDR_BASE
 
+#define CONFIG_SYS_IOCTRL_MUX_DDR	0x00000036
+
 /* DDR Controller Configuration
  *
  * SYS_CFG:
-- 
1.6.3.3

[U-Boot] [PATCH v2 2/7] mpc512x: add multi serial PSC support

[Anatolij Gustschin]

Extend mpc512x serial driver to support multiple PSC ports.

Supsequent patches for PDM360NG board support make use of this
functionality by defining CONFIG_SERIAL_MULTI in the board config
file. Additionally the used PSC devices are specified by defining
e.g. CONFIG_SYS_PSC1, CONFIG_SYS_PSC4 and CONFIG_SYS_PSC6.

Support for PSC devices other than 1, 3, 4 and 6 is not added
by this patch because these aren't used currently. In the future
it can be easily added using DECLARE_PSC_SERIAL_FUNCTIONS(N) and
INIT_PSC_SERIAL_STRUCTURE(N) macros in cpu/mpc512x/serial.c.
Additionally you have to add code for registering added
devices in serial_initialise() in common/serial.c.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
---
No changes since v1.

 common/serial.c              |   23 ++++
 cpu/mpc512x/serial.c         |  266 +++++++++++++++++++++++++++++++++++++-----
 include/asm-ppc/immap_512x.h |  108 +++++++++---------
 include/serial.h             |    8 ++
 4 files changed, 324 insertions(+), 81 deletions(-)

diff --git a/common/serial.c b/common/serial.c
index 5f9ffd7..754e329 100644
--- a/common/serial.c
+++ b/common/serial.c
@@ -59,6 +59,14 @@ struct serial_device *__default_serial_console (void)
 #else
 		return &serial0_device;
 #endif
+#elif defined(CONFIG_MPC512X)
+#if (CONFIG_PSC_CONSOLE == 3)
+		return &serial3_device;
+#elif (CONFIG_PSC_CONSOLE == 6)
+		return &serial6_device;
+#else
+#error "Bad CONFIG_PSC_CONSOLE."
+#endif
 #elif defined(CONFIG_S3C2410)
 #if defined(CONFIG_SERIAL1)
 	return &s3c24xx_serial0_device;
@@ -159,6 +167,20 @@ void serial_initialize (void)
 	serial_register(&s5pc1xx_serial2_device);
 	serial_register(&s5pc1xx_serial3_device);
 #endif
+#if defined(CONFIG_MPC512X)
+#if defined(CONFIG_SYS_PSC1)
+	serial_register(&serial1_device);
+#endif
+#if defined(CONFIG_SYS_PSC3)
+	serial_register(&serial3_device);
+#endif
+#if defined(CONFIG_SYS_PSC4)
+	serial_register(&serial4_device);
+#endif
+#if defined(CONFIG_SYS_PSC6)
+	serial_register(&serial6_device);
+#endif
+#endif
 	serial_assign (default_serial_console ()->name);
 }
 
@@ -174,6 +196,7 @@ void serial_stdio_init (void)
 		dev.flags = DEV_FLAGS_OUTPUT | DEV_FLAGS_INPUT;
 
 		dev.start = s->init;
+		dev.stop = s->uninit;
 		dev.putc = s->putc;
 		dev.puts = s->puts;
 		dev.getc = s->getc;
diff --git a/cpu/mpc512x/serial.c b/cpu/mpc512x/serial.c
index ec2f41b..f421968 100644
--- a/cpu/mpc512x/serial.c
+++ b/cpu/mpc512x/serial.c
@@ -32,14 +32,16 @@
 #include <common.h>
 #include <asm/io.h>
 #include <asm/processor.h>
+#include <serial.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#if defined(CONFIG_PSC_CONSOLE)
+#if defined(CONFIG_PSC_CONSOLE) || defined(CONFIG_SERIAL_MULTI)
 
 static void fifo_init (volatile psc512x_t *psc)
 {
 	volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
+	u32 tfsize, rfsize;
 
 	/* reset Rx & Tx fifo slice */
 	out_be32(&psc->rfcmd, PSC_FIFO_RESET_SLICE);
@@ -49,8 +51,65 @@ static void fifo_init (volatile psc512x_t *psc)
 	out_be32(&psc->rfintmask, 0);
 	out_be32(&psc->tfintmask, 0);
 
-	out_be32(&psc->tfsize, CONSOLE_FIFO_TX_SIZE | (CONSOLE_FIFO_TX_ADDR << 16));
-	out_be32(&psc->rfsize, CONSOLE_FIFO_RX_SIZE | (CONSOLE_FIFO_RX_ADDR << 16));
+#if defined(CONFIG_SERIAL_MULTI)
+	switch (((u32)psc & 0xf00) >> 8) {
+	case 0:
+		tfsize = FIFOC_PSC0_TX_SIZE | (FIFOC_PSC0_TX_ADDR << 16);
+		rfsize = FIFOC_PSC0_RX_SIZE | (FIFOC_PSC0_RX_ADDR << 16);
+		break;
+	case 1:
+		tfsize = FIFOC_PSC1_TX_SIZE | (FIFOC_PSC1_TX_ADDR << 16);
+		rfsize = FIFOC_PSC1_RX_SIZE | (FIFOC_PSC1_RX_ADDR << 16);
+		break;
+	case 2:
+		tfsize = FIFOC_PSC2_TX_SIZE | (FIFOC_PSC2_TX_ADDR << 16);
+		rfsize = FIFOC_PSC2_RX_SIZE | (FIFOC_PSC2_RX_ADDR << 16);
+		break;
+	case 3:
+		tfsize = FIFOC_PSC3_TX_SIZE | (FIFOC_PSC3_TX_ADDR << 16);
+		rfsize = FIFOC_PSC3_RX_SIZE | (FIFOC_PSC3_RX_ADDR << 16);
+		break;
+	case 4:
+		tfsize = FIFOC_PSC4_TX_SIZE | (FIFOC_PSC4_TX_ADDR << 16);
+		rfsize = FIFOC_PSC4_RX_SIZE | (FIFOC_PSC4_RX_ADDR << 16);
+		break;
+	case 5:
+		tfsize = FIFOC_PSC5_TX_SIZE | (FIFOC_PSC5_TX_ADDR << 16);
+		rfsize = FIFOC_PSC5_RX_SIZE | (FIFOC_PSC5_RX_ADDR << 16);
+		break;
+	case 6:
+		tfsize = FIFOC_PSC6_TX_SIZE | (FIFOC_PSC6_TX_ADDR << 16);
+		rfsize = FIFOC_PSC6_RX_SIZE | (FIFOC_PSC6_RX_ADDR << 16);
+		break;
+	case 7:
+		tfsize = FIFOC_PSC7_TX_SIZE | (FIFOC_PSC7_TX_ADDR << 16);
+		rfsize = FIFOC_PSC7_RX_SIZE | (FIFOC_PSC7_RX_ADDR << 16);
+		break;
+	case 8:
+		tfsize = FIFOC_PSC8_TX_SIZE | (FIFOC_PSC8_TX_ADDR << 16);
+		rfsize = FIFOC_PSC8_RX_SIZE | (FIFOC_PSC8_RX_ADDR << 16);
+		break;
+	case 9:
+		tfsize = FIFOC_PSC9_TX_SIZE | (FIFOC_PSC9_TX_ADDR << 16);
+		rfsize = FIFOC_PSC9_RX_SIZE | (FIFOC_PSC9_RX_ADDR << 16);
+		break;
+	case 10:
+		tfsize = FIFOC_PSC10_TX_SIZE | (FIFOC_PSC10_TX_ADDR << 16);
+		rfsize = FIFOC_PSC10_RX_SIZE | (FIFOC_PSC10_RX_ADDR << 16);
+		break;
+	case 11:
+		tfsize = FIFOC_PSC11_TX_SIZE | (FIFOC_PSC11_TX_ADDR << 16);
+		rfsize = FIFOC_PSC11_RX_SIZE | (FIFOC_PSC11_RX_ADDR << 16);
+		break;
+	default:
+		return;
+	}
+#else
+	tfsize = CONSOLE_FIFO_TX_SIZE | (CONSOLE_FIFO_TX_ADDR << 16);
+	rfsize = CONSOLE_FIFO_RX_SIZE | (CONSOLE_FIFO_RX_ADDR << 16);
+#endif
+	out_be32(&psc->tfsize, tfsize);
+	out_be32(&psc->rfsize, rfsize);
 
 	/* enable Tx & Rx FIFO slice */
 	out_be32(&psc->rfcmd, PSC_FIFO_ENABLE_SLICE);
@@ -60,24 +119,47 @@ static void fifo_init (volatile psc512x_t *psc)
 	__asm__ volatile ("sync");
 }
 
-void serial_setbrg(void)
+void serial_setbrg_dev(unsigned int idx)
 {
 	volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
-	volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE];
+	volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
 	unsigned long baseclk, div;
+	unsigned long baudrate;
+	char buf[16];
+	char *br_env;
+
+	baudrate = gd->baudrate;
+	if (idx != CONFIG_PSC_CONSOLE) {
+		/* Allows setting baudrate for other serial devices
+		 * on PSCx using environment. If not specified, use
+		 * the same baudrate as for console.
+		 */
+		sprintf(buf, "psc%d_baudrate", idx);
+		br_env = getenv(buf);
+		if (br_env)
+			baudrate = simple_strtoul(br_env, NULL, 10);
+
+		debug("%s: idx %d, baudrate %d\n", __func__, idx, baudrate);
+	}
 
-	/* calculate dividor for setting PSC CTUR and CTLR registers */
+	/* calculate divisor for setting PSC CTUR and CTLR registers */
 	baseclk = (gd->ips_clk + 8) / 16;
-	div = (baseclk + (gd->baudrate / 2)) / gd->baudrate;
+	div = (baseclk + (baudrate / 2)) / baudrate;
 
 	out_8(&psc->ctur, (div >> 8) & 0xff);
 	out_8(&psc->ctlr,  div & 0xff); /* set baudrate */
 }
 
-int serial_init(void)
+int serial_init_dev(unsigned int idx)
 {
 	volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
-	volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE];
+	volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
+#if defined(CONFIG_SERIAL_MULTI)
+	u32 reg;
+
+	reg = in_be32(&im->clk.sccr[0]);
+	out_be32(&im->clk.sccr[0], reg | CLOCK_SCCR1_PSC_EN(idx));
+#endif
 
 	fifo_init (psc);
 
@@ -100,7 +182,7 @@ int serial_init(void)
 	out_8(&psc->mode, PSC_MODE_1_STOPBIT);
 
 	/* set baudrate */
-	serial_setbrg();
+	serial_setbrg_dev(idx);
 
 	/* disable all interrupts */
 	out_be16(&psc->psc_imr, 0);
@@ -113,13 +195,27 @@ int serial_init(void)
 	return 0;
 }
 
-void serial_putc (const char c)
+int serial_uninit_dev(unsigned int idx)
+{
+	volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
+	volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
+	u32 reg;
+
+	out_8(&psc->command, PSC_RX_DISABLE | PSC_TX_DISABLE);
+	reg = in_be32(&im->clk.sccr[0]);
+	reg &= ~CLOCK_SCCR1_PSC_EN(idx);
+	out_be32(&im->clk.sccr[0], reg);
+
+	return 0;
+}
+
+void serial_putc_dev(unsigned int idx, const char c)
 {
 	volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
-	volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE];
+	volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
 
 	if (c == '\n')
-		serial_putc ('\r');
+		serial_putc_dev(idx, '\r');
 
 	/* Wait for last character to go. */
 	while (!(in_be16(&psc->psc_status) & PSC_SR_TXEMP))
@@ -128,10 +224,10 @@ void serial_putc (const char c)
 	out_8(&psc->tfdata_8, c);
 }
 
-void serial_putc_raw (const char c)
+void serial_putc_raw_dev(unsigned int idx, const char c)
 {
 	volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
-	volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE];
+	volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
 
 	/* Wait for last character to go. */
 	while (!(in_be16(&psc->psc_status) & PSC_SR_TXEMP))
@@ -140,18 +236,16 @@ void serial_putc_raw (const char c)
 	out_8(&psc->tfdata_8, c);
 }
 
-
-void serial_puts (const char *s)
+void serial_puts_dev(unsigned int idx, const char *s)
 {
-	while (*s) {
-		serial_putc (*s++);
-	}
+	while (*s)
+		serial_putc_dev(idx, *s++);
 }
 
-int serial_getc (void)
+int serial_getc_dev(unsigned int idx)
 {
 	volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
-	volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE];
+	volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
 
 	/* Wait for a character to arrive. */
 	while (in_be32(&psc->rfstat) & PSC_FIFO_EMPTY)
@@ -160,18 +254,18 @@ int serial_getc (void)
 	return in_8(&psc->rfdata_8);
 }
 
-int serial_tstc (void)
+int serial_tstc_dev(unsigned int idx)
 {
 	volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
-	volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE];
+	volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
 
 	return !(in_be32(&psc->rfstat) & PSC_FIFO_EMPTY);
 }
 
-void serial_setrts(int s)
+void serial_setrts_dev(unsigned int idx, int s)
 {
 	volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
-	volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE];
+	volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
 
 	if (s) {
 		/* Assert RTS (become LOW) */
@@ -183,11 +277,127 @@ void serial_setrts(int s)
 	}
 }
 
-int serial_getcts(void)
+int serial_getcts_dev(unsigned int idx)
 {
 	volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
-	volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE];
+	volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
 
 	return (in_8(&psc->ip) & 0x1) ? 0 : 1;
 }
+#endif /* CONFIG_PSC_CONSOLE || CONFIG_SERIAL_MULTI */
+
+#if defined(CONFIG_SERIAL_MULTI)
+
+#define DECLARE_PSC_SERIAL_FUNCTIONS(port) \
+	int serial##port##_init(void) \
+	{ \
+		return serial_init_dev(port); \
+	} \
+	int serial##port##_uninit(void) \
+	{ \
+		return serial_uninit_dev(port); \
+	} \
+	void serial##port##_setbrg(void) \
+	{ \
+		serial_setbrg_dev(port); \
+	} \
+	int serial##port##_getc(void) \
+	{ \
+		return serial_getc_dev(port); \
+	} \
+	int serial##port##_tstc(void) \
+	{ \
+		return serial_tstc_dev(port); \
+	} \
+	void serial##port##_putc(const char c) \
+	{ \
+		serial_putc_dev(port, c); \
+	} \
+	void serial##port##_puts(const char *s) \
+	{ \
+		serial_puts_dev(port, s); \
+	}
+
+#define INIT_PSC_SERIAL_STRUCTURE(port, name, bus) { \
+	name, \
+	bus, \
+	serial##port##_init, \
+	serial##port##_uninit, \
+	serial##port##_setbrg, \
+	serial##port##_getc, \
+	serial##port##_tstc, \
+	serial##port##_putc, \
+	serial##port##_puts, \
+}
+
+#if defined(CONFIG_SYS_PSC1)
+DECLARE_PSC_SERIAL_FUNCTIONS(1);
+struct serial_device serial1_device =
+INIT_PSC_SERIAL_STRUCTURE(1, "psc1", "UART1");
+#endif
+
+#if defined(CONFIG_SYS_PSC3)
+DECLARE_PSC_SERIAL_FUNCTIONS(3);
+struct serial_device serial3_device =
+INIT_PSC_SERIAL_STRUCTURE(3, "psc3", "UART3");
+#endif
+
+#if defined(CONFIG_SYS_PSC4)
+DECLARE_PSC_SERIAL_FUNCTIONS(4);
+struct serial_device serial4_device =
+INIT_PSC_SERIAL_STRUCTURE(4, "psc4", "UART4");
+#endif
+
+#if defined(CONFIG_SYS_PSC6)
+DECLARE_PSC_SERIAL_FUNCTIONS(6);
+struct serial_device serial6_device =
+INIT_PSC_SERIAL_STRUCTURE(6, "psc6", "UART6");
+#endif
+
+#else
+
+void serial_setbrg(void)
+{
+	serial_setbrg_dev(CONFIG_PSC_CONSOLE);
+}
+
+int serial_init(void)
+{
+	return serial_init_dev(CONFIG_PSC_CONSOLE);
+}
+
+void serial_putc(const char c)
+{
+	serial_putc_dev(CONFIG_PSC_CONSOLE, c);
+}
+
+void serial_putc_raw(const char c)
+{
+	serial_putc_raw_dev(CONFIG_PSC_CONSOLE, c);
+}
+
+void serial_puts(const char *s)
+{
+	serial_puts_dev(CONFIG_PSC_CONSOLE, s);
+}
+
+int serial_getc(void)
+{
+	return serial_getc_dev(CONFIG_PSC_CONSOLE);
+}
+
+int serial_tstc(void)
+{
+	return serial_tstc_dev(CONFIG_PSC_CONSOLE);
+}
+
+void serial_setrts(int s)
+{
+	return serial_setrts_dev(CONFIG_PSC_CONSOLE, s);
+}
+
+int serial_getcts(void)
+{
+	return serial_getcts_dev(CONFIG_PSC_CONSOLE);
+}
 #endif /* CONFIG_PSC_CONSOLE */
diff --git a/include/asm-ppc/immap_512x.h b/include/asm-ppc/immap_512x.h
index 1dc47e5..c430cb6 100644
--- a/include/asm-ppc/immap_512x.h
+++ b/include/asm-ppc/immap_512x.h
@@ -1112,66 +1112,68 @@ typedef struct fifoc512x {
  *
  * Overall size of FIFOC memory is not documented in the MPC5121e RM, but
  * tests indicate that it is 1024 words total.
+ *
+ * *_TX_SIZE and *_RX_SIZE is the number of 4-byte words for FIFO slice.
  */
-#define FIFOC_PSC0_TX_SIZE	0x0	/* number of 4-byte words for FIFO slice */
+#define FIFOC_PSC0_TX_SIZE	0x04
 #define FIFOC_PSC0_TX_ADDR	0x0
-#define FIFOC_PSC0_RX_SIZE	0x0
-#define FIFOC_PSC0_RX_ADDR	0x0
+#define FIFOC_PSC0_RX_SIZE	0x04
+#define FIFOC_PSC0_RX_ADDR	0x10
 
-#define FIFOC_PSC1_TX_SIZE	0x0
-#define FIFOC_PSC1_TX_ADDR	0x0
-#define FIFOC_PSC1_RX_SIZE	0x0
-#define FIFOC_PSC1_RX_ADDR	0x0
+#define FIFOC_PSC1_TX_SIZE	0x04
+#define FIFOC_PSC1_TX_ADDR	0x20
+#define FIFOC_PSC1_RX_SIZE	0x04
+#define FIFOC_PSC1_RX_ADDR	0x30
 
-#define FIFOC_PSC2_TX_SIZE	0x0
-#define FIFOC_PSC2_TX_ADDR	0x0
-#define FIFOC_PSC2_RX_SIZE	0x0
-#define FIFOC_PSC2_RX_ADDR	0x0
+#define FIFOC_PSC2_TX_SIZE	0x04
+#define FIFOC_PSC2_TX_ADDR	0x40
+#define FIFOC_PSC2_RX_SIZE	0x04
+#define FIFOC_PSC2_RX_ADDR	0x50
 
 #define FIFOC_PSC3_TX_SIZE	0x04
-#define FIFOC_PSC3_TX_ADDR	0x0
+#define FIFOC_PSC3_TX_ADDR	0x60
 #define FIFOC_PSC3_RX_SIZE	0x04
-#define FIFOC_PSC3_RX_ADDR	0x10
-
-#define FIFOC_PSC4_TX_SIZE	0x0
-#define FIFOC_PSC4_TX_ADDR	0x0
-#define FIFOC_PSC4_RX_SIZE	0x0
-#define FIFOC_PSC4_RX_ADDR	0x0
-
-#define FIFOC_PSC5_TX_SIZE	0x0
-#define FIFOC_PSC5_TX_ADDR	0x0
-#define FIFOC_PSC5_RX_SIZE	0x0
-#define FIFOC_PSC5_RX_ADDR	0x0
-
-#define FIFOC_PSC6_TX_SIZE	0x0
-#define FIFOC_PSC6_TX_ADDR	0x0
-#define FIFOC_PSC6_RX_SIZE	0x0
-#define FIFOC_PSC6_RX_ADDR	0x0
-
-#define FIFOC_PSC7_TX_SIZE	0x0
-#define FIFOC_PSC7_TX_ADDR	0x0
-#define FIFOC_PSC7_RX_SIZE	0x0
-#define FIFOC_PSC7_RX_ADDR	0x0
-
-#define FIFOC_PSC8_TX_SIZE	0x0
-#define FIFOC_PSC8_TX_ADDR	0x0
-#define FIFOC_PSC8_RX_SIZE	0x0
-#define FIFOC_PSC8_RX_ADDR	0x0
-
-#define FIFOC_PSC9_TX_SIZE	0x0
-#define FIFOC_PSC9_TX_ADDR	0x0
-#define FIFOC_PSC9_RX_SIZE	0x0
-#define FIFOC_PSC9_RX_ADDR	0x0
-
-#define FIFOC_PSC10_TX_SIZE	0x0
-#define FIFOC_PSC10_TX_ADDR	0x0
-#define FIFOC_PSC10_RX_SIZE	0x0
-#define FIFOC_PSC10_RX_ADDR	0x0
-
-#define FIFOC_PSC11_TX_SIZE	0x0
-#define FIFOC_PSC11_TX_ADDR	0x0
-#define FIFOC_PSC11_RX_SIZE	0x0
-#define FIFOC_PSC11_RX_ADDR	0x0
+#define FIFOC_PSC3_RX_ADDR	0x70
+
+#define FIFOC_PSC4_TX_SIZE	0x04
+#define FIFOC_PSC4_TX_ADDR	0x80
+#define FIFOC_PSC4_RX_SIZE	0x04
+#define FIFOC_PSC4_RX_ADDR	0x90
+
+#define FIFOC_PSC5_TX_SIZE	0x04
+#define FIFOC_PSC5_TX_ADDR	0xa0
+#define FIFOC_PSC5_RX_SIZE	0x04
+#define FIFOC_PSC5_RX_ADDR	0xb0
+
+#define FIFOC_PSC6_TX_SIZE	0x04
+#define FIFOC_PSC6_TX_ADDR	0xc0
+#define FIFOC_PSC6_RX_SIZE	0x04
+#define FIFOC_PSC6_RX_ADDR	0xd0
+
+#define FIFOC_PSC7_TX_SIZE	0x04
+#define FIFOC_PSC7_TX_ADDR	0xe0
+#define FIFOC_PSC7_RX_SIZE	0x04
+#define FIFOC_PSC7_RX_ADDR	0xf0
+
+#define FIFOC_PSC8_TX_SIZE	0x04
+#define FIFOC_PSC8_TX_ADDR	0x100
+#define FIFOC_PSC8_RX_SIZE	0x04
+#define FIFOC_PSC8_RX_ADDR	0x110
+
+#define FIFOC_PSC9_TX_SIZE	0x04
+#define FIFOC_PSC9_TX_ADDR	0x120
+#define FIFOC_PSC9_RX_SIZE	0x04
+#define FIFOC_PSC9_RX_ADDR	0x130
+
+#define FIFOC_PSC10_TX_SIZE	0x04
+#define FIFOC_PSC10_TX_ADDR	0x140
+#define FIFOC_PSC10_RX_SIZE	0x04
+#define FIFOC_PSC10_RX_ADDR	0x150
+
+#define FIFOC_PSC11_TX_SIZE	0x04
+#define FIFOC_PSC11_TX_ADDR	0x160
+#define FIFOC_PSC11_RX_SIZE	0x04
+#define FIFOC_PSC11_RX_ADDR	0x170
 
 /*
  * SATA
diff --git a/include/serial.h b/include/serial.h
index f2638ec..3f3edbc 100644
--- a/include/serial.h
+++ b/include/serial.h
@@ -9,6 +9,7 @@ struct serial_device {
 	char ctlr[CTLRSIZE];
 
 	int  (*init) (void);
+	int  (*uninit) (void);
 	void (*setbrg) (void);
 	int (*getc) (void);
 	int (*tstc) (void);
@@ -37,6 +38,13 @@ extern struct serial_device eserial4_device;
 
 #endif
 
+#if defined(CONFIG_MPC512X)
+extern struct serial_device serial1_device;
+extern struct serial_device serial3_device;
+extern struct serial_device serial4_device;
+extern struct serial_device serial6_device;
+#endif
+
 #if defined(CONFIG_S3C2410)
 extern struct serial_device s3c24xx_serial0_device;
 extern struct serial_device s3c24xx_serial1_device;
-- 
1.6.3.3

[U-Boot] [PATCH v2 3/7] mpc5121: add PSC serial communication routines

[Anatolij Gustschin]

Signed-off-by: Anatolij Gustschin <agust@denx.de>
---
No changes since v1.

 cpu/mpc512x/serial.c |   87 ++++++++++++++++++++++++++++++++++++++++++++++++++
 include/serial.h     |    7 ++++
 2 files changed, 94 insertions(+), 0 deletions(-)

diff --git a/cpu/mpc512x/serial.c b/cpu/mpc512x/serial.c
index f421968..cb5bbf0 100644
--- a/cpu/mpc512x/serial.c
+++ b/cpu/mpc512x/serial.c
@@ -401,3 +401,90 @@ int serial_getcts(void)
 	return serial_getcts_dev(CONFIG_PSC_CONSOLE);
 }
 #endif /* CONFIG_PSC_CONSOLE */
+
+#if defined(CONFIG_SERIAL_MULTI)
+#include <stdio_dev.h>
+/*
+ * Routines for communication with serial devices over PSC
+ */
+/* Bitfield for initialized PSCs */
+static unsigned int initialized;
+
+struct stdio_dev *open_port(int num, int baudrate)
+{
+	struct stdio_dev *port;
+	char env_var[16];
+	char env_val[10];
+	char name[7];
+
+	if (num < 0 || num > 11)
+		return NULL;
+
+	sprintf(name, "psc%d", num);
+	port = stdio_get_by_name(name);
+	if (!port)
+		return NULL;
+
+	if (!test_bit(num, &initialized)) {
+		sprintf(env_var, "psc%d_baudrate", num);
+		sprintf(env_val, "%d", baudrate);
+		setenv(env_var, env_val);
+
+		if (port->start())
+			return NULL;
+
+		set_bit(num, &initialized);
+	}
+
+	return port;
+}
+
+int close_port(int num)
+{
+	struct stdio_dev *port;
+	int ret;
+	char name[7];
+
+	if (num < 0 || num > 11)
+		return -1;
+
+	sprintf(name, "psc%d", num);
+	port = stdio_get_by_name(name);
+	if (!port)
+		return -1;
+
+	ret = port->stop();
+	clear_bit(num, &initialized);
+
+	return ret;
+}
+
+int write_port(struct stdio_dev *port, char *buf)
+{
+	if (!port || !buf)
+		return -1;
+
+	port->puts(buf);
+
+	return 0;
+}
+
+int read_port(struct stdio_dev *port, char *buf, int size)
+{
+	int cnt = 0;
+
+	if (!port || !buf)
+		return -1;
+
+	if (!size)
+		return 0;
+
+	while (port->tstc()) {
+		buf[cnt++] = port->getc();
+		if (cnt > size)
+			break;
+	}
+
+	return cnt;
+}
+#endif /* CONFIG_SERIAL_MULTI */
diff --git a/include/serial.h b/include/serial.h
index 3f3edbc..6423fba 100644
--- a/include/serial.h
+++ b/include/serial.h
@@ -92,4 +92,11 @@ extern int usbtty_tstc(void);
 
 #endif /* CONFIG_USB_TTY */
 
+#if defined(CONFIG_MPC512X) &&  defined(CONFIG_SERIAL_MULTI)
+extern struct stdio_dev *open_port(int num, int baudrate);
+extern int close_port(int num);
+extern int write_port(struct stdio_dev *port, char *buf);
+extern int read_port(struct stdio_dev *port, char *buf, int size);
+#endif
+
 #endif
-- 
1.6.3.3

[U-Boot] [PATCH v2 4/7] fdt_support: add partitions fixup in mtd node

[Anatolij Gustschin]

Allow overriding defined partitions in the device tree blob
using partition info defined in the 'mtdparts' environment
variable.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Gerald Van Baren <vanbaren@cideas.com>
---
Changes since first version:
 - in fdt_fixup_mtdparts() check the presence of "mtdparts"
   environment variable and don't proceed with initialisation
   if the variable is not defined (suppresses warning while booting).

 common/cmd_mtdparts.c       |    2 +-
 common/fdt_support.c        |  219 +++++++++++++++++++++++++++++++++++++++++++
 include/fdt_support.h       |    2 +
 include/jffs2/load_kernel.h |    1 +
 include/mtd_node.h          |   11 ++
 5 files changed, 234 insertions(+), 1 deletions(-)
 create mode 100644 include/mtd_node.h

diff --git a/common/cmd_mtdparts.c b/common/cmd_mtdparts.c
index 20fed2a..0b5f747 100644
--- a/common/cmd_mtdparts.c
+++ b/common/cmd_mtdparts.c
@@ -776,7 +776,7 @@ static int device_del(struct mtd_device *dev)
  * @param num device number
  * @return NULL if requested device does not exist
  */
-static struct mtd_device* device_find(u8 type, u8 num)
+struct mtd_device *device_find(u8 type, u8 num)
 {
 	struct list_head *entry;
 	struct mtd_device *dev_tmp;
diff --git a/common/fdt_support.c b/common/fdt_support.c
index f89a3ee..b7d4fe5 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -757,3 +757,222 @@ int fdt_fixup_nor_flash_size(void *blob, int cs, u32 size)
 	return -1;
 }
 #endif
+
+#ifdef CONFIG_FDT_FIXUP_PARTITIONS
+#include <jffs2/load_kernel.h>
+#include <mtd_node.h>
+
+struct reg_cell {
+	unsigned int r0;
+	unsigned int r1;
+};
+
+int fdt_del_subnodes(const void *blob, int parent_offset)
+{
+	int off, ndepth;
+	int ret;
+
+	for (ndepth = 0, off = fdt_next_node(blob, parent_offset, &ndepth);
+	     (off >= 0) && (ndepth > 0);
+	     off = fdt_next_node(blob, off, &ndepth)) {
+		if (ndepth == 1) {
+			debug("delete %s: offset: %x\n",
+				fdt_get_name(blob, off, 0), off);
+			ret = fdt_del_node((void *)blob, off);
+			if (ret < 0) {
+				printf("Can't delete node: %s\n",
+					fdt_strerror(ret));
+				return ret;
+			} else {
+				ndepth = 0;
+				off = parent_offset;
+			}
+		}
+	}
+	return 0;
+}
+
+int fdt_increase_size(void *fdt, int add_len)
+{
+	int newlen;
+
+	newlen = fdt_totalsize(fdt) + add_len;
+
+	/* Open in place with a new len */
+	return fdt_open_into(fdt, fdt, newlen);
+}
+
+int fdt_del_partitions(void *blob, int parent_offset)
+{
+	const void *prop;
+	int ndepth = 0;
+	int off;
+	int ret;
+
+	off = fdt_next_node(blob, parent_offset, &ndepth);
+	if (off > 0 && ndepth == 1) {
+		prop = fdt_getprop(blob, off, "label", NULL);
+		if (prop == NULL) {
+			/*
+			 * Could not find label property, nand {}; node?
+			 * Check subnode, delete partitions there if any.
+			 */
+			return fdt_del_partitions(blob, off);
+		} else {
+			ret = fdt_del_subnodes(blob, parent_offset);
+			if (ret < 0) {
+				printf("Can't remove subnodes: %s\n",
+					fdt_strerror(ret));
+				return ret;
+			}
+		}
+	}
+	return 0;
+}
+
+int fdt_node_set_part_info(void *blob, int parent_offset,
+			   struct mtd_device *dev)
+{
+	struct list_head *pentry;
+	struct part_info *part;
+	struct reg_cell cell;
+	int off, ndepth = 0;
+	int part_num, ret;
+	char buf[64];
+
+	ret = fdt_del_partitions(blob, parent_offset);
+	if (ret < 0)
+		return ret;
+
+	/*
+	 * Check if it is nand {}; subnode, adjust
+	 * the offset in this case
+	 */
+	off = fdt_next_node(blob, parent_offset, &ndepth);
+	if (off > 0 && ndepth == 1)
+		parent_offset = off;
+
+	part_num = 0;
+	list_for_each_prev(pentry, &dev->parts) {
+		int newoff;
+
+		part = list_entry(pentry, struct part_info, link);
+
+		debug("%2d: %-20s0x%08x\t0x%08x\t%d\n",
+			part_num, part->name, part->size,
+			part->offset, part->mask_flags);
+
+		sprintf(buf, "partition@%x", part->offset);
+add_sub:
+		ret = fdt_add_subnode(blob, parent_offset, buf);
+		if (ret == -FDT_ERR_NOSPACE) {
+			ret = fdt_increase_size(blob, 512);
+			if (!ret)
+				goto add_sub;
+			else
+				goto err_size;
+		} else if (ret < 0) {
+			printf("Can't add partition node: %s\n",
+				fdt_strerror(ret));
+			return ret;
+		}
+		newoff = ret;
+
+		/* Check MTD_WRITEABLE_CMD flag */
+		if (part->mask_flags & 1) {
+add_ro:
+			ret = fdt_setprop(blob, newoff, "read_only", NULL, 0);
+			if (ret == -FDT_ERR_NOSPACE) {
+				ret = fdt_increase_size(blob, 512);
+				if (!ret)
+					goto add_ro;
+				else
+					goto err_size;
+			} else if (ret < 0)
+				goto err_prop;
+		}
+
+		cell.r0 = cpu_to_fdt32(part->offset);
+		cell.r1 = cpu_to_fdt32(part->size);
+add_reg:
+		ret = fdt_setprop(blob, newoff, "reg", &cell, sizeof(cell));
+		if (ret == -FDT_ERR_NOSPACE) {
+			ret = fdt_increase_size(blob, 512);
+			if (!ret)
+				goto add_reg;
+			else
+				goto err_size;
+		} else if (ret < 0)
+			goto err_prop;
+
+add_label:
+		ret = fdt_setprop_string(blob, newoff, "label", part->name);
+		if (ret == -FDT_ERR_NOSPACE) {
+			ret = fdt_increase_size(blob, 512);
+			if (!ret)
+				goto add_label;
+			else
+				goto err_size;
+		} else if (ret < 0)
+			goto err_prop;
+
+		part_num++;
+	}
+	return 0;
+err_size:
+	printf("Can't increase blob size: %s\n", fdt_strerror(ret));
+	return ret;
+err_prop:
+	printf("Can't add property: %s\n", fdt_strerror(ret));
+	return ret;
+}
+
+/*
+ * Update partitions in nor/nand nodes using info from
+ * mtdparts environment variable. The nodes to update are
+ * specified by node_info structure which contains mtd device
+ * type and compatible string: E. g. the board code in
+ * ft_board_setup() could use:
+ *
+ *	struct node_info nodes[] = {
+ *		{ "fsl,mpc5121-nfc",    MTD_DEV_TYPE_NAND, },
+ *		{ "cfi-flash",          MTD_DEV_TYPE_NOR,  },
+ *	};
+ *
+ *	fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
+ */
+void fdt_fixup_mtdparts(void *blob, void *node_info, int node_info_size)
+{
+	struct node_info *ni = node_info;
+	struct mtd_device *dev;
+	char *parts;
+	int i, idx;
+	int noff;
+
+	parts = getenv("mtdparts");
+	if (!parts)
+		return;
+
+	if (mtdparts_init() != 0)
+		return;
+
+	for (i = 0; i < node_info_size; i++) {
+		idx = 0;
+		noff = fdt_node_offset_by_compatible(blob, -1, ni[i].compat);
+		while (noff != -FDT_ERR_NOTFOUND) {
+			debug("%s: %s, mtd dev type %d\n",
+				fdt_get_name(blob, noff, 0),
+				ni[i].compat, ni[i].type);
+			dev = device_find(ni[i].type, idx++);
+			if (dev) {
+				if (fdt_node_set_part_info(blob, noff, dev))
+					return; /* return on error */
+			}
+
+			/* Jump to next flash node */
+			noff = fdt_node_offset_by_compatible(blob, noff,
+							     ni[i].compat);
+		}
+	}
+}
+#endif
diff --git a/include/fdt_support.h b/include/fdt_support.h
index 0a9dd0d..a3d5f8c 100644
--- a/include/fdt_support.h
+++ b/include/fdt_support.h
@@ -81,5 +81,7 @@ int fdt_resize(void *blob);
 
 int fdt_fixup_nor_flash_size(void *blob, int cs, u32 size);
 
+void fdt_fixup_mtdparts(void *fdt, void *node_info, int node_info_size);
+
 #endif /* ifdef CONFIG_OF_LIBFDT */
 #endif /* ifndef __FDT_SUPPORT_H */
diff --git a/include/jffs2/load_kernel.h b/include/jffs2/load_kernel.h
index 8b2720e..906eb3d 100644
--- a/include/jffs2/load_kernel.h
+++ b/include/jffs2/load_kernel.h
@@ -78,5 +78,6 @@ struct mtdids {
 extern int mtdparts_init(void);
 extern int find_dev_and_part(const char *id, struct mtd_device **dev,
 				u8 *part_num, struct part_info **part);
+extern struct mtd_device *device_find(u8 type, u8 num);
 
 #endif /* load_kernel_h */
diff --git a/include/mtd_node.h b/include/mtd_node.h
new file mode 100644
index 0000000..5aae085
--- /dev/null
+++ b/include/mtd_node.h
@@ -0,0 +1,11 @@
+#ifndef _NODE_INFO
+#define _NODE_INFO
+
+/*
+ * Info we use to search for a flash node in DTB.
+ */
+struct node_info {
+	const char *compat;	/* compatible string */
+	int type;		/* mtd flash type */
+};
+#endif
-- 
1.6.3.3

[U-Boot] [PATCH v2 5/7] mpc5121: add common post_word_load/store code

[Anatolij Gustschin]

Add common post_word_load/post_word_store routines
for all mpc5121 boards. pdm360ng board support added
by subsequent patches needs these, as it adds a board
specific POST test.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
---
This patch is new in this series. This code was in board
support file in v1 patch series. Now it is common for
mpc512x boards.

 cpu/mpc512x/Makefile   |    1 +
 cpu/mpc512x/commproc.c |   25 +++++++++++++++++++++++++
 2 files changed, 26 insertions(+), 0 deletions(-)
 create mode 100644 cpu/mpc512x/commproc.c

diff --git a/cpu/mpc512x/Makefile b/cpu/mpc512x/Makefile
index 427db7a..d609cd6 100644
--- a/cpu/mpc512x/Makefile
+++ b/cpu/mpc512x/Makefile
@@ -29,6 +29,7 @@ LIB	= $(obj)lib$(CPU).a
 START	= start.o
 COBJS-y	:= cpu.o
 COBJS-y	+= traps.o
+COBJS-y += commproc.o
 COBJS-y += cpu_init.o
 COBJS-y += fixed_sdram.o
 COBJS-y += i2c.o
diff --git a/cpu/mpc512x/commproc.c b/cpu/mpc512x/commproc.c
new file mode 100644
index 0000000..180d323
--- /dev/null
+++ b/cpu/mpc512x/commproc.c
@@ -0,0 +1,25 @@
+#include <common.h>
+#include <asm/io.h>
+
+#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER)
+
+#if defined(CONFIG_SYS_POST_WORD_ADDR)
+# define _POST_ADDR	(CONFIG_SYS_POST_WORD_ADDR)
+#else
+#error echo "No POST word address defined"
+#endif
+
+void post_word_store(ulong a)
+{
+	volatile void *save_addr = (volatile void *)(_POST_ADDR);
+
+	out_be32(save_addr, a);
+}
+
+ulong post_word_load(void)
+{
+	volatile void *save_addr = (volatile void *)(_POST_ADDR);
+
+	return in_be32(save_addr);
+}
+#endif  /* CONFIG_POST || CONFIG_LOGBUFFER */
-- 
1.6.3.3

[U-Boot] [PATCH v2 6/7] mpc5121: add support for PDM360NG board

[Anatolij Gustschin]

PDM360NG is a MPC5121E based board by ifm ecomatic gmbh.

Signed-off-by: Michael Weiss <michael.weiss@ifm.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
---
Changes since first version:
 - don't include RLE8 bitmap support in DIU code,
   now it is in common code submitted to U-Boot ML
   as separate patch. It is also extended to support
   more video formats.
 - fixed e-mail format
 - keep the list of targets sorted in the Makefile
 - move POST code into separate file
 - move post_word_load/store code to common file for
   all mpc512x boards
 - create a file with common board config options
   for mpc512x boards which can be included in the
   board config file.
 - use cfb_console driver for frame buffer support
 - allow configuration of coprocessor communication
   parameters (baudrate, wait delay) in the board config
   file

 MAKEALL                             |    1 +
 Makefile                            |    3 +
 board/freescale/common/fsl_diu_fb.c |   29 ++-
 board/pdm360ng/Makefile             |   52 ++++
 board/pdm360ng/config.mk            |   24 ++
 board/pdm360ng/pdm360ng.c           |  525 +++++++++++++++++++++++++++++++++++
 board/pdm360ng/post.c               |   75 +++++
 cpu/mpc512x/diu.c                   |   14 +-
 include/configs/mpc5121-common.h    |   52 ++++
 include/configs/pdm360ng.h          |  520 ++++++++++++++++++++++++++++++++++
 include/post.h                      |    1 +
 post/tests.c                        |    4 +
 12 files changed, 1294 insertions(+), 6 deletions(-)
 create mode 100644 board/pdm360ng/Makefile
 create mode 100644 board/pdm360ng/config.mk
 create mode 100644 board/pdm360ng/pdm360ng.c
 create mode 100644 board/pdm360ng/post.c
 create mode 100644 include/configs/mpc5121-common.h
 create mode 100644 include/configs/pdm360ng.h

diff --git a/MAKEALL b/MAKEALL
index beacb5f..deda7e1 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -93,6 +93,7 @@ LIST_512x="		\
 	aria		\
 	mecp5123	\
 	mpc5121ads	\
+	pdm360ng	\
 "
 
 #########################################################################
diff --git a/Makefile b/Makefile
index d801e25..1068e6a 100644
--- a/Makefile
+++ b/Makefile
@@ -828,6 +828,9 @@ mpc5121ads_rev2_config	\
 	fi
 	@$(MKCONFIG) -a mpc5121ads ppc mpc512x mpc5121ads freescale
 
+pdm360ng_config:	unconfig
+	@$(MKCONFIG) -a pdm360ng ppc mpc512x pdm360ng
+
 #########################################################################
 ## MPC8xx Systems
 #########################################################################
diff --git a/board/freescale/common/fsl_diu_fb.c b/board/freescale/common/fsl_diu_fb.c
index 2fc878b..ae5e7a7 100644
--- a/board/freescale/common/fsl_diu_fb.c
+++ b/board/freescale/common/fsl_diu_fb.c
@@ -50,6 +50,22 @@ struct fb_videomode {
 #define FB_SYNC_COMP_HIGH_ACT	8	/* composite sync high active   */
 #define FB_VMODE_NONINTERLACED  0	/* non interlaced */
 
+/* This setting is used for the ifm pdm360ng with PRIMEVIEW PM070WL3 */
+static struct fb_videomode fsl_diu_mode_800 = {
+	.refresh	= 60,
+	.xres		= 800,
+	.yres		= 480,
+	.pixclock	= 31250,
+	.left_margin	= 86,
+	.right_margin	= 42,
+	.upper_margin	= 33,
+	.lower_margin	= 10,
+	.hsync_len	= 128,
+	.vsync_len	= 2,
+	.sync		= FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
+	.vmode		= FB_VMODE_NONINTERLACED
+};
+
 /*
  * These parameters give default parameters
  * for video output 1024x768,
@@ -210,9 +226,14 @@ int fsl_diu_init(int xres,
 
 	disable_lcdc();
 
-	if (xres == 1280) {
+	switch (xres) {
+	case 800:
+		fsl_diu_mode_db = &fsl_diu_mode_800;
+		break;
+	case 1280:
 		fsl_diu_mode_db = &fsl_diu_mode_1280;
-	} else {
+		break;
+	default:
 		fsl_diu_mode_db = &fsl_diu_mode_1024;
 	}
 
@@ -519,9 +540,9 @@ int fsl_diu_display_bmp(unsigned char *bmp,
 				b = *bitmap++;
 				for (k = 0; k < 8; k++) {
 					if (b & 0x80)
-						*fb_t = palette[1];
+						*fb_t++ = palette[1];
 					else
-						*fb_t = palette[0];
+						*fb_t++ = palette[0];
 					b = b << 1;
 				}
 			}
diff --git a/board/pdm360ng/Makefile b/board/pdm360ng/Makefile
new file mode 100644
index 0000000..113ac0a
--- /dev/null
+++ b/board/pdm360ng/Makefile
@@ -0,0 +1,52 @@
+#
+# (C) Copyright 2007
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).a
+
+COBJS-y	:= $(BOARD).o
+COBJS-$(CONFIG_HAS_POST)	+= post.o
+
+COBJS	:= $(COBJS-y)
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	$(obj).depend $(OBJS)
+	$(AR) $(ARFLAGS) $@ $(OBJS)
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak $(obj).depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/pdm360ng/config.mk b/board/pdm360ng/config.mk
new file mode 100644
index 0000000..56337e4
--- /dev/null
+++ b/board/pdm360ng/config.mk
@@ -0,0 +1,24 @@
+#
+# (C) Copyright 2009
+#  Michael Wei??, ifm ecomatic gmbh, michael.weiss at ifm.com
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+TEXT_BASE  =   0xF0000000
diff --git a/board/pdm360ng/pdm360ng.c b/board/pdm360ng/pdm360ng.c
new file mode 100644
index 0000000..ed95eb4
--- /dev/null
+++ b/board/pdm360ng/pdm360ng.c
@@ -0,0 +1,525 @@
+/*
+ * (C) Copyright 2009 Wolfgang Denk <wd@denx.de>
+ *
+ * (C) Copyright 2009
+ * Michael Wei??, ifm ecomatic gmbh, michael.weiss at ifm.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <common.h>
+#include <asm/bitops.h>
+#include <command.h>
+#include <asm/io.h>
+#include <asm/processor.h>
+#include <asm/mpc512x.h>
+#include <fdt_support.h>
+#ifdef CONFIG_MISC_INIT_R
+#include <i2c.h>
+#endif
+#include <serial.h>
+#include <post.h>
+#include <jffs2/load_kernel.h>
+#include <mtd_node.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* Clocks in use */
+#define SCCR1_CLOCKS_EN	(CLOCK_SCCR1_CFG_EN |				\
+			 CLOCK_SCCR1_LPC_EN |				\
+			 CLOCK_SCCR1_NFC_EN |				\
+			 CLOCK_SCCR1_PSC_EN(CONFIG_PSC_CONSOLE) |	\
+			 CLOCK_SCCR1_PSCFIFO_EN |			\
+			 CLOCK_SCCR1_DDR_EN |				\
+			 CLOCK_SCCR1_FEC_EN |				\
+			 CLOCK_SCCR1_TPR_EN)
+
+#define SCCR2_CLOCKS_EN	(CLOCK_SCCR2_MEM_EN |		\
+			 CLOCK_SCCR2_SPDIF_EN |		\
+			 CLOCK_SCCR2_DIU_EN |		\
+			 CLOCK_SCCR2_I2C_EN)
+
+int board_early_init_f(void)
+{
+	volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
+
+	/*
+	 * Initialize Local Window for FLASH-Bank1 access (CS1)
+	 */
+	out_be32(&im->sysconf.lpcs1aw,
+		CSAW_START(CONFIG_SYS_FLASH1_BASE) |
+		CSAW_STOP(CONFIG_SYS_FLASH1_BASE, CONFIG_SYS_FLASH1_SIZE)
+	);
+	out_be32(&im->lpc.cs_cfg[1], CONFIG_SYS_CS1_CFG);
+
+	/*
+	 * Local Window for MRAM access (CS2)
+	 */
+	out_be32(&im->sysconf.lpcs2aw,
+		CSAW_START(CONFIG_SYS_MRAM_BASE) |
+		CSAW_STOP(CONFIG_SYS_MRAM_BASE, CONFIG_SYS_MRAM_SIZE)
+	);
+	out_be32(&im->lpc.cs_cfg[2], CONFIG_SYS_CS2_CFG);
+
+	sync_law(&im->sysconf.lpcs2aw);
+
+	/*
+	 * Configure Flash Speed
+	 */
+	out_be32(&im->lpc.cs_cfg[0], CONFIG_SYS_CS0_CFG);
+	out_be32(&im->lpc.altr, CONFIG_SYS_CS_ALETIMING);
+
+	/*
+	 * Enable clocks
+	 */
+	out_be32(&im->clk.sccr[0], SCCR1_CLOCKS_EN);
+	out_be32(&im->clk.sccr[1], SCCR2_CLOCKS_EN);
+#if defined(CONFIG_IIM) || defined(CONFIG_CMD_FUSE)
+	setbits_be32(&im->clk.sccr[1], CLOCK_SCCR2_IIM_EN);
+#endif
+
+	return 0;
+}
+
+phys_size_t initdram (int board_type)
+{
+	u32 pdm360ng_init_seq[] = {
+		CONFIG_SYS_DDRCMD_NOP,
+		CONFIG_SYS_DDRCMD_NOP,
+		CONFIG_SYS_DDRCMD_NOP,
+		CONFIG_SYS_DDRCMD_NOP,
+		CONFIG_SYS_DDRCMD_NOP,
+		CONFIG_SYS_DDRCMD_NOP,
+		CONFIG_SYS_DDRCMD_NOP,
+		CONFIG_SYS_DDRCMD_NOP,
+		CONFIG_SYS_DDRCMD_NOP,
+		CONFIG_SYS_DDRCMD_NOP,
+		CONFIG_SYS_DDRCMD_PCHG_ALL,
+		CONFIG_SYS_DDRCMD_NOP,
+		CONFIG_SYS_DDRCMD_RFSH,
+		CONFIG_SYS_DDRCMD_NOP,
+		CONFIG_SYS_DDRCMD_RFSH,
+		CONFIG_SYS_DDRCMD_NOP,
+		CONFIG_SYS_MICRON_INIT_DEV_OP,
+		CONFIG_SYS_DDRCMD_NOP,
+		CONFIG_SYS_DDRCMD_EM2,
+		CONFIG_SYS_DDRCMD_NOP,
+		CONFIG_SYS_DDRCMD_PCHG_ALL,
+		CONFIG_SYS_DDRCMD_EM2,
+		CONFIG_SYS_DDRCMD_EM3,
+		CONFIG_SYS_DDRCMD_EN_DLL,
+		CONFIG_SYS_DDRCMD_RES_DLL,
+		CONFIG_SYS_DDRCMD_PCHG_ALL,
+		CONFIG_SYS_DDRCMD_RFSH,
+		CONFIG_SYS_DDRCMD_RFSH,
+		CONFIG_SYS_MICRON_INIT_DEV_OP,
+		CONFIG_SYS_DDRCMD_OCD_DEFAULT,
+		CONFIG_SYS_DDRCMD_OCD_EXIT,
+		CONFIG_SYS_DDRCMD_PCHG_ALL,
+		CONFIG_SYS_DDRCMD_NOP
+	};
+
+	return fixed_sdram(NULL, pdm360ng_init_seq,
+			   ARRAY_SIZE(pdm360ng_init_seq));
+}
+
+#if defined(CONFIG_SERIAL_MULTI)
+static int set_lcd_brightness(char *);
+#endif
+
+int misc_init_r(void)
+{
+	volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
+
+#ifdef CONFIG_FSL_DIU_FB
+# if	!(defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE))
+	mpc5121_diu_init();
+#endif
+#if defined(CONFIG_SERIAL_MULTI)
+	set_lcd_brightness(0);
+#endif
+	/* Switch LCD-Backlight and LVDS-Interface on */
+	setbits_be32(&im->gpio.gpdir, 0x01040000);
+	clrsetbits_be32(&im->gpio.gpdat, 0x01000000, 0x00040000);
+#endif
+
+#if defined(CONFIG_HARD_I2C)
+	if (!getenv("ethaddr")) {
+		uchar buf[6];
+		char mac[18];
+		int ret;
+
+		/* I2C-0 for on-board eeprom */
+		i2c_set_bus_num(CONFIG_SYS_I2C_EEPROM_BUS_NUM);
+
+		/* Read ethaddr from EEPROM */
+		ret = i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR,
+			       CONFIG_SYS_I2C_EEPROM_MAC_OFFSET, 1, buf, 6);
+		if (!ret) {
+			sprintf(mac, "%02X:%02X:%02X:%02X:%02X:%02X",
+				buf[0], buf[1], buf[2], buf[3], buf[4], buf[5]);
+			/* Owned by IFM ? */
+			if (strstr(mac, "00:02:01") != mac) {
+				printf("Illegal MAC address in EEPROM: %s\n",
+				       mac);
+			} else {
+				debug("Using MAC from I2C EEPROM: %s\n", mac);
+				setenv("ethaddr", mac);
+			}
+		} else {
+			printf("Error: Unable to read MAC from I2C"
+				" EEPROM at address %02X:%02X\n",
+				CONFIG_SYS_I2C_EEPROM_ADDR,
+				CONFIG_SYS_I2C_EEPROM_MAC_OFFSET);
+		}
+	}
+#endif /* defined(CONFIG_HARD_I2C) */
+
+	return 0;
+}
+
+static  iopin_t ioregs_init[] = {
+	/* FUNC1=LPC_CS4 */
+	{
+		offsetof(struct ioctrl512x, io_control_pata_ce1), 1, 0,
+		IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(1) |
+		IO_PIN_PUE(1) | IO_PIN_ST(0) | IO_PIN_DS(3)
+	},
+	/* FUNC1=CAN3_TX */
+	{
+		offsetof(struct ioctrl512x, io_control_pata_isolate), 1, 0,
+		IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
+	},
+	/* FUNC3=GPIO12 Sets Next 5 to GPIO pads */
+	/* GPIO12-GPIO16 */
+	{
+		offsetof(struct ioctrl512x, io_control_pata_ior), 5, 0,
+		IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
+	},
+	/* FUNC2=DIU_LD22 Sets Next 2 to DIU_LD pads */
+	/* DIU_LD22-DIU_LD23 */
+	{
+		offsetof(struct ioctrl512x, io_control_pci_ad31), 2, 0,
+		IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(1)
+	},
+	/* FUNC2=USB1_DATA7 Sets Next 12 to USB1 pads */
+	/* USB1_DATA7-USB1_DATA0, USB1_STOP, USB1_NEXT, USB1_CLK, USB1_DIR */
+	{
+		offsetof(struct ioctrl512x, io_control_pci_ad29), 12, 0,
+		IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(1)
+	},
+	/* FUNC1=VIU_DATA0 Sets Next 3 to VIU_DATA pads */
+	/* VIU_DATA0-VIU_DATA2 */
+	{
+		offsetof(struct ioctrl512x, io_control_pci_ad17), 3, 0,
+		IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(1)
+	},
+	/* FUNC2=FEC_TXD_0 */
+	{
+		offsetof(struct ioctrl512x, io_control_pci_ad14), 1, 0,
+		IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(1)
+	},
+	/* FUNC1=VIU_DATA3 Sets Next 2 to VIU_DATA pads */
+	/* VIU_DATA3, VIU_DATA4 */
+	{
+		offsetof(struct ioctrl512x, io_control_pci_ad13), 2, 0,
+		IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(1)
+	},
+	/* FUNC2=FEC_RXD_1 Sets Next 12 to FEC pads */
+	/* FEC_RXD_1, FEC_RXD_0, FEC_RX_CLK, FEC_TX_CLK, FEC_RX_ER, FEC_RX_DV */
+	/* FEC_TX_EN, FEC_TX_ER, FEC_CRS, FEC_MDC, FEC_MDIO, FEC_COL */
+	{
+		offsetof(struct ioctrl512x, io_control_pci_ad11), 12, 0,
+		IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(1)
+	},
+	/* FUNC2=DIU_LD03 Sets Next 25 to DIU pads */
+	/* DIU_LD00-DIU_LD21 */
+	{
+		offsetof(struct ioctrl512x, io_control_pci_cbe0), 22, 0,
+		IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(1)
+	},
+	/* FUNC2=DIU_CLK Sets Next 3 to DIU pads */
+	/* DIU_CLK, DIU_VSYNC, DIU_HSYNC */
+	{
+		offsetof(struct ioctrl512x, io_control_spdif_txclk), 3, 0,
+		IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
+	},
+	/* FUNC2=CAN3_RX */
+	{
+		offsetof(struct ioctrl512x, io_control_irq1), 1, 0,
+		IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
+	},
+	/* Sets lowest slew on 2 CAN_TX Pins*/
+	{
+		offsetof(struct ioctrl512x, io_control_can1_tx), 2, 0,
+		IO_PIN_FMUX(0) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
+	},
+	/* FUNC3=CAN4_TX Sets Next 2 to CAN4 pads */
+	/* CAN4_TX, CAN4_RX */
+	{
+		offsetof(struct ioctrl512x, io_control_j1850_tx), 2, 0,
+		IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
+	},
+	/* FUNC3=GPIO8 Sets Next 2 to GPIO pads */
+	/* GPIO8, GPIO9 */
+	{
+		offsetof(struct ioctrl512x, io_control_psc0_0), 2, 0,
+		IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
+	},
+	/* FUNC1=FEC_TXD_1 Sets Next 3 to FEC pads */
+	/* FEC_TXD_1, FEC_TXD_2, FEC_TXD_3 */
+	{
+		offsetof(struct ioctrl512x, io_control_psc0_4), 3, 0,
+		IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
+	},
+	/* FUNC1=FEC_RXD_3 Sets Next 2 to FEC pads */
+	/* FEC_RXD_3, FEC_RXD_2 */
+	{
+		offsetof(struct ioctrl512x, io_control_psc1_4), 2, 0,
+		IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
+	},
+	/* FUNC3=GPIO17 */
+	{
+		offsetof(struct ioctrl512x, io_control_psc2_1), 1, 0,
+		IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
+	},
+	/* FUNC3=GPIO2/GPT2 Sets Next 3 to GPIO pads */
+	/* GPIO2, GPIO20, GPIO21 */
+	{
+		offsetof(struct ioctrl512x, io_control_psc2_4), 3, 0,
+		IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
+	},
+	/* FUNC2=VIU_PIX_CLK */
+	{
+		offsetof(struct ioctrl512x, io_control_psc3_4), 1, 0,
+		IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
+	},
+	/* FUNC3=GPIO24 Sets Next 2 to GPIO pads */
+	/* GPIO24, GPIO25 */
+	{
+		offsetof(struct ioctrl512x, io_control_psc4_0), 2, 0,
+		IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
+	},
+	/* FUNC1=NFC_CE2 */
+	{
+		offsetof(struct ioctrl512x, io_control_psc4_4), 1, 0,
+		IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(1) |
+		IO_PIN_PUE(1) | IO_PIN_ST(0) | IO_PIN_DS(0)
+	},
+	/* FUNC2=VIU_DATA5 Sets Next 5 to VIU_DATA pads */
+	/* VIU_DATA5-VIU_DATA9 */
+	{
+		offsetof(struct ioctrl512x, io_control_psc5_0), 5, 0,
+		IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
+	},
+	/* FUNC1=LPC_TSIZ1 Sets Next 2 to LPC_TSIZ pads */
+	/* LPC_TSIZ1-LPC_TSIZ2 */
+	{
+		offsetof(struct ioctrl512x, io_control_psc6_0), 2, 0,
+		IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
+	},
+	/* FUNC1=LPC_TS */
+	{
+		offsetof(struct ioctrl512x, io_control_psc6_4), 1, 0,
+		IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
+	},
+	/* FUNC3=GPIO16 Sets Next 5 to GPIO pads */
+	/* GPIO16-GPIO19, GPT7/GPIO7 */
+	{
+		offsetof(struct ioctrl512x, io_control_psc7_0), 5, 0,
+		IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
+	},
+	/* FUNC3=GPIO20 Sets Next 2 to GPIO pads */
+	/* GPIO20, GPIO21 */
+	{
+		offsetof(struct ioctrl512x, io_control_psc8_0), 2, 0,
+		IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
+	},
+	/* FUNC3=GPIO0/GPT0 */
+	{
+		offsetof(struct ioctrl512x, io_control_psc8_4), 1, 0,
+		IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
+	},
+	/* FUNC3=GPIO8 Sets Next 2 to GPIO pads */
+	/* GPIO8, GPIO9 */
+	{
+		offsetof(struct ioctrl512x, io_control_psc10_0), 2, 0,
+		IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
+	},
+	/* FUNC3=GPIO2/GPT2 Sets Next 3 to GPIO pads */
+	/* GPIO2, GPIO12, GPIO13 */
+	{
+		offsetof(struct ioctrl512x, io_control_psc10_4), 3, 0,
+		IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
+	},
+	/* FUNC2=DIU_DE */
+	{
+		offsetof(struct ioctrl512x, io_control_psc11_4), 1, 0,
+		IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
+	}
+};
+
+int checkboard (void)
+{
+	volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
+
+	puts("Board: PDM360NG\n");
+
+	/* initialize function mux & slew rate IO inter alia on IO Pins  */
+
+	iopin_initialize(ioregs_init, ARRAY_SIZE(ioregs_init));
+
+	/* initialize IO_CONTROL_GP (GPIO/GPT-mux-register) */
+	setbits_be32(&im->io_ctrl.io_control_gp, (1 << 0)); /* GP_MUX7->GPIO7 */
+
+	/* configure GPIO24 (VIU_CE), output/high */
+	setbits_be32(&im->gpio.gpdir, 0x80);
+	setbits_be32(&im->gpio.gpdat, 0x80);
+
+	return 0;
+}
+
+#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
+#ifdef CONFIG_FDT_FIXUP_PARTITIONS
+struct node_info nodes[] = {
+	{ "fsl,mpc5121-nfc",	MTD_DEV_TYPE_NAND, },
+	{ "cfi-flash",		MTD_DEV_TYPE_NOR,  },
+};
+#endif
+
+void ft_board_setup(void *blob, bd_t *bd)
+{
+	ft_cpu_setup(blob, bd);
+	fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
+#ifdef CONFIG_FDT_FIXUP_PARTITIONS
+	fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
+#endif
+}
+#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */
+
+#if defined(CONFIG_SERIAL_MULTI)
+/*
+ * If argument is NULL, set the LCD brightness to the
+ * value from "brightness" environment variable. Set
+ * the LCD brightness to the value specified by the
+ * argument otherwise. Default brightness is zero.
+ */
+#define MAX_BRIGHTNESS	99
+static int set_lcd_brightness(char *brightness)
+{
+	struct stdio_dev *cop_port;
+	char *env;
+	char cmd_buf[20];
+	int val = 0;
+	int cs = 0;
+	int len, i;
+
+	if (brightness) {
+		val = simple_strtol(brightness, NULL, 10);
+	} else {
+		env = getenv("brightness");
+		if (env)
+			val = simple_strtol(env, NULL, 10);
+	}
+
+	if (val < 0)
+		val = 0;
+
+	if (val > MAX_BRIGHTNESS)
+		val = MAX_BRIGHTNESS;
+
+	sprintf(cmd_buf, "$SB;%04d;", val);
+
+	len = strlen(cmd_buf);
+	for (i = 1; i <= len; i++)
+		cs += cmd_buf[i];
+
+	cs = (~cs + 1) & 0xff;
+	sprintf(cmd_buf + len, "%02X\n", cs);
+
+	/* IO Coprocessor communication */
+	cop_port = open_port(4, CONFIG_SYS_PDM360NG_COPROC_BAUDRATE);
+	if (!cop_port) {
+		printf("Error: Can't open IO Coprocessor port.\n");
+		return -1;
+	}
+
+	debug("%s: cmd: %s", __func__, cmd_buf);
+	write_port(cop_port, cmd_buf);
+	/*
+	 * Wait for transmission and maybe response data
+	 * before closing the port.
+	 */
+	udelay(CONFIG_SYS_PDM360NG_COPROC_READ_DELAY);
+	memset(cmd_buf, 0, sizeof(cmd_buf));
+	len = read_port(cop_port, cmd_buf, sizeof(cmd_buf));
+	if (len)
+		printf("Error: %s\n", cmd_buf);
+
+	close_port(4);
+
+	return 0;
+}
+
+static int cmd_lcd_brightness(cmd_tbl_t *cmdtp, int flag,
+			      int argc, char *argv[])
+{
+	if (argc < 2) {
+		cmd_usage(cmdtp);
+		return 1;
+	}
+
+	return set_lcd_brightness(argv[1]);
+}
+
+U_BOOT_CMD(lcdbr, 2, 1, cmd_lcd_brightness,
+	"set LCD brightness",
+	"<brightness> - set LCD backlight level to <brightness>.\n"
+);
+#endif /* CONFIG_SERIAL_MULTI */
diff --git a/board/pdm360ng/post.c b/board/pdm360ng/post.c
new file mode 100644
index 0000000..8e47c5e
--- /dev/null
+++ b/board/pdm360ng/post.c
@@ -0,0 +1,75 @@
+/*
+ * Co-Processor communication POST
+ */
+
+#include <common.h>
+#include <post.h>
+#include <serial.h>
+
+#if defined(CONFIG_SERIAL_MULTI)
+
+/*
+ * Actually the termination sequence of the coprocessor
+ * commands is "\r\n" (CR LF), but here we use a side effect of
+ * the putc() routine of the serial driver which checks for LF
+ * and sends CR before sending LF. Therefore the termination
+ * sequence in the command below is only "\n".
+ * "alive" string is the coprocessor response for ping command
+ * and not a command, therefore it is terminated with "\r\n".
+ */
+char alive[] = "$AL;38\r\n";
+char ping[] = "$PI;2C\n";
+
+int pdm360ng_coprocessor_post_test(int flags)
+{
+	struct stdio_dev *cop_port;
+	int ret;
+	char buf[10];
+
+	/* Test IO Coprocessor communication */
+	cop_port = open_port(4, CONFIG_SYS_PDM360NG_COPROC_BAUDRATE);
+	if (!cop_port)
+		return -1;
+
+	write_port(cop_port, ping);
+	udelay(CONFIG_SYS_PDM360NG_COPROC_READ_DELAY);
+
+	memset(buf, 0, sizeof(buf));
+	ret = read_port(cop_port, buf, sizeof(buf));
+	close_port(4);
+	if (ret <= 0) {
+		post_log("Error: Can't read IO Coprocessor port.\n");
+		return -1;
+	}
+
+	if (strcmp(buf, alive)) {
+		post_log("Error: IO-Cop. resp.: %s\n", buf);
+		return -1;
+	}
+
+	/* Test WD Coprocessor communication */
+	cop_port = open_port(1, CONFIG_SYS_PDM360NG_COPROC_BAUDRATE);
+	if (!cop_port) {
+		post_log("Error: Can't open WD Coprocessor port.\n");
+		return -1;
+	}
+
+	write_port(cop_port, ping);
+	udelay(CONFIG_SYS_PDM360NG_COPROC_READ_DELAY);
+
+	memset(buf, 0, sizeof(buf));
+	ret = read_port(cop_port, buf, sizeof(buf));
+	close_port(1);
+	if (ret <= 0) {
+		post_log("Error: Can't read WD Coprocessor port.\n");
+		return -1;
+	}
+
+	if (strcmp(buf, alive)) {
+		post_log("Error: WD-Cop. resp.: %s\n", buf);
+		return -1;
+	}
+
+	return 0;
+}
+#endif	/* CONFIG_SERIAL_MULTI */
diff --git a/cpu/mpc512x/diu.c b/cpu/mpc512x/diu.c
index a24f395..fc43a9d 100644
--- a/cpu/mpc512x/diu.c
+++ b/cpu/mpc512x/diu.c
@@ -68,8 +68,13 @@ char *valid_bmp(char *addr)
 	unsigned long h_addr;
 
 	h_addr = simple_strtoul(addr, NULL, 16);
-	if (h_addr < CONFIG_SYS_FLASH_BASE ||
-			h_addr >= (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - 1)) {
+	if ((h_addr < CONFIG_SYS_FLASH_BASE ||
+		h_addr >= (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - 1))
+#if defined(CONFIG_SYS_FLASH1_BASE) && defined(CONFIG_SYS_FLASH1_SIZE)
+	   && (h_addr < CONFIG_SYS_FLASH1_BASE ||
+	       h_addr >= (CONFIG_SYS_FLASH1_BASE + CONFIG_SYS_FLASH1_SIZE - 1))
+#endif
+	) {
 		printf("bmp addr %lx is not a valid flash address\n", h_addr);
 		return 0;
 	} else if ((*(char *)(h_addr) != 'B') || (*(char *)(h_addr+1) != 'M')) {
@@ -85,8 +90,13 @@ int mpc5121_diu_init(void)
 	char *bmp = NULL;
 	char *bmp_env;
 
+#ifdef CONFIG_PDM360NG
+	xres = 800;
+	yres = 480;
+#else
 	xres = 1024;
 	yres = 768;
+#endif
 	pixel_format = 0x88883316;
 
 	debug("mpc5121_diu_init\n");
diff --git a/include/configs/mpc5121-common.h b/include/configs/mpc5121-common.h
new file mode 100644
index 0000000..2bc9041
--- /dev/null
+++ b/include/configs/mpc5121-common.h
@@ -0,0 +1,52 @@
+/*
+ * (C) Copyright 2010 DENX Software Engineering
+ * Anatolij Gustschin <agust@denx.de>
+ *
+ * Common configuration options for MPC5121 based boards
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __MPC5121_COMMON_H
+#define __MPC5121_COMMON_H
+
+/* Use SRAM for initial stack */
+#define CONFIG_SYS_INIT_RAM_ADDR	CONFIG_SYS_SRAM_BASE	/* Initial RAM address */
+#define CONFIG_SYS_INIT_RAM_END		CONFIG_SYS_SRAM_SIZE	/* End of used area in RAM */
+
+#define CONFIG_SYS_GBL_DATA_SIZE	0x100			/* num bytes initial data */
+#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_POST_WORD_ADDR	(CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
+#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_POST_WORD_ADDR
+
+#define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest region */
+#define CONFIG_SYS_MEMTEST_END		0x00400000
+
+/*
+ * Serial console
+ */
+#define CONFIG_BAUDRATE		115200
+#define CONFIG_SYS_BAUDRATE_TABLE \
+	{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
+
+#define CONFIG_CMDLINE_EDITING		1	/* command line history */
+/* Use the HUSH parser */
+#define CONFIG_SYS_HUSH_PARSER
+#ifdef CONFIG_SYS_HUSH_PARSER
+#define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
+#endif
+
+#endif /* __MPC5121_COMMON_H */
diff --git a/include/configs/pdm360ng.h b/include/configs/pdm360ng.h
new file mode 100644
index 0000000..e0fd56b
--- /dev/null
+++ b/include/configs/pdm360ng.h
@@ -0,0 +1,520 @@
+/*
+ * (C) Copyright 2009
+ * Michael Wei??, ifm ecomatic gmbh, <michael.weiss@ifm.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * pdm360ng board configuration file
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#undef DEBUG
+
+#define CONFIG_PDM360NG 1
+#define CONFIG_PDM360NG_BIG	/* PDM360NG with big memory */
+#undef CONFIG_PDM360NG_SMALL	/* PDM360NG with small memory */
+
+/*
+ * Memory map for the PDM360NG board:
+ *
+ * 0x0000_0000 - 0x1FFF_FFFF	DDR RAM (512 MB)
+ * 0x2000_0000 - 0x3FFF_FFFF	reserved (DDR RAM (512 MB)
+ * 0x5000_0000 - 0x5001_FFFF	SRAM (128 KB)
+ * 0x5004_0000 - 0x5005_FFFF	MRAM (CS2) (128 KB)
+ * 0x8000_0000 - 0x803F_FFFF	IMMR (4 MB)
+ * 0xF000_0000 - 0xF7FF_FFFF	NOR FLASH (CS0) (128 MB)
+ * 0xF800_0000 - 0xFFFF_FFFF	NOR FLASH (CS1) (128 MB)
+ */
+
+/*
+ * High Level Configuration Options
+ */
+#define CONFIG_E300		1	/* E300 Family */
+#define CONFIG_MPC512X		1	/* MPC512X family */
+#define CONFIG_FSL_DIU_FB	1	/* FSL DIU */
+#undef  CONFIG_FSL_DIU_LOGO_BMP		/* Don't include FSL DIU binary bmp */
+
+/* Used for silent command in environment */
+#define CONFIG_SYS_DEVICE_NULLDEV
+#define CONFIG_SILENT_CONSOLE
+
+/* Video */
+#define CONFIG_VIDEO
+
+#if defined(CONFIG_VIDEO)
+#define CONFIG_CFB_CONSOLE
+#define CONFIG_VGA_AS_SINGLE_DEVICE
+#define CONFIG_SPLASH_SCREEN
+#define CONFIG_VIDEO_LOGO
+#define CONFIG_VIDEO_BMP_RLE8
+#endif
+
+#define CONFIG_SYS_MPC512X_CLKIN	33333333	/* in Hz */
+
+#define CONFIG_BOARD_EARLY_INIT_F		/* call board_early_init_f() */
+#define CONFIG_MISC_INIT_R
+
+#define CONFIG_SYS_IMMR			0x80000000
+#define CONFIG_SYS_DIU_ADDR		((CONFIG_SYS_IMMR) + 0x2100)
+
+/*
+ * DDR Setup - manually set all parameters as there's no SPD etc.
+ */
+#ifdef CONFIG_PDM360NG_BIG
+#define CONFIG_SYS_DDR_SIZE		512		/* MB */
+#elif defined CONFIG_PDM360NG_SMALL
+#define CONFIG_SYS_DDR_SIZE		128		/* MB */
+#else
+#error No memory configuration level defined!
+#endif
+#define CONFIG_SYS_DDR_BASE		0x00000000	/* DDR is system memory*/
+#define CONFIG_SYS_SDRAM_BASE		CONFIG_SYS_DDR_BASE
+
+#define CONFIG_SYS_IOCTRL_MUX_DDR	0x00000012	/* DDR pin mux and slew rate */
+
+/* DDR Controller Configuration for Micron DDR2 SDRAM MT47H128M8-3
+ *
+ * SYS_CFG:
+ *	[31:31]	MDDRC Soft Reset:	Diabled
+ *	[30:30]	DRAM CKE pin:		Enabled
+ *	[29:29]	DRAM CLK:		Enabled
+ *	[28:28]	Command Mode:		Enabled (For initialization only)
+ *	[27:25]	DRAM Row Select:	dram_row[15:0] = magenta_address[25:10]
+ *	[24:21]	DRAM Bank Select:	dram_bank[1:0] = magenta_address[11:10]
+ *	[20:19]	Read Test:		DON'T USE
+ *	[18:18]	Self Refresh:		Enabled
+ *	[17:17]	16bit Mode:		Disabled
+ *	[16:13] Read Delay:		3
+ *	[12:12]	Half DQS Delay:		Disabled
+ *	[11:11]	Quarter DQS Delay:	Disabled
+ *	[10:08]	Write Delay:		2
+ *	[07:07]	Early ODT:		Disabled
+ *	[06:06]	On DIE Termination:	Enabled
+ *	[05:05]	FIFO Overflow Clear:	DON'T USE here
+ *	[04:04]	FIFO Underflow Clear:	DON'T USE here
+ *	[03:03]	FIFO Overflow Pending:	DON'T USE here
+ *	[02:02]	FIFO Underlfow Pending:	DON'T USE here
+ *	[01:01]	FIFO Overlfow Enabled:	Enabled
+ *	[00:00]	FIFO Underflow Enabled:	Enabled
+ * TIME_CFG0
+ *	[31:16]	DRAM Refresh Time:	0 CSB clocks
+ *	[15:8]	DRAM Command Time:	0 CSB clocks
+ *	[07:00]	DRAM Precharge Time:	0 CSB clocks
+ * TIME_CFG1
+ *	[31:26]	DRAM tRFC:
+ *	[25:21]	DRAM tWR1:
+ *	[20:17]	DRAM tWRT1:
+ *	[16:11]	DRAM tDRR:
+ *	[10:05]	DRAM tRC:
+ *	[04:00]	DRAM tRAS:
+ * TIME_CFG2
+ *	[31:28]	DRAM tRCD:
+ *	[27:23]	DRAM tFAW:
+ *	[22:19]	DRAM tRTW1:
+ *	[18:15]	DRAM tCCD:
+ *	[14:10] DRAM tRTP:
+ *	[09:05]	DRAM tRP:
+ *	[04:00] DRAM tRPA
+ */
+
+#ifdef CONFIG_PDM360NG_BIG
+#define CONFIG_SYS_MDDRC_SYS_CFG	0xEA804A40
+#define CONFIG_SYS_MDDRC_TIME_CFG0	0x030C3D2E
+#define CONFIG_SYS_MDDRC_TIME_CFG1	0x68EC1168
+#define CONFIG_SYS_MDDRC_TIME_CFG2	0x34310864
+
+#elif defined CONFIG_PDM360NG_SMALL
+#define CONFIG_SYS_MDDRC_SYS_CFG	0xE8604A40
+#define CONFIG_SYS_MDDRC_TIME_CFG0	0x030C3D2E
+#define CONFIG_SYS_MDDRC_TIME_CFG1	0x3CEC1168
+#define CONFIG_SYS_MDDRC_TIME_CFG2	0x33310863
+#else
+#error No memory configuration level defined!
+#endif
+
+#define CONFIG_SYS_MDDRC_SYS_CFG_EN	0xF0000000
+
+#define CONFIG_SYS_DDRCMD_NOP		0x01380000
+#define CONFIG_SYS_DDRCMD_PCHG_ALL	0x01100400
+#define CONFIG_SYS_DDRCMD_EM2		0x01020000  /* EMR2 */
+#define CONFIG_SYS_DDRCMD_EM3		0x01030000  /* EMR3 */
+#define CONFIG_SYS_DDRCMD_EN_DLL	0x01010040  /* EMR  with 150 ohm ODT todo: verify*/
+#define CONFIG_SYS_DDRCMD_RES_DLL	0x01000100
+#define CONFIG_SYS_DDRCMD_RFSH		0x01080000
+#define CONFIG_SYS_MICRON_INIT_DEV_OP	0x01000432
+#define CONFIG_SYS_DDRCMD_OCD_DEFAULT	0x010107C0  /* EMR  with 150 ohm ODT todo: verify*/
+#define CONFIG_SYS_DDRCMD_OCD_EXIT	0x01010440  /* EMR new command with 150 ohm ODT todo: verify*/
+
+/* DDR Priority Manager Configuration */
+#define CONFIG_SYS_MDDRCGRP_PM_CFG1	0x00077777
+#define CONFIG_SYS_MDDRCGRP_PM_CFG2	0x00000000
+#define CONFIG_SYS_MDDRCGRP_HIPRIO_CFG	0x00000001
+#define CONFIG_SYS_MDDRCGRP_LUT0_MU	0xFFEEDDCC
+#define CONFIG_SYS_MDDRCGRP_LUT0_ML	0xBBAAAAAA
+#define CONFIG_SYS_MDDRCGRP_LUT1_MU	0x66666666
+#define CONFIG_SYS_MDDRCGRP_LUT1_ML	0x55555555
+#define CONFIG_SYS_MDDRCGRP_LUT2_MU	0x44444444
+#define CONFIG_SYS_MDDRCGRP_LUT2_ML	0x44444444
+#define CONFIG_SYS_MDDRCGRP_LUT3_MU	0x55555555
+#define CONFIG_SYS_MDDRCGRP_LUT3_ML	0x55555558
+#define CONFIG_SYS_MDDRCGRP_LUT4_MU	0x11111111
+#define CONFIG_SYS_MDDRCGRP_LUT4_ML	0x11111122
+#define CONFIG_SYS_MDDRCGRP_LUT0_AU	0xaaaaaaaa
+#define CONFIG_SYS_MDDRCGRP_LUT0_AL	0xaaaaaaaa
+#define CONFIG_SYS_MDDRCGRP_LUT1_AU	0x66666666
+#define CONFIG_SYS_MDDRCGRP_LUT1_AL	0x66666666
+#define CONFIG_SYS_MDDRCGRP_LUT2_AU	0x11111111
+#define CONFIG_SYS_MDDRCGRP_LUT2_AL	0x11111111
+#define CONFIG_SYS_MDDRCGRP_LUT3_AU	0x11111111
+#define CONFIG_SYS_MDDRCGRP_LUT3_AL	0x11111111
+#define CONFIG_SYS_MDDRCGRP_LUT4_AU	0x11111111
+#define CONFIG_SYS_MDDRCGRP_LUT4_AL	0x11111111
+
+/*
+ * NOR FLASH on the Local Bus
+ */
+#define CONFIG_SYS_FLASH_CFI			/* use the Common Flash Interface */
+#define CONFIG_FLASH_CFI_DRIVER			/* use the CFI driver */
+
+#ifdef CONFIG_PDM360NG_BIG
+#define CONFIG_SYS_FLASH_BASE		0xF0000000 /* start of FLASH-Bank0   */
+#define CONFIG_SYS_FLASH1_BASE		0xF8000000 /* start of FLASH-Bank1  */
+#define CONFIG_SYS_FLASH_SIZE		0x08000000 /* max flash size of FLASH-Bank0 in bytes */
+#define CONFIG_SYS_FLASH1_SIZE		0x08000000 /* max flash size of FLASH-Bank1 in bytes */
+#define CONFIG_SYS_MAX_FLASH_SECT	512	   /* max sectors per device */
+						   /* 512 sectors with size 0x40000 for 128MB*/
+#elif defined CONFIG_PDM360NG_SMALL
+#define CONFIG_SYS_FLASH_BASE		0xF0000000 /* start of FLASH-Bank0   */
+#define CONFIG_SYS_FLASH1_BASE		0xF4000000 /* start of FLASH-Bank1  */
+#define CONFIG_SYS_FLASH_SIZE		0x04000000 /* max flash size of FLASH-Bank0 in bytes */
+#define CONFIG_SYS_FLASH1_SIZE		0x04000000 /* max flash size of FLASH-Bank1 in bytes */
+#define CONFIG_SYS_MAX_FLASH_SECT	256	   /* max sectors per device */
+						   /* 256 sectors with size 0x40000 for 64MB*/
+#else
+#error No memory configuration level defined!
+#endif
+
+#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
+#define CONFIG_SYS_MAX_FLASH_BANKS	2		/* number of banks */
+#define CONFIG_SYS_FLASH_BANKS_LIST	{CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH1_BASE}
+
+#undef CONFIG_SYS_FLASH_CHECKSUM
+
+#define CONFIG_SYS_SRAM_BASE		0x50000000
+#define CONFIG_SYS_SRAM_SIZE		0x00020000	/* 128 KB */
+
+#define CONFIG_SYS_CS0_CFG		0x05059350	/* ALE active low, data size 4bytes */
+#define CONFIG_SYS_CS1_CFG		0x05059350	/* ALE active low, data size 4bytes */
+
+#define CONFIG_SYS_MRAM_BASE		0x50040000
+#define CONFIG_SYS_MRAM_SIZE		0x00020000
+#define CONFIG_SYS_CS2_CFG		0x05059110	/* ALE active low, data size 4bytes */
+
+#define CONFIG_SYS_CS_ALETIMING		0x00000007	/* alt. CS timing for CS0, CS1, CS2 */
+
+/*
+ * NAND FLASH
+ */
+#define CONFIG_CMD_NAND			/* enable NAND support */
+#define CONFIG_NAND_MPC5121_NFC
+#define CONFIG_SYS_NAND_BASE            0x40000000
+
+#define CONFIG_SYS_MAX_NAND_DEVICE      1
+#define NAND_MAX_CHIPS                  CONFIG_SYS_MAX_NAND_DEVICE
+#define CONFIG_SYS_NAND_SELECT_DEVICE	/* driver supports mutipl. chips */
+
+/*
+ * Configuration parameters for MPC5121 NAND driver
+ */
+#define CONFIG_FSL_NFC_WIDTH 1
+#define CONFIG_FSL_NFC_WRITE_SIZE 2048
+#define CONFIG_FSL_NFC_SPARE_SIZE 64
+#define CONFIG_FSL_NFC_CHIPS CONFIG_SYS_MAX_NAND_DEVICE
+
+/*
+ * Dynamic MTD partition support
+ */
+#define CONFIG_CMD_MTDPARTS
+#define CONFIG_MTD_DEVICE	/* needed for mtdparts commands */
+#define CONFIG_FLASH_CFI_MTD
+#define MTDIDS_DEFAULT		"nor0=f0000000.flash,nor1=f8000000.flash," \
+						"nand0=MPC5121 NAND"
+
+/*
+ * Flash layout
+ */
+#define MTDPARTS_DEFAULT	"mtdparts=f0000000.flash:512k(u-boot),"	\
+						"256k(environment1),"	\
+						"256k(environment2),"	\
+						"256k(splash-factory)," \
+						"2m(FIT: recovery),"	\
+						"4608k(fs-recovery),"   \
+						"256k(splash-customer),"\
+						"5m(FIT: kernel+dtb),"	\
+						"64m(rootfs squash)ro,"	\
+						"51m(userfs ubi);"	\
+					"f8000000.flash:-(unused);"	\
+					"MPC5121 NAND:1024m(extended-userfs)"
+
+/*
+ * Override partitions in device tree using info
+ * in "mtdparts" environment variable
+ */
+#ifdef CONFIG_CMD_MTDPARTS
+#define CONFIG_FDT_FIXUP_PARTITIONS
+#endif
+
+#define CONFIG_SYS_MONITOR_BASE		TEXT_BASE		/* Start of monitor */
+#define CONFIG_SYS_MONITOR_LEN		(512 * 1024)		/* Reserve 512 kB for Mon */
+#ifdef	CONFIG_FSL_DIU_FB
+#define CONFIG_SYS_MALLOC_LEN		(6 * 1024 * 1024)	/* Reserved for malloc */
+#else
+#define CONFIG_SYS_MALLOC_LEN		(512 * 1024)
+#endif
+
+/*
+ * Serial Port
+ */
+#define CONFIG_CONS_INDEX     1
+#undef CONFIG_SERIAL_SOFTWARE_FIFO
+
+/*
+ * Serial console configuration
+ */
+#define CONFIG_PSC_CONSOLE	6	/* console is on PSC6 */
+#if CONFIG_PSC_CONSOLE != 6
+#error CONFIG_PSC_CONSOLE must be 6
+#endif
+
+#define CONSOLE_FIFO_TX_SIZE	FIFOC_PSC6_TX_SIZE
+#define CONSOLE_FIFO_TX_ADDR	FIFOC_PSC6_TX_ADDR
+#define CONSOLE_FIFO_RX_SIZE	FIFOC_PSC6_RX_SIZE
+#define CONSOLE_FIFO_RX_ADDR	FIFOC_PSC6_RX_ADDR
+
+/*
+ * Used PSC UART devices
+ */
+#define CONFIG_SERIAL_MULTI
+#define CONFIG_SYS_PSC1
+#define CONFIG_SYS_PSC4
+#define CONFIG_SYS_PSC6
+
+/*
+ * Co-processor communication parameters
+ */
+#define CONFIG_SYS_PDM360NG_COPROC_READ_DELAY	5000
+#define CONFIG_SYS_PDM360NG_COPROC_BAUDRATE	38400
+
+/*
+ * I2C
+ */
+#define CONFIG_HARD_I2C			/* I2C with hardware support */
+#undef CONFIG_SOFT_I2C			/* so disable bit-banged I2C */
+#define CONFIG_I2C_MULTI_BUS
+#define CONFIG_I2C_CMD_TREE
+#define CONFIG_SYS_I2C_SPEED		100000	/* I2C speed and slave address */
+#define CONFIG_SYS_I2C_SLAVE		0x7F
+
+/*
+ * IIM - IC Identification Module
+ */
+#undef CONFIG_IIM
+
+/*
+ * EEPROM configuration
+ */
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		2	/* 16-bit EEPROM address */
+#define CONFIG_SYS_I2C_EEPROM_ADDR		0x50	/* ST AT24C01 */
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	10	/* 10ms of delay */
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	4	/* 16-Byte Page Write Mode */
+/*
+ * MAC addr in EEPROM
+ */
+#define CONFIG_SYS_I2C_EEPROM_BUS_NUM		0
+#define CONFIG_SYS_I2C_EEPROM_MAC_OFFSET	0x10
+/*
+ * Enabled only to delete "ethaddr" before testing
+ * "ethaddr" setting from EEPROM
+ */
+#define CONFIG_ENV_OVERWRITE
+
+/*
+ * Ethernet configuration
+ */
+#define CONFIG_MPC512x_FEC	1
+#define CONFIG_NET_MULTI
+#define CONFIG_PHY_ADDR		0x1F
+#define CONFIG_MII		1	/* MII PHY management	*/
+#define CONFIG_FEC_AN_TIMEOUT	1
+#define CONFIG_HAS_ETH0
+
+/*
+ * Configure on-board RTC
+ */
+#define CONFIG_RTC_M41T62			/* use M41T00 rtc via i2c */
+#define CONFIG_SYS_I2C_RTC_ADDR		0x68	/* at address 0x68	*/
+
+/*
+ * Environment
+ */
+#define CONFIG_ENV_IS_IN_FLASH	1
+/* This has to be a multiple of the Flash sector size */
+#define CONFIG_ENV_ADDR		(CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
+#define CONFIG_ENV_SIZE		0x2000
+#define CONFIG_ENV_SECT_SIZE	0x40000		/* one sector (256K) for env */
+
+/* Address and size of Redundant Environment Sector	*/
+#define CONFIG_ENV_ADDR_REDUND	(CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
+#define CONFIG_ENV_SIZE_REDUND	(CONFIG_ENV_SIZE)
+
+#define CONFIG_LOADS_ECHO	1	/* echo on for serial download */
+#define CONFIG_SYS_LOADS_BAUD_CHANGE	1	/* allow baudrate change */
+
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_DATE
+#undef CONFIG_CMD_FUSE
+
+#ifdef CONFIG_VIDEO
+#define CONFIG_CMD_BMP
+#endif
+
+/*
+ * Watchdog timeout = CONFIG_SYS_WATCHDOG_VALUE * 65536 / IPS clock.
+ * For example, when IPS is set to 66MHz and CONFIG_SYS_WATCHDOG_VALUE is set
+ * to 0xFFFF, watchdog timeouts after about 64s. For details refer
+ * to chapter 36 of the MPC5121e Reference Manual.
+ */
+#undef CONFIG_WATCHDOG				/* disable watchdog */
+#define CONFIG_SYS_WATCHDOG_VALUE 0xFFFF
+
+ /*
+ * Miscellaneous configurable options
+ */
+#define CONFIG_SYS_LONGHELP			/* undef to save memory */
+#define CONFIG_SYS_LOAD_ADDR	0x2000000	/* default load address */
+#define CONFIG_SYS_PROMPT	"=> "		/* Monitor Command Prompt */
+
+#ifdef CONFIG_CMD_KGDB
+	#define CONFIG_SYS_CBSIZE	1024	/* Console I/O Buffer Size */
+#else
+	#define CONFIG_SYS_CBSIZE	256	/* Console I/O Buffer Size */
+#endif
+
+/* Print Buffer Size */
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_MAXARGS	16		/* max number of command args */
+#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
+#define CONFIG_SYS_HZ		1000		/* decrementer freq: 1ms ticks */
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization.
+ */
+#define CONFIG_SYS_BOOTMAPSZ	(8 << 20)	/* Initial Memory map for Linux*/
+
+/* Cache Configuration */
+#define CONFIG_SYS_DCACHE_SIZE		32768
+#define CONFIG_SYS_CACHELINE_SIZE	32
+#ifdef CONFIG_CMD_KGDB
+#define CONFIG_SYS_CACHELINE_SHIFT	5	/*log base 2 of the above value*/
+#endif
+
+#define CONFIG_SYS_HID0_INIT	0x000000000
+#define CONFIG_SYS_HID0_FINAL	(HID0_ENABLE_MACHINE_CHECK | HID0_ICE)
+#define CONFIG_SYS_HID2	HID2_HBE
+
+#define CONFIG_HIGH_BATS	1	/* High BATs supported */
+
+/*
+ * Internal Definitions
+ *
+ * Boot Flags
+ */
+#define BOOTFLAG_COLD		0x01	/* Normal Power-On: Boot from FLASH */
+#define BOOTFLAG_WARM		0x02	/* Software reboot */
+
+#ifdef CONFIG_CMD_KGDB
+#define CONFIG_KGDB_BAUDRATE	230400	/* speed of kgdb serial port */
+#define CONFIG_KGDB_SER_INDEX	2	/* which serial port to use */
+#endif
+
+#ifdef CONFIG_SERIAL_MULTI
+/* POST support */
+#define CONFIG_POST             (CONFIG_SYS_POST_COPROC)
+
+#define CONFIG_POST_COPROC    {\
+	"Coprocessors communication test",		\
+	"coproc_com",					\
+	"This test checks communication with coprocessors.",	\
+	POST_RAM | POST_ALWAYS | POST_CRITICAL,		\
+	&pdm360ng_coprocessor_post_test,		\
+	NULL,						\
+	NULL,						\
+	CONFIG_SYS_POST_COPROC				\
+	}
+#endif
+
+/*
+ * Environment Configuration
+ */
+#define CONFIG_TIMESTAMP
+
+#define CONFIG_HOSTNAME		pdm360ng
+#define CONFIG_LOADADDR		400000	/* default location for tftp and bootm */
+
+#define CONFIG_BOOTDELAY	5	/* -1 disables auto-boot */
+#undef  CONFIG_BOOTARGS			/* the boot command will set bootargs */
+
+#define CONFIG_PREBOOT	"echo;"	\
+	"echo PDM360NG SAMPLE;" \
+	"echo"
+
+#define CONFIG_BOOTCOMMAND	"run env_cont"
+
+#define CONFIG_OF_LIBFDT	1
+#define CONFIG_OF_BOARD_SETUP	1
+#define CONFIG_OF_SUPPORT_OLD_DEVICE_TREES	1
+#define CONFIG_FIT
+#define CONFIG_FIT_VERBOSE
+
+#define OF_CPU			"PowerPC,5121@0"
+#define OF_SOC_COMPAT		"fsl,mpc5121-immr"
+#define OF_TBCLK		(bd->bi_busfreq / 4)
+#define OF_STDOUT_PATH		"/soc at 80000000/serial at 11600"
+
+/*
+ * Include common options for all mpc5121 boards
+ */
+#include "mpc5121-common.h"
+
+#endif	/* __CONFIG_H */
diff --git a/include/post.h b/include/post.h
index 9fcd3ce..d147103 100644
--- a/include/post.h
+++ b/include/post.h
@@ -119,6 +119,7 @@ extern int post_hotkeys_pressed(void);
 #define CONFIG_SYS_POST_BSPEC4		0x00080000
 #define CONFIG_SYS_POST_BSPEC5		0x00100000
 #define CONFIG_SYS_POST_CODEC		0x00200000
+#define CONFIG_SYS_POST_COPROC		0x00400000
 
 #endif /* CONFIG_POST */
 
diff --git a/post/tests.c b/post/tests.c
index 3224f00..06e9dc0 100644
--- a/post/tests.c
+++ b/post/tests.c
@@ -53,6 +53,7 @@ extern int gdc_post_test (int flags);
 extern int fpga_post_test (int flags);
 extern int lwmon5_watchdog_post_test(int flags);
 extern int sysmon1_post_test(int flags);
+extern int pdm360ng_coprocessor_post_test(int flags);
 
 extern int sysmon_init_f (void);
 
@@ -286,6 +287,9 @@ struct post_test post_list[] =
 #if CONFIG_POST & CONFIG_SYS_POST_BSPEC5
 	CONFIG_POST_BSPEC5,
 #endif
+#if CONFIG_POST & CONFIG_SYS_POST_COPROC
+	CONFIG_POST_COPROC,
+#endif
 };
 
 unsigned int post_list_size = sizeof (post_list) / sizeof (struct post_test);
-- 
1.6.3.3

[U-Boot] [PATCH v2 7/7] mpc5121: cpu/mpc512x/diu.c: fix warnings

[Anatolij Gustschin]

Fix warnings while compiling with CONFIG_VIDEO enabled:

diu.c: In function 'video_hw_init':
diu.c:158: warning: 'return' with no value, in function returning non-void
diu.c:162: warning: format '%ld' expects type 'long int', but argument 6 has type 'int'
diu.c:162: warning: format '%ld' expects type 'long int', but argument 7 has type 'int'

Signed-off-by: Anatolij Gustschin <agust@denx.de>
---
New patch in this series, needed after cfb_console driver activation.

 cpu/mpc512x/diu.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/cpu/mpc512x/diu.c b/cpu/mpc512x/diu.c
index fc43a9d..463c88d 100644
--- a/cpu/mpc512x/diu.c
+++ b/cpu/mpc512x/diu.c
@@ -155,10 +155,10 @@ void *video_hw_init(void)
 	struct fb_info *info;
 
 	if (mpc5121_diu_init() < 0)
-		return;
+		return NULL;
 
 	/* fill in Graphic device struct */
-	sprintf(pGD->modeIdent, "%dx%dx%d %ldkHz %ldHz",
+	sprintf(pGD->modeIdent, "%dx%dx%d %dkHz %dHz",
 		xres, yres, 32, 64, 60);
 
 	pGD->frameAdrs = (unsigned int)fsl_fb_open(&info);
-- 
1.6.3.3

[U-Boot] [PATCH v2 7/7] mpc5121: cpu/mpc512x/diu.c: fix warnings

[Wolfgang Denk]

Dear Anatolij Gustschin,

In message <1268755808-24931-8-git-send-email-agust@denx.de> you wrote:
> Fix warnings while compiling with CONFIG_VIDEO enabled:
> 
> diu.c: In function 'video_hw_init':
> diu.c:158: warning: 'return' with no value, in function returning non-void
> diu.c:162: warning: format '%ld' expects type 'long int', but argument 6 has type 'int'
> diu.c:162: warning: format '%ld' expects type 'long int', but argument 7 has type 'int'
> 
> Signed-off-by: Anatolij Gustschin <agust@denx.de>
> ---
> New patch in this series, needed after cfb_console driver activation.
> 
>  cpu/mpc512x/diu.c |    4 ++--
>  1 files changed, 2 insertions(+), 2 deletions(-)

Applied, thanks.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Hi there! This is just a note from me, to you, to tell you, the  per-
son  reading this note, that I can't think up any more famous quotes,
jokes, nor bizarre stories, so you may as well go home.

[U-Boot] [PATCH v2 6/7] mpc5121: add support for PDM360NG board

[Wolfgang Denk]

Dear Anatolij Gustschin,

In message <1268755808-24931-7-git-send-email-agust@denx.de> you wrote:
> --===============0837153488==
> 
> PDM360NG is a MPC5121E based board by ifm ecomatic gmbh.
> 
> Signed-off-by: Michael Weiss <michael.weiss@ifm.com>
> Signed-off-by: Anatolij Gustschin <agust@denx.de>
> ---
> Changes since first version:
>  - don't include RLE8 bitmap support in DIU code,
>    now it is in common code submitted to U-Boot ML
>    as separate patch. It is also extended to support
>    more video formats.
>  - fixed e-mail format
>  - keep the list of targets sorted in the Makefile
>  - move POST code into separate file
>  - move post_word_load/store code to common file for
>    all mpc512x boards
>  - create a file with common board config options
>    for mpc512x boards which can be included in the
>    board config file.
>  - use cfb_console driver for frame buffer support
>  - allow configuration of coprocessor communication
>    parameters (baudrate, wait delay) in the board config
>    file

I see you already addressed a number of issues I mentioned in my
previous review of this patch.

Some others are still open:

>  MAKEALL                             |    1 +
>  Makefile                            |    3 +
>  board/freescale/common/fsl_diu_fb.c |   29 ++-
>  board/pdm360ng/Makefile             |   52 ++++
>  board/pdm360ng/config.mk            |   24 ++
>  board/pdm360ng/pdm360ng.c           |  525 +++++++++++++++++++++++++++++++++++
>  board/pdm360ng/post.c               |   75 +++++
>  cpu/mpc512x/diu.c                   |   14 +-
>  include/configs/mpc5121-common.h    |   52 ++++
>  include/configs/pdm360ng.h          |  520 ++++++++++++++++++++++++++++++++++
>  include/post.h                      |    1 +
>  post/tests.c                        |    4 +
>  12 files changed, 1294 insertions(+), 6 deletions(-)
>  create mode 100644 board/pdm360ng/Makefile
>  create mode 100644 board/pdm360ng/config.mk
>  create mode 100644 board/pdm360ng/pdm360ng.c
>  create mode 100644 board/pdm360ng/post.c
>  create mode 100644 include/configs/mpc5121-common.h
>  create mode 100644 include/configs/pdm360ng.h

Entry to MAINTAINERS file is missing.


> +#if defined(CONFIG_HARD_I2C)
> +	if (!getenv("ethaddr")) {
> +		uchar buf[6];
> +		char mac[18];
> +		int ret;
> +
> +		/* I2C-0 for on-board eeprom */
> +		i2c_set_bus_num(CONFIG_SYS_I2C_EEPROM_BUS_NUM);
> +
> +		/* Read ethaddr from EEPROM */
> +		ret = i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR,
> +			       CONFIG_SYS_I2C_EEPROM_MAC_OFFSET, 1, buf, 6);
> +		if (!ret) {
> +			sprintf(mac, "%02X:%02X:%02X:%02X:%02X:%02X",
> +				buf[0], buf[1], buf[2], buf[3], buf[4], buf[5]);
> +			/* Owned by IFM ? */
> +			if (strstr(mac, "00:02:01") != mac) {
> +				printf("Illegal MAC address in EEPROM: %s\n",
> +				       mac);
> +			} else {
> +				debug("Using MAC from I2C EEPROM: %s\n", mac);
> +				setenv("ethaddr", mac);
> +			}
> +		} else {
> +			printf("Error: Unable to read MAC from I2C"
> +				" EEPROM at address %02X:%02X\n",
> +				CONFIG_SYS_I2C_EEPROM_ADDR,
> +				CONFIG_SYS_I2C_EEPROM_MAC_OFFSET);
> +		}

Please see comments in previous message. IMHO this needs to be
rewritten.

> +#if defined(CONFIG_SERIAL_MULTI)
> +/*
> + * If argument is NULL, set the LCD brightness to the
> + * value from "brightness" environment variable. Set
> + * the LCD brightness to the value specified by the
> + * argument otherwise. Default brightness is zero.
> + */
> +#define MAX_BRIGHTNESS	99
> +static int set_lcd_brightness(char *brightness)

This seems wrong to me. Why does LCD related code depend on
CONFIG_SERIAL_MULTI ???

> diff --git a/cpu/mpc512x/diu.c b/cpu/mpc512x/diu.c
> index a24f395..fc43a9d 100644
> --- a/cpu/mpc512x/diu.c
> +++ b/cpu/mpc512x/diu.c
> @@ -68,8 +68,13 @@ char *valid_bmp(char *addr)
>  	unsigned long h_addr;
>  
>  	h_addr = simple_strtoul(addr, NULL, 16);
> -	if (h_addr < CONFIG_SYS_FLASH_BASE ||
> -			h_addr >= (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - 1)) {
> +	if ((h_addr < CONFIG_SYS_FLASH_BASE ||
> +		h_addr >= (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - 1))
> +#if defined(CONFIG_SYS_FLASH1_BASE) && defined(CONFIG_SYS_FLASH1_SIZE)
> +	   && (h_addr < CONFIG_SYS_FLASH1_BASE ||
> +	       h_addr >= (CONFIG_SYS_FLASH1_BASE + CONFIG_SYS_FLASH1_SIZE - 1))
> +#endif
> +	) {

I don't like this.  Why do we see hardcoded values here and not the
data from the CFI driver's auto-sizing?  I assume both flash banks are
maped into one big contiguous array of NOR flash, right? Then there
should be just a single test for "< base || >(base+size)" here, using
the total size of the combined flash banks.

>  		printf("bmp addr %lx is not a valid flash address\n", h_addr);
>  		return 0;

And why would it be necessary that the BMP resides in NOR flash in the
first place?

Why cannot - for example - a "preboot" command be used to read it from
SDCard into RAM?

[I am aware that you did not create this code, but anyways - it seems
wrong to me.]

>  	} else if ((*(char *)(h_addr) != 'B') || (*(char *)(h_addr+1) != 'M')) {
> @@ -85,8 +90,13 @@ int mpc5121_diu_init(void)
>  	char *bmp = NULL;
>  	char *bmp_env;
>  
> +#ifdef CONFIG_PDM360NG
> +	xres = 800;
> +	yres = 480;
> +#else
>  	xres = 1024;
>  	yres = 768;
> +#endif

Please avoid the board specific #define here. Please check for a
feature instead (resolution = 800x400).


> +#ifndef __CONFIG_H
> +#define __CONFIG_H
> +
> +#undef DEBUG

Please remove dead code.

> +#define CONFIG_PDM360NG 1
> +#define CONFIG_PDM360NG_BIG	/* PDM360NG with big memory */
> +#undef CONFIG_PDM360NG_SMALL	/* PDM360NG with small memory */

This makes no sense. If you want to toggle between "small" and "big"
configurations, then please use a single #define which is either set
or not set. 

I don't see why this is needed at all. Does not U-Boot auto-detect the
RAM size, so you can auto-adjust all code where needed?  If not, then
this should be fixed.

> +/*
> + * DDR Setup - manually set all parameters as there's no SPD etc.
> + */
> +#ifdef CONFIG_PDM360NG_BIG
> +#define CONFIG_SYS_DDR_SIZE		512		/* MB */
> +#elif defined CONFIG_PDM360NG_SMALL
> +#define CONFIG_SYS_DDR_SIZE		128		/* MB */
> +#else
> +#error No memory configuration level defined!
> +#endif

Please use auto-sizing with get_ram_size() instead, so a single
U-Boot image can be used with both configurations.

> +/* DDR Controller Configuration for Micron DDR2 SDRAM MT47H128M8-3
> + *

Incorrect multiline comment format.

And: comment and code seem to differ - the comment explains one
configuration, but the code has 2 ("small" and "big") ?

> +#define CONFIG_SYS_DDRCMD_NOP		0x01380000
> +#define CONFIG_SYS_DDRCMD_PCHG_ALL	0x01100400
> +#define CONFIG_SYS_DDRCMD_EM2		0x01020000  /* EMR2 */
> +#define CONFIG_SYS_DDRCMD_EM3		0x01030000  /* EMR3 */
> +#define CONFIG_SYS_DDRCMD_EN_DLL	0x01010040  /* EMR  with 150 ohm ODT todo: verify*/
> +#define CONFIG_SYS_DDRCMD_RES_DLL	0x01000100
> +#define CONFIG_SYS_DDRCMD_RFSH		0x01080000
> +#define CONFIG_SYS_MICRON_INIT_DEV_OP	0x01000432
> +#define CONFIG_SYS_DDRCMD_OCD_DEFAULT	0x010107C0  /* EMR  with 150 ohm ODT todo: verify*/
> +#define CONFIG_SYS_DDRCMD_OCD_EXIT	0x01010440  /* EMR new command with 150 ohm ODT todo: verify*/

Lines way too long. Please fix globally.

> + * Serial Port
> + */
> +#define CONFIG_CONS_INDEX     1
> +#undef CONFIG_SERIAL_SOFTWARE_FIFO

Please do not #undef what is not defined anyway.  Please remove dead
code globally.

> +#define CONFIG_CMD_ASKENV
> +#define CONFIG_CMD_DHCP
> +#define CONFIG_CMD_I2C
> +#define CONFIG_CMD_MII
> +#define CONFIG_CMD_NFS
> +#define CONFIG_CMD_PING
> +#define CONFIG_CMD_REGINFO
> +#define CONFIG_CMD_EEPROM
> +#define CONFIG_CMD_DATE
> +#undef CONFIG_CMD_FUSE

You may want to sort that list.

> +#define CONFIG_POST_COPROC    {\
> +	"Coprocessors communication test",		\
> +	"coproc_com",					\
> +	"This test checks communication with coprocessors.",	\
> +	POST_RAM | POST_ALWAYS | POST_CRITICAL,		\
> +	&pdm360ng_coprocessor_post_test,		\
> +	NULL,						\
> +	NULL,						\
> +	CONFIG_SYS_POST_COPROC				\
> +	}
> +#endif

This does not belong into the board config file.


> diff --git a/include/post.h b/include/post.h
> index 9fcd3ce..d147103 100644
> --- a/include/post.h
> +++ b/include/post.h
> @@ -119,6 +119,7 @@ extern int post_hotkeys_pressed(void);
>  #define CONFIG_SYS_POST_BSPEC4		0x00080000
>  #define CONFIG_SYS_POST_BSPEC5		0x00100000
>  #define CONFIG_SYS_POST_CODEC		0x00200000
> +#define CONFIG_SYS_POST_COPROC		0x00400000

Please split the POST specific code out into a separate commit.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
There's an old proverb that says just about whatever you want it to.

[U-Boot] [PATCH v2 6/7] mpc5121: add support for PDM360NG board

[Anatolij Gustschin]

Hello Wolfgang,

On Sun, 21 Mar 2010 20:23:06 +0100
Wolfgang Denk <wd@denx.de> wrote:

...
> >  12 files changed, 1294 insertions(+), 6 deletions(-)
> >  create mode 100644 board/pdm360ng/Makefile
> >  create mode 100644 board/pdm360ng/config.mk
> >  create mode 100644 board/pdm360ng/pdm360ng.c
> >  create mode 100644 board/pdm360ng/post.c
> >  create mode 100644 include/configs/mpc5121-common.h
> >  create mode 100644 include/configs/pdm360ng.h
> 
> Entry to MAINTAINERS file is missing.

Ok, will fix it.

> > +#if defined(CONFIG_HARD_I2C)
> > +	if (!getenv("ethaddr")) {
> > +		uchar buf[6];
> > +		char mac[18];
> > +		int ret;
> > +
> > +		/* I2C-0 for on-board eeprom */
> > +		i2c_set_bus_num(CONFIG_SYS_I2C_EEPROM_BUS_NUM);
> > +
> > +		/* Read ethaddr from EEPROM */
> > +		ret = i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR,
> > +			       CONFIG_SYS_I2C_EEPROM_MAC_OFFSET, 1, buf, 6);
> > +		if (!ret) {
> > +			sprintf(mac, "%02X:%02X:%02X:%02X:%02X:%02X",
> > +				buf[0], buf[1], buf[2], buf[3], buf[4], buf[5]);
> > +			/* Owned by IFM ? */
> > +			if (strstr(mac, "00:02:01") != mac) {
> > +				printf("Illegal MAC address in EEPROM: %s\n",
> > +				       mac);
> > +			} else {
> > +				debug("Using MAC from I2C EEPROM: %s\n", mac);
> > +				setenv("ethaddr", mac);
> > +			}
> > +		} else {
> > +			printf("Error: Unable to read MAC from I2C"
> > +				" EEPROM at address %02X:%02X\n",
> > +				CONFIG_SYS_I2C_EEPROM_ADDR,
> > +				CONFIG_SYS_I2C_EEPROM_MAC_OFFSET);
> > +		}
> 
> Please see comments in previous message. IMHO this needs to be
> rewritten.

Ok, I will rewrite it as suggested. Thanks.

> 
> > +#if defined(CONFIG_SERIAL_MULTI)
> > +/*
> > + * If argument is NULL, set the LCD brightness to the
> > + * value from "brightness" environment variable. Set
> > + * the LCD brightness to the value specified by the
> > + * argument otherwise. Default brightness is zero.
> > + */
> > +#define MAX_BRIGHTNESS	99
> > +static int set_lcd_brightness(char *brightness)
> 
> This seems wrong to me. Why does LCD related code depend on
> CONFIG_SERIAL_MULTI ???

The reason for this is that LCD brightness is controlled by
sending commands to the I/O Coprocessor over serial line (PSC4).
If CONFIG_SERIAL_MULTI is not selected, there is no possibility
to set the brightness, so it doesn't make sense to include this
code then.

> > diff --git a/cpu/mpc512x/diu.c b/cpu/mpc512x/diu.c
> > index a24f395..fc43a9d 100644
> > --- a/cpu/mpc512x/diu.c
> > +++ b/cpu/mpc512x/diu.c
> > @@ -68,8 +68,13 @@ char *valid_bmp(char *addr)
> >  	unsigned long h_addr;
> >  
> >  	h_addr = simple_strtoul(addr, NULL, 16);
> > -	if (h_addr < CONFIG_SYS_FLASH_BASE ||
> > -			h_addr >= (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - 1)) {
> > +	if ((h_addr < CONFIG_SYS_FLASH_BASE ||
> > +		h_addr >= (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - 1))
> > +#if defined(CONFIG_SYS_FLASH1_BASE) && defined(CONFIG_SYS_FLASH1_SIZE)
> > +	   && (h_addr < CONFIG_SYS_FLASH1_BASE ||
> > +	       h_addr >= (CONFIG_SYS_FLASH1_BASE + CONFIG_SYS_FLASH1_SIZE - 1))
> > +#endif
> > +	) {
> 
> I don't like this.  Why do we see hardcoded values here and not the
> data from the CFI driver's auto-sizing?  I assume both flash banks are
> maped into one big contiguous array of NOR flash, right? Then there
> should be just a single test for "< base || >(base+size)" here, using
> the total size of the combined flash banks.

Will fix it using a single test as suggested. Thanks!

> >  		printf("bmp addr %lx is not a valid flash address\n", h_addr);
> >  		return 0;
> 
> And why would it be necessary that the BMP resides in NOR flash in the
> first place?

This check is only done while first DIU init. It checks the BMP address in
"diu_bmp_addr" environment variable which is supposed to point to a
bitmap in flash.

> Why cannot - for example - a "preboot" command be used to read it from
> SDCard into RAM?
> 
> [I am aware that you did not create this code, but anyways - it seems
> wrong to me.]

Displaying a bitmap form RAM can be done later by running "diufb addr"
and this command doesn't perform the above check.

> > +#ifdef CONFIG_PDM360NG
> > +	xres = 800;
> > +	yres = 480;
> > +#else
> >  	xres = 1024;
> >  	yres = 768;
> > +#endif
> 
> Please avoid the board specific #define here. Please check for a
> feature instead (resolution = 800x400).

I will fix it using CONFIG macros for resolution.

...
> > +#undef DEBUG
> 
> Please remove dead code.

Ok, will fix. Thanks!
 
> > +#define CONFIG_PDM360NG 1
> > +#define CONFIG_PDM360NG_BIG	/* PDM360NG with big memory */
> > +#undef CONFIG_PDM360NG_SMALL	/* PDM360NG with small memory */
> 
> This makes no sense. If you want to toggle between "small" and "big"
> configurations, then please use a single #define which is either set
> or not set. 
> 
> I don't see why this is needed at all. Does not U-Boot auto-detect the
> RAM size, so you can auto-adjust all code where needed?  If not, then
> this should be fixed.
> 
> > +/*
> > + * DDR Setup - manually set all parameters as there's no SPD etc.
> > + */
> > +#ifdef CONFIG_PDM360NG_BIG
> > +#define CONFIG_SYS_DDR_SIZE		512		/* MB */
> > +#elif defined CONFIG_PDM360NG_SMALL
> > +#define CONFIG_SYS_DDR_SIZE		128		/* MB */
> > +#else
> > +#error No memory configuration level defined!
> > +#endif
> 
> Please use auto-sizing with get_ram_size() instead, so a single
> U-Boot image can be used with both configurations.

I will use get_ram_size() in fixed_sdram() to determine the
size, but we still need to differentiate between "big" and
"small" configuration as some parameters are different for
128 MB configuration and cannot be determined using SPD.

> > +/* DDR Controller Configuration for Micron DDR2 SDRAM MT47H128M8-3
> > + *
> 
> Incorrect multiline comment format.
> 
> And: comment and code seem to differ - the comment explains one
> configuration, but the code has 2 ("small" and "big") ?

Will fix and move the comment to "big" configuration.

> > +#define CONFIG_SYS_DDRCMD_NOP		0x01380000
> > +#define CONFIG_SYS_DDRCMD_PCHG_ALL	0x01100400
> > +#define CONFIG_SYS_DDRCMD_EM2		0x01020000  /* EMR2 */
> > +#define CONFIG_SYS_DDRCMD_EM3		0x01030000  /* EMR3 */
> > +#define CONFIG_SYS_DDRCMD_EN_DLL	0x01010040  /* EMR  with 150 ohm ODT todo: verify*/
> > +#define CONFIG_SYS_DDRCMD_RES_DLL	0x01000100
> > +#define CONFIG_SYS_DDRCMD_RFSH		0x01080000
> > +#define CONFIG_SYS_MICRON_INIT_DEV_OP	0x01000432
> > +#define CONFIG_SYS_DDRCMD_OCD_DEFAULT	0x010107C0  /* EMR  with 150 ohm ODT todo: verify*/
> > +#define CONFIG_SYS_DDRCMD_OCD_EXIT	0x01010440  /* EMR new command with 150 ohm ODT todo: verify*/
> 
> Lines way too long. Please fix globally.

Will fix. Thanks.

> > + * Serial Port
> > + */
> > +#define CONFIG_CONS_INDEX     1
> > +#undef CONFIG_SERIAL_SOFTWARE_FIFO
> 
> Please do not #undef what is not defined anyway.  Please remove dead
> code globally.

Ok, fixed.

> > +#define CONFIG_CMD_ASKENV
> > +#define CONFIG_CMD_DHCP
> > +#define CONFIG_CMD_I2C
> > +#define CONFIG_CMD_MII
> > +#define CONFIG_CMD_NFS
> > +#define CONFIG_CMD_PING
> > +#define CONFIG_CMD_REGINFO
> > +#define CONFIG_CMD_EEPROM
> > +#define CONFIG_CMD_DATE
> > +#undef CONFIG_CMD_FUSE
> 
> You may want to sort that list.

Will do.

> > +#define CONFIG_POST_COPROC    {\
> > +	"Coprocessors communication test",		\
> > +	"coproc_com",					\
> > +	"This test checks communication with coprocessors.",	\
> > +	POST_RAM | POST_ALWAYS | POST_CRITICAL,		\
> > +	&pdm360ng_coprocessor_post_test,		\
> > +	NULL,						\
> > +	NULL,						\
> > +	CONFIG_SYS_POST_COPROC				\
> > +	}
> > +#endif
> 
> This does not belong into the board config file.

Ok, I will move it to post/tests.c file.
 
> > diff --git a/include/post.h b/include/post.h
> > index 9fcd3ce..d147103 100644
> > --- a/include/post.h
> > +++ b/include/post.h
> > @@ -119,6 +119,7 @@ extern int post_hotkeys_pressed(void);
> >  #define CONFIG_SYS_POST_BSPEC4		0x00080000
> >  #define CONFIG_SYS_POST_BSPEC5		0x00100000
> >  #define CONFIG_SYS_POST_CODEC		0x00200000
> > +#define CONFIG_SYS_POST_COPROC		0x00400000
> 
> Please split the POST specific code out into a separate commit.

OK.

Thanks!
Anatolij

--
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: office at denx.de

[U-Boot] [PATCH v3 0/3] Add support for PDM360NG board

[Anatolij Gustschin]

These are remaining reworked patches for PDM360NG
board support. I expect them to be applied to u-boot-mpc5xxx
branch (after applying another already submitted patch [1]
for fixing the problem with bricking the boards after
commit d774442c60756a8dd5d75de85574120ce375bd72 and then
rebasing this branch to new directory structure).

[1] http://lists.denx.de/pipermail/u-boot/2010-April/070018.html

Anatolij Gustschin (3):
  mpc5121: determine RAM size using get_ram_size()
  mpc5121: add support for PDM360NG board
  mpc5121: pdm360ng: add coprocessor POST

 MAINTAINERS                         |    4 +
 MAKEALL                             |    1 +
 Makefile                            |    3 +
 arch/ppc/cpu/mpc512x/diu.c          |   12 +-
 arch/ppc/cpu/mpc512x/fixed_sdram.c  |    7 +-
 board/freescale/common/fsl_diu_fb.c |   29 ++-
 board/pdm360ng/Makefile             |   52 ++++
 board/pdm360ng/config.mk            |   24 ++
 board/pdm360ng/pdm360ng.c           |  521 +++++++++++++++++++++++++++++++++++
 board/pdm360ng/post.c               |   75 +++++
 include/configs/mpc5121-common.h    |   53 ++++
 include/configs/pdm360ng.h          |  497 +++++++++++++++++++++++++++++++++
 include/post.h                      |    1 +
 post/tests.c                        |   13 +
 14 files changed, 1285 insertions(+), 7 deletions(-)
 create mode 100644 board/pdm360ng/Makefile
 create mode 100644 board/pdm360ng/config.mk
 create mode 100644 board/pdm360ng/pdm360ng.c
 create mode 100644 board/pdm360ng/post.c
 create mode 100644 include/configs/mpc5121-common.h
 create mode 100644 include/configs/pdm360ng.h

[U-Boot] [PATCH v3 1/3] mpc5121: determine RAM size using get_ram_size()

[Anatolij Gustschin]

Configure 1GiB address range in DDR LAW and
determine the RAM size. Fix DDR LAW afterwards.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
---
 arch/ppc/cpu/mpc512x/fixed_sdram.c |    7 ++++++-
 1 files changed, 6 insertions(+), 1 deletions(-)

diff --git a/arch/ppc/cpu/mpc512x/fixed_sdram.c b/arch/ppc/cpu/mpc512x/fixed_sdram.c
index 72d524c..01ae0a5 100644
--- a/arch/ppc/cpu/mpc512x/fixed_sdram.c
+++ b/arch/ppc/cpu/mpc512x/fixed_sdram.c
@@ -78,7 +78,7 @@ long int fixed_sdram(ddr512x_config_t *mddrc_config,
 			u32 *dram_init_seq, int seq_sz)
 {
 	volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
-	u32 msize = CONFIG_SYS_DDR_SIZE * 1024 * 1024;
+	u32 msize = 1024 * 1024 * 1024;
 	u32 msize_log2 = __ilog2(msize);
 	u32 i;
 
@@ -148,5 +148,10 @@ long int fixed_sdram(ddr512x_config_t *mddrc_config,
 	out_be32(&im->mddrc.ddr_time_config0, mddrc_config->ddr_time_config0);
 	out_be32(&im->mddrc.ddr_sys_config, mddrc_config->ddr_sys_config);
 
+	msize = get_ram_size(CONFIG_SYS_DDR_BASE, 0x40000000);
+	/* Fix DDR Local Window for new size */
+	out_be32(&im->sysconf.ddrlaw.ar, __ilog2(msize) - 1);
+	sync_law(&im->sysconf.ddrlaw.ar);
+
 	return msize;
 }
-- 
1.6.3.3

[U-Boot] [PATCH v3 2/3] mpc5121: add support for PDM360NG board

[Anatolij Gustschin]

PDM360NG is a MPC5121E based board by ifm ecomatic gmbh.

Signed-off-by: Michael Weiss <michael.weiss@ifm.com>
Signed-off-by: Detlev Zundel <dzu@denx.de>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
---
Changes since v2:
 Addressed comments from Wolfgang:
 - added board maintainer to MAINTAINERS
 - simplified code for setting ethaddr from EEPROM as
   suggested by Wolfgang
 - simplified flash address range check using data from
   the CFI driver's auto-sizing
 - don't use board specific #define for resolution 800x480,
   replaced by CONFIG macros
 - removed dead code (#undef)
 - toggle between "small" and "big" configurations using
   single #define
 - don't use DDR RAM size config macro, get_ram_size() is
   used now in fixed_sdram() to determine RAM size (see
   previous patch 1/3)
 - fixed multiline comment format, moved the comment to
   appropriate code
 - fixed too long lines globaly
 - sorted CONFIG_CMD_* list
 - split POST specific board code out into a separate
   commit (in following patch 3/3)
 - rebased to apply on reworked directory structure
 - merged two new patches from Detlev from u-boot-testing:
        pdm360ng: Add GPT2 as GPIO pin
        pdm360ng: Adapt PIN muxing to support Revision 3 prototype

 MAINTAINERS                         |    4 +
 MAKEALL                             |    1 +
 Makefile                            |    3 +
 arch/ppc/cpu/mpc512x/diu.c          |   12 +-
 board/freescale/common/fsl_diu_fb.c |   29 ++-
 board/pdm360ng/Makefile             |   51 ++++
 board/pdm360ng/config.mk            |   24 ++
 board/pdm360ng/pdm360ng.c           |  521 +++++++++++++++++++++++++++++++++++
 include/configs/mpc5121-common.h    |   53 ++++
 include/configs/pdm360ng.h          |  492 +++++++++++++++++++++++++++++++++
 10 files changed, 1184 insertions(+), 6 deletions(-)
 create mode 100644 board/pdm360ng/Makefile
 create mode 100644 board/pdm360ng/config.mk
 create mode 100644 board/pdm360ng/pdm360ng.c
 create mode 100644 include/configs/mpc5121-common.h
 create mode 100644 include/configs/pdm360ng.h

diff --git a/MAINTAINERS b/MAINTAINERS
index 04c8730..59d3aec 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -467,6 +467,10 @@ Josef Wagner <Wagner@Microsys.de>
 	CPC45		MPC8245
 	PM520		MPC5200
 
+Michael Weiss <michael.weiss@ifm.com>
+
+	PDM360NG	MPC5121e
+
 Stephen Williams <steve@icarus.com>
 
 	JSE		PPC405GPr
diff --git a/MAKEALL b/MAKEALL
index fb1f7a3..af3f2e2 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -92,6 +92,7 @@ LIST_512x="		\
 	aria		\
 	mecp5123	\
 	mpc5121ads	\
+	pdm360ng	\
 "
 
 #########################################################################
diff --git a/Makefile b/Makefile
index 0381c81..209c552 100644
--- a/Makefile
+++ b/Makefile
@@ -813,6 +813,9 @@ mpc5121ads_rev2_config	\
 	fi
 	@$(MKCONFIG) -a mpc5121ads ppc mpc512x mpc5121ads freescale
 
+pdm360ng_config:	unconfig
+	@$(MKCONFIG) -a pdm360ng ppc mpc512x pdm360ng
+
 #########################################################################
 ## MPC8xx Systems
 #########################################################################
diff --git a/arch/ppc/cpu/mpc512x/diu.c b/arch/ppc/cpu/mpc512x/diu.c
index 9361161..f8d19a0 100644
--- a/arch/ppc/cpu/mpc512x/diu.c
+++ b/arch/ppc/cpu/mpc512x/diu.c
@@ -34,6 +34,8 @@
 #include <video_fb.h>
 #endif
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #ifdef CONFIG_FSL_DIU_LOGO_BMP
 extern unsigned int FSL_Logo_BMP[];
 #else
@@ -65,10 +67,11 @@ void diu_set_pixel_clock(unsigned int pixclock)
 char *valid_bmp(char *addr)
 {
 	unsigned long h_addr;
+	bd_t *bd = gd->bd;
 
 	h_addr = simple_strtoul(addr, NULL, 16);
-	if (h_addr < CONFIG_SYS_FLASH_BASE ||
-			h_addr >= (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - 1)) {
+	if (h_addr < bd->bi_flashstart ||
+	    h_addr >= (bd->bi_flashstart + bd->bi_flashsize - 1)) {
 		printf("bmp addr %lx is not a valid flash address\n", h_addr);
 		return 0;
 	} else if ((*(char *)(h_addr) != 'B') || (*(char *)(h_addr+1) != 'M')) {
@@ -84,8 +87,13 @@ int mpc5121_diu_init(void)
 	char *bmp = NULL;
 	char *bmp_env;
 
+#if defined(CONFIG_VIDEO_XRES) & defined(CONFIG_VIDEO_YRES)
+	xres = CONFIG_VIDEO_XRES;
+	yres = CONFIG_VIDEO_YRES;
+#else
 	xres = 1024;
 	yres = 768;
+#endif
 	pixel_format = 0x88883316;
 
 	debug("mpc5121_diu_init\n");
diff --git a/board/freescale/common/fsl_diu_fb.c b/board/freescale/common/fsl_diu_fb.c
index 2fc878b..ae5e7a7 100644
--- a/board/freescale/common/fsl_diu_fb.c
+++ b/board/freescale/common/fsl_diu_fb.c
@@ -50,6 +50,22 @@ struct fb_videomode {
 #define FB_SYNC_COMP_HIGH_ACT	8	/* composite sync high active   */
 #define FB_VMODE_NONINTERLACED  0	/* non interlaced */
 
+/* This setting is used for the ifm pdm360ng with PRIMEVIEW PM070WL3 */
+static struct fb_videomode fsl_diu_mode_800 = {
+	.refresh	= 60,
+	.xres		= 800,
+	.yres		= 480,
+	.pixclock	= 31250,
+	.left_margin	= 86,
+	.right_margin	= 42,
+	.upper_margin	= 33,
+	.lower_margin	= 10,
+	.hsync_len	= 128,
+	.vsync_len	= 2,
+	.sync		= FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
+	.vmode		= FB_VMODE_NONINTERLACED
+};
+
 /*
  * These parameters give default parameters
  * for video output 1024x768,
@@ -210,9 +226,14 @@ int fsl_diu_init(int xres,
 
 	disable_lcdc();
 
-	if (xres == 1280) {
+	switch (xres) {
+	case 800:
+		fsl_diu_mode_db = &fsl_diu_mode_800;
+		break;
+	case 1280:
 		fsl_diu_mode_db = &fsl_diu_mode_1280;
-	} else {
+		break;
+	default:
 		fsl_diu_mode_db = &fsl_diu_mode_1024;
 	}
 
@@ -519,9 +540,9 @@ int fsl_diu_display_bmp(unsigned char *bmp,
 				b = *bitmap++;
 				for (k = 0; k < 8; k++) {
 					if (b & 0x80)
-						*fb_t = palette[1];
+						*fb_t++ = palette[1];
 					else
-						*fb_t = palette[0];
+						*fb_t++ = palette[0];
 					b = b << 1;
 				}
 			}
diff --git a/board/pdm360ng/Makefile b/board/pdm360ng/Makefile
new file mode 100644
index 0000000..8513242
--- /dev/null
+++ b/board/pdm360ng/Makefile
@@ -0,0 +1,51 @@
+#
+# (C) Copyright 2007
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).a
+
+COBJS-y	:= $(BOARD).o
+
+COBJS	:= $(COBJS-y)
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	$(obj).depend $(OBJS)
+	$(AR) $(ARFLAGS) $@ $(OBJS)
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak $(obj).depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/pdm360ng/config.mk b/board/pdm360ng/config.mk
new file mode 100644
index 0000000..56337e4
--- /dev/null
+++ b/board/pdm360ng/config.mk
@@ -0,0 +1,24 @@
+#
+# (C) Copyright 2009
+#  Michael Wei??, ifm ecomatic gmbh, michael.weiss at ifm.com
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+TEXT_BASE  =   0xF0000000
diff --git a/board/pdm360ng/pdm360ng.c b/board/pdm360ng/pdm360ng.c
new file mode 100644
index 0000000..518c36b
--- /dev/null
+++ b/board/pdm360ng/pdm360ng.c
@@ -0,0 +1,521 @@
+/*
+ * (C) Copyright 2009, 2010 Wolfgang Denk <wd@denx.de>
+ *
+ * (C) Copyright 2009
+ * Michael Wei??, ifm ecomatic gmbh, michael.weiss at ifm.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <common.h>
+#include <asm/bitops.h>
+#include <command.h>
+#include <asm/io.h>
+#include <asm/processor.h>
+#include <asm/mpc512x.h>
+#include <fdt_support.h>
+#ifdef CONFIG_MISC_INIT_R
+#include <i2c.h>
+#endif
+#include <serial.h>
+#include <jffs2/load_kernel.h>
+#include <mtd_node.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* Clocks in use */
+#define SCCR1_CLOCKS_EN	(CLOCK_SCCR1_CFG_EN |				\
+			 CLOCK_SCCR1_LPC_EN |				\
+			 CLOCK_SCCR1_NFC_EN |				\
+			 CLOCK_SCCR1_PSC_EN(CONFIG_PSC_CONSOLE) |	\
+			 CLOCK_SCCR1_PSCFIFO_EN |			\
+			 CLOCK_SCCR1_DDR_EN |				\
+			 CLOCK_SCCR1_FEC_EN |				\
+			 CLOCK_SCCR1_TPR_EN)
+
+#define SCCR2_CLOCKS_EN	(CLOCK_SCCR2_MEM_EN |		\
+			 CLOCK_SCCR2_SPDIF_EN |		\
+			 CLOCK_SCCR2_DIU_EN |		\
+			 CLOCK_SCCR2_I2C_EN)
+
+int board_early_init_f(void)
+{
+	volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
+
+	/*
+	 * Initialize Local Window for FLASH-Bank1 access (CS1)
+	 */
+	out_be32(&im->sysconf.lpcs1aw,
+		CSAW_START(CONFIG_SYS_FLASH1_BASE) |
+		CSAW_STOP(CONFIG_SYS_FLASH1_BASE, CONFIG_SYS_FLASH1_SIZE)
+	);
+	out_be32(&im->lpc.cs_cfg[1], CONFIG_SYS_CS1_CFG);
+
+	/*
+	 * Local Window for MRAM access (CS2)
+	 */
+	out_be32(&im->sysconf.lpcs2aw,
+		CSAW_START(CONFIG_SYS_MRAM_BASE) |
+		CSAW_STOP(CONFIG_SYS_MRAM_BASE, CONFIG_SYS_MRAM_SIZE)
+	);
+	out_be32(&im->lpc.cs_cfg[2], CONFIG_SYS_CS2_CFG);
+
+	sync_law(&im->sysconf.lpcs2aw);
+
+	/*
+	 * Configure Flash Speed
+	 */
+	out_be32(&im->lpc.cs_cfg[0], CONFIG_SYS_CS0_CFG);
+	out_be32(&im->lpc.altr, CONFIG_SYS_CS_ALETIMING);
+
+	/*
+	 * Enable clocks
+	 */
+	out_be32(&im->clk.sccr[0], SCCR1_CLOCKS_EN);
+	out_be32(&im->clk.sccr[1], SCCR2_CLOCKS_EN);
+#if defined(CONFIG_IIM) || defined(CONFIG_CMD_FUSE)
+	setbits_be32(&im->clk.sccr[1], CLOCK_SCCR2_IIM_EN);
+#endif
+
+	return 0;
+}
+
+phys_size_t initdram (int board_type)
+{
+	u32 pdm360ng_init_seq[] = {
+		CONFIG_SYS_DDRCMD_NOP,
+		CONFIG_SYS_DDRCMD_NOP,
+		CONFIG_SYS_DDRCMD_NOP,
+		CONFIG_SYS_DDRCMD_NOP,
+		CONFIG_SYS_DDRCMD_NOP,
+		CONFIG_SYS_DDRCMD_NOP,
+		CONFIG_SYS_DDRCMD_NOP,
+		CONFIG_SYS_DDRCMD_NOP,
+		CONFIG_SYS_DDRCMD_NOP,
+		CONFIG_SYS_DDRCMD_NOP,
+		CONFIG_SYS_DDRCMD_PCHG_ALL,
+		CONFIG_SYS_DDRCMD_NOP,
+		CONFIG_SYS_DDRCMD_RFSH,
+		CONFIG_SYS_DDRCMD_NOP,
+		CONFIG_SYS_DDRCMD_RFSH,
+		CONFIG_SYS_DDRCMD_NOP,
+		CONFIG_SYS_MICRON_INIT_DEV_OP,
+		CONFIG_SYS_DDRCMD_NOP,
+		CONFIG_SYS_DDRCMD_EM2,
+		CONFIG_SYS_DDRCMD_NOP,
+		CONFIG_SYS_DDRCMD_PCHG_ALL,
+		CONFIG_SYS_DDRCMD_EM2,
+		CONFIG_SYS_DDRCMD_EM3,
+		CONFIG_SYS_DDRCMD_EN_DLL,
+		CONFIG_SYS_DDRCMD_RES_DLL,
+		CONFIG_SYS_DDRCMD_PCHG_ALL,
+		CONFIG_SYS_DDRCMD_RFSH,
+		CONFIG_SYS_DDRCMD_RFSH,
+		CONFIG_SYS_MICRON_INIT_DEV_OP,
+		CONFIG_SYS_DDRCMD_OCD_DEFAULT,
+		CONFIG_SYS_DDRCMD_OCD_EXIT,
+		CONFIG_SYS_DDRCMD_PCHG_ALL,
+		CONFIG_SYS_DDRCMD_NOP
+	};
+
+	return fixed_sdram(NULL, pdm360ng_init_seq,
+			   ARRAY_SIZE(pdm360ng_init_seq));
+}
+
+#if defined(CONFIG_SERIAL_MULTI)
+static int set_lcd_brightness(char *);
+#endif
+
+int misc_init_r(void)
+{
+	volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
+
+#ifdef CONFIG_FSL_DIU_FB
+# if	!(defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE))
+	mpc5121_diu_init();
+#endif
+#if defined(CONFIG_SERIAL_MULTI)
+	set_lcd_brightness(0);
+#endif
+	/* Switch LCD-Backlight and LVDS-Interface on */
+	setbits_be32(&im->gpio.gpdir, 0x01040000);
+	clrsetbits_be32(&im->gpio.gpdat, 0x01000000, 0x00040000);
+#endif
+
+#if defined(CONFIG_HARD_I2C)
+	if (!getenv("ethaddr")) {
+		uchar buf[6];
+		uchar ifm_oui[3] = { 0, 2, 1, };
+		int ret;
+
+		/* I2C-0 for on-board eeprom */
+		i2c_set_bus_num(CONFIG_SYS_I2C_EEPROM_BUS_NUM);
+
+		/* Read ethaddr from EEPROM */
+		ret = i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR,
+			       CONFIG_SYS_I2C_EEPROM_MAC_OFFSET, 1, buf, 6);
+		if (ret != 0) {
+			printf("Error: Unable to read MAC from I2C"
+				" EEPROM at address %02X:%02X\n",
+				CONFIG_SYS_I2C_EEPROM_ADDR,
+				CONFIG_SYS_I2C_EEPROM_MAC_OFFSET);
+			return 1;
+		}
+
+		/* Owned by IFM ? */
+		if (memcmp(buf, ifm_oui, sizeof(ifm_oui))) {
+			printf("Illegal MAC address in EEPROM: %pM\n", buf);
+			return 1;
+		}
+
+		eth_setenv_enetaddr("ethaddr", buf);
+	}
+#endif /* defined(CONFIG_HARD_I2C) */
+
+	return 0;
+}
+
+static  iopin_t ioregs_init[] = {
+	/* FUNC1=LPC_CS4 */
+	{
+		offsetof(struct ioctrl512x, io_control_pata_ce1), 1, 0,
+		IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(1) |
+		IO_PIN_PUE(1) | IO_PIN_ST(0) | IO_PIN_DS(3)
+	},
+	/* FUNC3=GPIO10 */
+	{
+		offsetof(struct ioctrl512x, io_control_pata_ce2), 1, 0,
+		IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
+	},
+	/* FUNC1=CAN3_TX */
+	{
+		offsetof(struct ioctrl512x, io_control_pata_isolate), 1, 0,
+		IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
+	},
+	/* FUNC3=GPIO14 */
+	{
+		offsetof(struct ioctrl512x, io_control_pata_iochrdy), 1, 0,
+		IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
+	},
+	/* FUNC2=DIU_LD22 Sets Next 2 to DIU_LD pads */
+	/* DIU_LD22-DIU_LD23 */
+	{
+		offsetof(struct ioctrl512x, io_control_pci_ad31), 2, 0,
+		IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(1)
+	},
+	/* FUNC2=USB1_DATA7 Sets Next 12 to USB1 pads */
+	/* USB1_DATA7-USB1_DATA0, USB1_STOP, USB1_NEXT, USB1_CLK, USB1_DIR */
+	{
+		offsetof(struct ioctrl512x, io_control_pci_ad29), 12, 0,
+		IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(1)
+	},
+	/* FUNC1=VIU_DATA0 Sets Next 3 to VIU_DATA pads */
+	/* VIU_DATA0-VIU_DATA2 */
+	{
+		offsetof(struct ioctrl512x, io_control_pci_ad17), 3, 0,
+		IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(1)
+	},
+	/* FUNC2=FEC_TXD_0 */
+	{
+		offsetof(struct ioctrl512x, io_control_pci_ad14), 1, 0,
+		IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(1)
+	},
+	/* FUNC1=VIU_DATA3 Sets Next 2 to VIU_DATA pads */
+	/* VIU_DATA3, VIU_DATA4 */
+	{
+		offsetof(struct ioctrl512x, io_control_pci_ad13), 2, 0,
+		IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(1)
+	},
+	/* FUNC2=FEC_RXD_1 Sets Next 12 to FEC pads */
+	/* FEC_RXD_1, FEC_RXD_0, FEC_RX_CLK, FEC_TX_CLK, FEC_RX_ER, FEC_RX_DV */
+	/* FEC_TX_EN, FEC_TX_ER, FEC_CRS, FEC_MDC, FEC_MDIO, FEC_COL */
+	{
+		offsetof(struct ioctrl512x, io_control_pci_ad11), 12, 0,
+		IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(1)
+	},
+	/* FUNC2=DIU_LD03 Sets Next 25 to DIU pads */
+	/* DIU_LD00-DIU_LD21 */
+	{
+		offsetof(struct ioctrl512x, io_control_pci_cbe0), 22, 0,
+		IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(1)
+	},
+	/* FUNC2=DIU_CLK Sets Next 3 to DIU pads */
+	/* DIU_CLK, DIU_VSYNC, DIU_HSYNC */
+	{
+		offsetof(struct ioctrl512x, io_control_spdif_txclk), 3, 0,
+		IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
+	},
+	/* FUNC2=CAN3_RX */
+	{
+		offsetof(struct ioctrl512x, io_control_irq1), 1, 0,
+		IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
+	},
+	/* Sets lowest slew on 2 CAN_TX Pins*/
+	{
+		offsetof(struct ioctrl512x, io_control_can1_tx), 2, 0,
+		IO_PIN_FMUX(0) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
+	},
+	/* FUNC3=CAN4_TX Sets Next 2 to CAN4 pads */
+	/* CAN4_TX, CAN4_RX */
+	{
+		offsetof(struct ioctrl512x, io_control_j1850_tx), 2, 0,
+		IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
+	},
+	/* FUNC3=GPIO8 Sets Next 2 to GPIO pads */
+	/* GPIO8, GPIO9 */
+	{
+		offsetof(struct ioctrl512x, io_control_psc0_0), 2, 0,
+		IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
+	},
+	/* FUNC1=FEC_TXD_1 Sets Next 3 to FEC pads */
+	/* FEC_TXD_1, FEC_TXD_2, FEC_TXD_3 */
+	{
+		offsetof(struct ioctrl512x, io_control_psc0_4), 3, 0,
+		IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
+	},
+	/* FUNC1=FEC_RXD_3 Sets Next 2 to FEC pads */
+	/* FEC_RXD_3, FEC_RXD_2 */
+	{
+		offsetof(struct ioctrl512x, io_control_psc1_4), 2, 0,
+		IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
+	},
+	/* FUNC3=GPIO17 */
+	{
+		offsetof(struct ioctrl512x, io_control_psc2_1), 1, 0,
+		IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
+	},
+	/* FUNC3=GPIO2/GPT2 Sets Next 3 to GPIO pads */
+	/* GPIO2, GPIO20, GPIO21 */
+	{
+		offsetof(struct ioctrl512x, io_control_psc2_4), 3, 0,
+		IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
+	},
+	/* FUNC2=VIU_PIX_CLK */
+	{
+		offsetof(struct ioctrl512x, io_control_psc3_4), 1, 0,
+		IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
+	},
+	/* FUNC3=GPIO24 Sets Next 2 to GPIO pads */
+	/* GPIO24, GPIO25 */
+	{
+		offsetof(struct ioctrl512x, io_control_psc4_0), 2, 0,
+		IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
+	},
+	/* FUNC1=NFC_CE2 */
+	{
+		offsetof(struct ioctrl512x, io_control_psc4_4), 1, 0,
+		IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(1) |
+		IO_PIN_PUE(1) | IO_PIN_ST(0) | IO_PIN_DS(0)
+	},
+	/* FUNC2=VIU_DATA5 Sets Next 5 to VIU_DATA pads */
+	/* VIU_DATA5-VIU_DATA9 */
+	{
+		offsetof(struct ioctrl512x, io_control_psc5_0), 5, 0,
+		IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
+	},
+	/* FUNC1=LPC_TSIZ1 Sets Next 2 to LPC_TSIZ pads */
+	/* LPC_TSIZ1-LPC_TSIZ2 */
+	{
+		offsetof(struct ioctrl512x, io_control_psc6_0), 2, 0,
+		IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
+	},
+	/* FUNC1=LPC_TS */
+	{
+		offsetof(struct ioctrl512x, io_control_psc6_4), 1, 0,
+		IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
+	},
+	/* FUNC3=GPIO16 */
+	{
+		offsetof(struct ioctrl512x, io_control_psc7_0), 1, 0,
+		IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
+	},
+	/* FUNC3=GPIO18 Sets Next 3 to GPIO pads */
+	/* GPIO18-GPIO19, GPT7/GPIO7 */
+	{
+		offsetof(struct ioctrl512x, io_control_psc7_2), 3, 0,
+		IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
+	},
+	/* FUNC3=GPIO0/GPT0 */
+	{
+		offsetof(struct ioctrl512x, io_control_psc8_4), 1, 0,
+		IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
+	},
+	/* FUNC3=GPIO11 Sets Next 4 to GPIO pads */
+	/* GPIO11, GPIO2, GPIO12, GPIO13 */
+	{
+		offsetof(struct ioctrl512x, io_control_psc10_3), 4, 0,
+		IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0)
+	},
+	/* FUNC2=DIU_DE */
+	{
+		offsetof(struct ioctrl512x, io_control_psc11_4), 1, 0,
+		IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
+	}
+};
+
+int checkboard (void)
+{
+	volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
+
+	puts("Board: PDM360NG\n");
+
+	/* initialize function mux & slew rate IO inter alia on IO Pins  */
+
+	iopin_initialize(ioregs_init, ARRAY_SIZE(ioregs_init));
+
+	/* initialize IO_CONTROL_GP (GPIO/GPT-mux-register) */
+	setbits_be32(&im->io_ctrl.io_control_gp,
+		     (1 << 0) |   /* GP_MUX7->GPIO7 */
+		     (1 << 5));	  /* GP_MUX2->GPIO2 */
+
+	/* configure GPIO24 (VIU_CE), output/high */
+	setbits_be32(&im->gpio.gpdir, 0x80);
+	setbits_be32(&im->gpio.gpdat, 0x80);
+
+	return 0;
+}
+
+#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
+#ifdef CONFIG_FDT_FIXUP_PARTITIONS
+struct node_info nodes[] = {
+	{ "fsl,mpc5121-nfc",	MTD_DEV_TYPE_NAND, },
+	{ "cfi-flash",		MTD_DEV_TYPE_NOR,  },
+};
+#endif
+
+void ft_board_setup(void *blob, bd_t *bd)
+{
+	ft_cpu_setup(blob, bd);
+	fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
+#ifdef CONFIG_FDT_FIXUP_PARTITIONS
+	fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
+#endif
+}
+#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */
+
+#if defined(CONFIG_SERIAL_MULTI)
+/*
+ * If argument is NULL, set the LCD brightness to the
+ * value from "brightness" environment variable. Set
+ * the LCD brightness to the value specified by the
+ * argument otherwise. Default brightness is zero.
+ */
+#define MAX_BRIGHTNESS	99
+static int set_lcd_brightness(char *brightness)
+{
+	struct stdio_dev *cop_port;
+	char *env;
+	char cmd_buf[20];
+	int val = 0;
+	int cs = 0;
+	int len, i;
+
+	if (brightness) {
+		val = simple_strtol(brightness, NULL, 10);
+	} else {
+		env = getenv("brightness");
+		if (env)
+			val = simple_strtol(env, NULL, 10);
+	}
+
+	if (val < 0)
+		val = 0;
+
+	if (val > MAX_BRIGHTNESS)
+		val = MAX_BRIGHTNESS;
+
+	sprintf(cmd_buf, "$SB;%04d;", val);
+
+	len = strlen(cmd_buf);
+	for (i = 1; i <= len; i++)
+		cs += cmd_buf[i];
+
+	cs = (~cs + 1) & 0xff;
+	sprintf(cmd_buf + len, "%02X\n", cs);
+
+	/* IO Coprocessor communication */
+	cop_port = open_port(4, CONFIG_SYS_PDM360NG_COPROC_BAUDRATE);
+	if (!cop_port) {
+		printf("Error: Can't open IO Coprocessor port.\n");
+		return -1;
+	}
+
+	debug("%s: cmd: %s", __func__, cmd_buf);
+	write_port(cop_port, cmd_buf);
+	/*
+	 * Wait for transmission and maybe response data
+	 * before closing the port.
+	 */
+	udelay(CONFIG_SYS_PDM360NG_COPROC_READ_DELAY);
+	memset(cmd_buf, 0, sizeof(cmd_buf));
+	len = read_port(cop_port, cmd_buf, sizeof(cmd_buf));
+	if (len)
+		printf("Error: %s\n", cmd_buf);
+
+	close_port(4);
+
+	return 0;
+}
+
+static int cmd_lcd_brightness(cmd_tbl_t *cmdtp, int flag,
+			      int argc, char *argv[])
+{
+	if (argc < 2) {
+		cmd_usage(cmdtp);
+		return 1;
+	}
+
+	return set_lcd_brightness(argv[1]);
+}
+
+U_BOOT_CMD(lcdbr, 2, 1, cmd_lcd_brightness,
+	"set LCD brightness",
+	"<brightness> - set LCD backlight level to <brightness>.\n"
+);
+#endif /* CONFIG_SERIAL_MULTI */
diff --git a/include/configs/mpc5121-common.h b/include/configs/mpc5121-common.h
new file mode 100644
index 0000000..96fab20
--- /dev/null
+++ b/include/configs/mpc5121-common.h
@@ -0,0 +1,53 @@
+/*
+ * (C) Copyright 2010 DENX Software Engineering
+ * Anatolij Gustschin <agust@denx.de>
+ *
+ * Common configuration options for MPC5121 based boards
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __MPC5121_COMMON_H
+#define __MPC5121_COMMON_H
+
+/* Use SRAM for initial stack */
+#define CONFIG_SYS_INIT_RAM_ADDR	CONFIG_SYS_SRAM_BASE /* Init RAM base */
+#define CONFIG_SYS_INIT_RAM_END		CONFIG_SYS_SRAM_SIZE /* End of area */
+
+#define CONFIG_SYS_GBL_DATA_SIZE	0x100	/* num bytes of initial data */
+#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - \
+					 CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_POST_WORD_ADDR	(CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
+#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_POST_WORD_ADDR
+
+#define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest region */
+#define CONFIG_SYS_MEMTEST_END		0x00400000
+
+/*
+ * Serial console
+ */
+#define CONFIG_BAUDRATE		115200
+#define CONFIG_SYS_BAUDRATE_TABLE \
+	{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
+
+#define CONFIG_CMDLINE_EDITING		1	/* command line history */
+/* Use the HUSH parser */
+#define CONFIG_SYS_HUSH_PARSER
+#ifdef CONFIG_SYS_HUSH_PARSER
+#define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
+#endif
+
+#endif /* __MPC5121_COMMON_H */
diff --git a/include/configs/pdm360ng.h b/include/configs/pdm360ng.h
new file mode 100644
index 0000000..b7d8221
--- /dev/null
+++ b/include/configs/pdm360ng.h
@@ -0,0 +1,492 @@
+/*
+ * (C) Copyright 2009
+ * Michael Wei??, ifm ecomatic gmbh, <michael.weiss@ifm.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * pdm360ng board configuration file
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#define CONFIG_PDM360NG 1
+#define CONFIG_PDM360NG_BIG	/* PDM360NG with big memory */
+
+/*
+ * Memory map for the PDM360NG board:
+ *
+ * 0x0000_0000 - 0x1FFF_FFFF	DDR RAM (512 MB)
+ * 0x2000_0000 - 0x3FFF_FFFF	reserved (DDR RAM (512 MB)
+ * 0x5000_0000 - 0x5001_FFFF	SRAM (128 KB)
+ * 0x5004_0000 - 0x5005_FFFF	MRAM (CS2) (128 KB)
+ * 0x8000_0000 - 0x803F_FFFF	IMMR (4 MB)
+ * 0xF000_0000 - 0xF7FF_FFFF	NOR FLASH (CS0) (128 MB)
+ * 0xF800_0000 - 0xFFFF_FFFF	NOR FLASH (CS1) (128 MB)
+ */
+
+/*
+ * High Level Configuration Options
+ */
+#define CONFIG_E300		1	/* E300 Family */
+#define CONFIG_MPC512X		1	/* MPC512X family */
+#define CONFIG_FSL_DIU_FB	1	/* FSL DIU */
+
+/* Used for silent command in environment */
+#define CONFIG_SYS_DEVICE_NULLDEV
+#define CONFIG_SILENT_CONSOLE
+
+/* Video */
+#define CONFIG_VIDEO
+
+#if defined(CONFIG_VIDEO)
+#define CONFIG_CFB_CONSOLE
+#define CONFIG_VGA_AS_SINGLE_DEVICE
+#define CONFIG_SPLASH_SCREEN
+#define CONFIG_VIDEO_LOGO
+#define CONFIG_VIDEO_BMP_RLE8
+#define CONFIG_VIDEO_XRES	800
+#define CONFIG_VIDEO_YRES	480
+#endif
+
+#define CONFIG_SYS_MPC512X_CLKIN	33333333	/* in Hz */
+
+#define CONFIG_BOARD_EARLY_INIT_F	/* call board_early_init_f() */
+#define CONFIG_MISC_INIT_R
+
+#define CONFIG_SYS_IMMR			0x80000000
+#define CONFIG_SYS_DIU_ADDR		((CONFIG_SYS_IMMR) + 0x2100)
+
+/*
+ * DDR Setup
+ */
+
+/* DDR is system memory */
+#define CONFIG_SYS_DDR_BASE		0x00000000
+#define CONFIG_SYS_SDRAM_BASE		CONFIG_SYS_DDR_BASE
+
+/* DDR pin mux and slew rate */
+#define CONFIG_SYS_IOCTRL_MUX_DDR	0x00000012
+
+/* Manually set all parameters as there's no SPD etc. */
+#ifdef CONFIG_PDM360NG_BIG
+/*
+ * DDR Controller Configuration for Micron DDR2 SDRAM MT47H128M8-3
+ *
+ * SYS_CFG:
+ *	[31:31]	MDDRC Soft Reset:	Diabled
+ *	[30:30]	DRAM CKE pin:		Enabled
+ *	[29:29]	DRAM CLK:		Enabled
+ *	[28:28]	Command Mode:		Enabled (For initialization only)
+ *	[27:25]	DRAM Row Select:	dram_row[15:0] = magenta_address[25:10]
+ *	[24:21]	DRAM Bank Select:	dram_bank[1:0] = magenta_address[11:10]
+ *	[20:19]	Read Test:		DON'T USE
+ *	[18:18]	Self Refresh:		Enabled
+ *	[17:17]	16bit Mode:		Disabled
+ *	[16:13] Read Delay:		3
+ *	[12:12]	Half DQS Delay:		Disabled
+ *	[11:11]	Quarter DQS Delay:	Disabled
+ *	[10:08]	Write Delay:		2
+ *	[07:07]	Early ODT:		Disabled
+ *	[06:06]	On DIE Termination:	Enabled
+ *	[05:05]	FIFO Overflow Clear:	DON'T USE here
+ *	[04:04]	FIFO Underflow Clear:	DON'T USE here
+ *	[03:03]	FIFO Overflow Pending:	DON'T USE here
+ *	[02:02]	FIFO Underlfow Pending:	DON'T USE here
+ *	[01:01]	FIFO Overlfow Enabled:	Enabled
+ *	[00:00]	FIFO Underflow Enabled:	Enabled
+ * TIME_CFG0
+ *	[31:16]	DRAM Refresh Time:	0 CSB clocks
+ *	[15:8]	DRAM Command Time:	0 CSB clocks
+ *	[07:00]	DRAM Precharge Time:	0 CSB clocks
+ * TIME_CFG1
+ *	[31:26]	DRAM tRFC:
+ *	[25:21]	DRAM tWR1:
+ *	[20:17]	DRAM tWRT1:
+ *	[16:11]	DRAM tDRR:
+ *	[10:05]	DRAM tRC:
+ *	[04:00]	DRAM tRAS:
+ * TIME_CFG2
+ *	[31:28]	DRAM tRCD:
+ *	[27:23]	DRAM tFAW:
+ *	[22:19]	DRAM tRTW1:
+ *	[18:15]	DRAM tCCD:
+ *	[14:10] DRAM tRTP:
+ *	[09:05]	DRAM tRP:
+ *	[04:00] DRAM tRPA
+ */
+
+#define CONFIG_SYS_MDDRC_SYS_CFG	0xEA804A40
+#define CONFIG_SYS_MDDRC_TIME_CFG0	0x030C3D2E
+#define CONFIG_SYS_MDDRC_TIME_CFG1	0x68EC1168
+#define CONFIG_SYS_MDDRC_TIME_CFG2	0x34310864
+#else
+/* 128 MB configuration */
+#define CONFIG_SYS_MDDRC_SYS_CFG	0xE8604A40
+#define CONFIG_SYS_MDDRC_TIME_CFG0	0x030C3D2E
+#define CONFIG_SYS_MDDRC_TIME_CFG1	0x3CEC1168
+#define CONFIG_SYS_MDDRC_TIME_CFG2	0x33310863
+#endif
+
+#define CONFIG_SYS_MDDRC_SYS_CFG_EN	0xF0000000
+
+#define CONFIG_SYS_DDRCMD_NOP		0x01380000
+#define CONFIG_SYS_DDRCMD_PCHG_ALL	0x01100400
+#define CONFIG_SYS_DDRCMD_EM2		0x01020000  /* EMR2 */
+#define CONFIG_SYS_DDRCMD_EM3		0x01030000  /* EMR3 */
+/* EMR with 150 ohm ODT todo: verify */
+#define CONFIG_SYS_DDRCMD_EN_DLL	0x01010040
+#define CONFIG_SYS_DDRCMD_RES_DLL	0x01000100
+#define CONFIG_SYS_DDRCMD_RFSH		0x01080000
+#define CONFIG_SYS_MICRON_INIT_DEV_OP	0x01000432
+/* EMR with 150 ohm ODT todo: verify */
+#define CONFIG_SYS_DDRCMD_OCD_DEFAULT	0x010107C0
+/* EMR new command with 150 ohm ODT todo: verify */
+#define CONFIG_SYS_DDRCMD_OCD_EXIT	0x01010440
+
+/* DDR Priority Manager Configuration */
+#define CONFIG_SYS_MDDRCGRP_PM_CFG1	0x00077777
+#define CONFIG_SYS_MDDRCGRP_PM_CFG2	0x00000000
+#define CONFIG_SYS_MDDRCGRP_HIPRIO_CFG	0x00000001
+#define CONFIG_SYS_MDDRCGRP_LUT0_MU	0xFFEEDDCC
+#define CONFIG_SYS_MDDRCGRP_LUT0_ML	0xBBAAAAAA
+#define CONFIG_SYS_MDDRCGRP_LUT1_MU	0x66666666
+#define CONFIG_SYS_MDDRCGRP_LUT1_ML	0x55555555
+#define CONFIG_SYS_MDDRCGRP_LUT2_MU	0x44444444
+#define CONFIG_SYS_MDDRCGRP_LUT2_ML	0x44444444
+#define CONFIG_SYS_MDDRCGRP_LUT3_MU	0x55555555
+#define CONFIG_SYS_MDDRCGRP_LUT3_ML	0x55555558
+#define CONFIG_SYS_MDDRCGRP_LUT4_MU	0x11111111
+#define CONFIG_SYS_MDDRCGRP_LUT4_ML	0x11111122
+#define CONFIG_SYS_MDDRCGRP_LUT0_AU	0xaaaaaaaa
+#define CONFIG_SYS_MDDRCGRP_LUT0_AL	0xaaaaaaaa
+#define CONFIG_SYS_MDDRCGRP_LUT1_AU	0x66666666
+#define CONFIG_SYS_MDDRCGRP_LUT1_AL	0x66666666
+#define CONFIG_SYS_MDDRCGRP_LUT2_AU	0x11111111
+#define CONFIG_SYS_MDDRCGRP_LUT2_AL	0x11111111
+#define CONFIG_SYS_MDDRCGRP_LUT3_AU	0x11111111
+#define CONFIG_SYS_MDDRCGRP_LUT3_AL	0x11111111
+#define CONFIG_SYS_MDDRCGRP_LUT4_AU	0x11111111
+#define CONFIG_SYS_MDDRCGRP_LUT4_AL	0x11111111
+
+/*
+ * NOR FLASH on the Local Bus
+ */
+#define CONFIG_SYS_FLASH_CFI			/* use Common Flash Interface */
+#define CONFIG_FLASH_CFI_DRIVER			/* use the CFI driver */
+
+#ifdef CONFIG_PDM360NG_BIG
+#define CONFIG_SYS_FLASH_BASE		0xF0000000 /* start of FLASH-Bank0 */
+#define CONFIG_SYS_FLASH1_BASE		0xF8000000 /* start of FLASH-Bank1 */
+#define CONFIG_SYS_FLASH_SIZE		0x08000000 /* max flash size of Bank0 */
+#define CONFIG_SYS_FLASH1_SIZE		0x08000000 /* max flash size of Bank1 */
+/* 512 sectors with size 0x40000 for 128MB */
+#define CONFIG_SYS_MAX_FLASH_SECT	512	   /* max sectors per device */
+#else
+#define CONFIG_SYS_FLASH_BASE		0xF0000000 /* start of FLASH-Bank0 */
+#define CONFIG_SYS_FLASH1_BASE		0xF4000000 /* start of FLASH-Bank1 */
+#define CONFIG_SYS_FLASH_SIZE		0x04000000 /* max flash size of Bank0 */
+#define CONFIG_SYS_FLASH1_SIZE		0x04000000 /* max flash size of Bank1 */
+/* 256 sectors with size 0x40000 for 64MB */
+#define CONFIG_SYS_MAX_FLASH_SECT	256	   /* max sectors per device */
+#endif
+
+#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
+#define CONFIG_SYS_MAX_FLASH_BANKS	2	/* number of banks */
+#define CONFIG_SYS_FLASH_BANKS_LIST \
+	{CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH1_BASE}
+
+#define CONFIG_SYS_SRAM_BASE		0x50000000
+#define CONFIG_SYS_SRAM_SIZE		0x00020000	/* 128 KB */
+
+/* ALE active low, data size 4 bytes */
+#define CONFIG_SYS_CS0_CFG		0x05059350
+/* ALE active low, data size 4 bytes */
+#define CONFIG_SYS_CS1_CFG		0x05059350
+
+#define CONFIG_SYS_MRAM_BASE		0x50040000
+#define CONFIG_SYS_MRAM_SIZE		0x00020000
+/* ALE active low, data size 4 bytes */
+#define CONFIG_SYS_CS2_CFG		0x05059110
+
+/* alt. CS timing for CS0, CS1, CS2 */
+#define CONFIG_SYS_CS_ALETIMING		0x00000007
+
+/*
+ * NAND FLASH
+ */
+#define CONFIG_CMD_NAND			/* enable NAND support */
+#define CONFIG_NAND_MPC5121_NFC
+#define CONFIG_SYS_NAND_BASE            0x40000000
+
+#define CONFIG_SYS_MAX_NAND_DEVICE      1
+#define NAND_MAX_CHIPS                  CONFIG_SYS_MAX_NAND_DEVICE
+#define CONFIG_SYS_NAND_SELECT_DEVICE	/* driver supports mutipl. chips */
+
+/*
+ * Configuration parameters for MPC5121 NAND driver
+ */
+#define CONFIG_FSL_NFC_WIDTH 1
+#define CONFIG_FSL_NFC_WRITE_SIZE 2048
+#define CONFIG_FSL_NFC_SPARE_SIZE 64
+#define CONFIG_FSL_NFC_CHIPS CONFIG_SYS_MAX_NAND_DEVICE
+
+/*
+ * Dynamic MTD partition support
+ */
+#define CONFIG_CMD_MTDPARTS
+#define CONFIG_MTD_DEVICE	/* needed for mtdparts commands */
+#define CONFIG_FLASH_CFI_MTD
+#define MTDIDS_DEFAULT		"nor0=f0000000.flash,nor1=f8000000.flash," \
+						"nand0=MPC5121 NAND"
+
+/*
+ * Flash layout
+ */
+#define MTDPARTS_DEFAULT	"mtdparts=f0000000.flash:512k(u-boot),"	\
+						"256k(environment1),"	\
+						"256k(environment2),"	\
+						"256k(splash-factory)," \
+						"2m(FIT: recovery),"	\
+						"4608k(fs-recovery),"   \
+						"256k(splash-customer),"\
+						"5m(FIT: kernel+dtb),"	\
+						"64m(rootfs squash)ro,"	\
+						"51m(userfs ubi);"	\
+					"f8000000.flash:-(unused);"	\
+					"MPC5121 NAND:1024m(extended-userfs)"
+
+/*
+ * Override partitions in device tree using info
+ * in "mtdparts" environment variable
+ */
+#ifdef CONFIG_CMD_MTDPARTS
+#define CONFIG_FDT_FIXUP_PARTITIONS
+#endif
+
+#define CONFIG_SYS_MONITOR_BASE		TEXT_BASE	/* Start of monitor */
+#define CONFIG_SYS_MONITOR_LEN		(512 * 1024)	/* 512 kB for monitor */
+#ifdef	CONFIG_FSL_DIU_FB
+#define CONFIG_SYS_MALLOC_LEN		(6 * 1024 * 1024) /* for malloc */
+#else
+#define CONFIG_SYS_MALLOC_LEN		(512 * 1024)
+#endif
+
+/*
+ * Serial Port
+ */
+#define CONFIG_CONS_INDEX     1
+
+/*
+ * Serial console configuration
+ */
+#define CONFIG_PSC_CONSOLE	6	/* console is on PSC6 */
+#if CONFIG_PSC_CONSOLE != 6
+#error CONFIG_PSC_CONSOLE must be 6
+#endif
+
+#define CONSOLE_FIFO_TX_SIZE	FIFOC_PSC6_TX_SIZE
+#define CONSOLE_FIFO_TX_ADDR	FIFOC_PSC6_TX_ADDR
+#define CONSOLE_FIFO_RX_SIZE	FIFOC_PSC6_RX_SIZE
+#define CONSOLE_FIFO_RX_ADDR	FIFOC_PSC6_RX_ADDR
+
+/*
+ * Used PSC UART devices
+ */
+#define CONFIG_SERIAL_MULTI
+#define CONFIG_SYS_PSC1
+#define CONFIG_SYS_PSC4
+#define CONFIG_SYS_PSC6
+
+/*
+ * Co-processor communication parameters
+ */
+#define CONFIG_SYS_PDM360NG_COPROC_READ_DELAY	5000
+#define CONFIG_SYS_PDM360NG_COPROC_BAUDRATE	38400
+
+/*
+ * I2C
+ */
+#define CONFIG_HARD_I2C			/* I2C with hardware support */
+#define CONFIG_I2C_MULTI_BUS
+#define CONFIG_I2C_CMD_TREE
+/* I2C speed and slave address */
+#define CONFIG_SYS_I2C_SPEED		100000
+#define CONFIG_SYS_I2C_SLAVE		0x7F
+
+/*
+ * EEPROM configuration
+ */
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		2	/* 16-bit EEPROM addr */
+#define CONFIG_SYS_I2C_EEPROM_ADDR		0x50	/* ST AT24C01 */
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	10	/* 10ms of delay */
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	4	/* 16-Byte Write Mode */
+
+/*
+ * MAC addr in EEPROM
+ */
+#define CONFIG_SYS_I2C_EEPROM_BUS_NUM		0
+#define CONFIG_SYS_I2C_EEPROM_MAC_OFFSET	0x10
+/*
+ * Enabled only to delete "ethaddr" before testing
+ * "ethaddr" setting from EEPROM
+ */
+#define CONFIG_ENV_OVERWRITE
+
+/*
+ * Ethernet configuration
+ */
+#define CONFIG_MPC512x_FEC	1
+#define CONFIG_NET_MULTI
+#define CONFIG_PHY_ADDR		0x1F
+#define CONFIG_MII		1	/* MII PHY management	*/
+#define CONFIG_FEC_AN_TIMEOUT	1
+#define CONFIG_HAS_ETH0
+
+/*
+ * Configure on-board RTC
+ */
+#define CONFIG_RTC_M41T62			/* use M41T00 rtc via i2c */
+#define CONFIG_SYS_I2C_RTC_ADDR		0x68	/* at address 0x68	*/
+
+/*
+ * Environment
+ */
+#define CONFIG_ENV_IS_IN_FLASH	1
+/* This has to be a multiple of the Flash sector size */
+#define CONFIG_ENV_ADDR		(CONFIG_SYS_MONITOR_BASE + \
+				 CONFIG_SYS_MONITOR_LEN)
+#define CONFIG_ENV_SIZE		0x2000
+#define CONFIG_ENV_SECT_SIZE	0x40000		/* one sector (256K) for env */
+
+/* Address and size of Redundant Environment Sector	*/
+#define CONFIG_ENV_ADDR_REDUND	(CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
+#define CONFIG_ENV_SIZE_REDUND	(CONFIG_ENV_SIZE)
+
+#define CONFIG_LOADS_ECHO	1	/* echo on for serial download */
+#define CONFIG_SYS_LOADS_BAUD_CHANGE	1	/* allow baudrate change */
+
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
+
+#ifdef CONFIG_VIDEO
+#define CONFIG_CMD_BMP
+#endif
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CONFIG_SYS_LONGHELP			/* undef to save memory */
+#define CONFIG_SYS_LOAD_ADDR	0x2000000	/* default load address */
+#define CONFIG_SYS_PROMPT	"=> "		/* Monitor Command Prompt */
+
+#ifdef CONFIG_CMD_KGDB
+	#define CONFIG_SYS_CBSIZE	1024	/* Console I/O Buffer Size */
+#else
+	#define CONFIG_SYS_CBSIZE	256	/* Console I/O Buffer Size */
+#endif
+
+/* Print Buffer Size */
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
+/* Max number of command args */
+#define CONFIG_SYS_MAXARGS	16
+/* Boot Argument Buffer Size */
+#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE
+/* Decrementer freq: 1ms ticks */
+#define CONFIG_SYS_HZ		1000
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization.
+ */
+/* Initial Memory map for Linux */
+#define CONFIG_SYS_BOOTMAPSZ	(8 << 20)
+
+/* Cache Configuration */
+#define CONFIG_SYS_DCACHE_SIZE		32768
+#define CONFIG_SYS_CACHELINE_SIZE	32
+#ifdef CONFIG_CMD_KGDB
+/* log base 2 of the above value */
+#define CONFIG_SYS_CACHELINE_SHIFT	5
+#endif
+
+#define CONFIG_SYS_HID0_INIT	0x000000000
+#define CONFIG_SYS_HID0_FINAL	(HID0_ENABLE_MACHINE_CHECK | HID0_ICE)
+#define CONFIG_SYS_HID2	HID2_HBE
+
+#define CONFIG_HIGH_BATS	1	/* High BATs supported */
+
+/*
+ * Internal Definitions
+ *
+ * Boot Flags
+ */
+#define BOOTFLAG_COLD		0x01	/* Normal Power-On: Boot from FLASH */
+#define BOOTFLAG_WARM		0x02	/* Software reboot */
+
+#ifdef CONFIG_CMD_KGDB
+#define CONFIG_KGDB_BAUDRATE	230400	/* speed of kgdb serial port */
+#define CONFIG_KGDB_SER_INDEX	2	/* which serial port to use */
+#endif
+
+/*
+ * Environment Configuration
+ */
+#define CONFIG_TIMESTAMP
+
+#define CONFIG_HOSTNAME		pdm360ng
+/* default location for tftp and bootm */
+#define CONFIG_LOADADDR		400000
+
+#define CONFIG_BOOTDELAY	5	/* -1 disables auto-boot */
+
+#define CONFIG_PREBOOT	"echo;"	\
+	"echo PDM360NG SAMPLE;" \
+	"echo"
+
+#define CONFIG_BOOTCOMMAND	"run env_cont"
+
+#define CONFIG_OF_LIBFDT	1
+#define CONFIG_OF_BOARD_SETUP	1
+#define CONFIG_OF_SUPPORT_OLD_DEVICE_TREES	1
+#define CONFIG_FIT
+#define CONFIG_FIT_VERBOSE
+
+#define OF_CPU			"PowerPC,5121@0"
+#define OF_SOC_COMPAT		"fsl,mpc5121-immr"
+#define OF_TBCLK		(bd->bi_busfreq / 4)
+#define OF_STDOUT_PATH		"/soc at 80000000/serial at 11600"
+
+/*
+ * Include common options for all mpc5121 boards
+ */
+#include "mpc5121-common.h"
+
+#endif	/* __CONFIG_H */
-- 
1.6.3.3

[U-Boot] [PATCH v3 3/3] mpc5121: pdm360ng: add coprocessor POST

[Anatolij Gustschin]

Adds coprocessor communication POST code.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
---
 board/pdm360ng/Makefile    |    1 +
 board/pdm360ng/post.c      |   75 ++++++++++++++++++++++++++++++++++++++++++++
 include/configs/pdm360ng.h |    5 +++
 include/post.h             |    1 +
 post/tests.c               |   13 +++++++
 5 files changed, 95 insertions(+), 0 deletions(-)
 create mode 100644 board/pdm360ng/post.c

diff --git a/board/pdm360ng/Makefile b/board/pdm360ng/Makefile
index 8513242..113ac0a 100644
--- a/board/pdm360ng/Makefile
+++ b/board/pdm360ng/Makefile
@@ -26,6 +26,7 @@ include $(TOPDIR)/config.mk
 LIB	= $(obj)lib$(BOARD).a
 
 COBJS-y	:= $(BOARD).o
+COBJS-$(CONFIG_HAS_POST)	+= post.o
 
 COBJS	:= $(COBJS-y)
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
diff --git a/board/pdm360ng/post.c b/board/pdm360ng/post.c
new file mode 100644
index 0000000..8e47c5e
--- /dev/null
+++ b/board/pdm360ng/post.c
@@ -0,0 +1,75 @@
+/*
+ * Co-Processor communication POST
+ */
+
+#include <common.h>
+#include <post.h>
+#include <serial.h>
+
+#if defined(CONFIG_SERIAL_MULTI)
+
+/*
+ * Actually the termination sequence of the coprocessor
+ * commands is "\r\n" (CR LF), but here we use a side effect of
+ * the putc() routine of the serial driver which checks for LF
+ * and sends CR before sending LF. Therefore the termination
+ * sequence in the command below is only "\n".
+ * "alive" string is the coprocessor response for ping command
+ * and not a command, therefore it is terminated with "\r\n".
+ */
+char alive[] = "$AL;38\r\n";
+char ping[] = "$PI;2C\n";
+
+int pdm360ng_coprocessor_post_test(int flags)
+{
+	struct stdio_dev *cop_port;
+	int ret;
+	char buf[10];
+
+	/* Test IO Coprocessor communication */
+	cop_port = open_port(4, CONFIG_SYS_PDM360NG_COPROC_BAUDRATE);
+	if (!cop_port)
+		return -1;
+
+	write_port(cop_port, ping);
+	udelay(CONFIG_SYS_PDM360NG_COPROC_READ_DELAY);
+
+	memset(buf, 0, sizeof(buf));
+	ret = read_port(cop_port, buf, sizeof(buf));
+	close_port(4);
+	if (ret <= 0) {
+		post_log("Error: Can't read IO Coprocessor port.\n");
+		return -1;
+	}
+
+	if (strcmp(buf, alive)) {
+		post_log("Error: IO-Cop. resp.: %s\n", buf);
+		return -1;
+	}
+
+	/* Test WD Coprocessor communication */
+	cop_port = open_port(1, CONFIG_SYS_PDM360NG_COPROC_BAUDRATE);
+	if (!cop_port) {
+		post_log("Error: Can't open WD Coprocessor port.\n");
+		return -1;
+	}
+
+	write_port(cop_port, ping);
+	udelay(CONFIG_SYS_PDM360NG_COPROC_READ_DELAY);
+
+	memset(buf, 0, sizeof(buf));
+	ret = read_port(cop_port, buf, sizeof(buf));
+	close_port(1);
+	if (ret <= 0) {
+		post_log("Error: Can't read WD Coprocessor port.\n");
+		return -1;
+	}
+
+	if (strcmp(buf, alive)) {
+		post_log("Error: WD-Cop. resp.: %s\n", buf);
+		return -1;
+	}
+
+	return 0;
+}
+#endif	/* CONFIG_SERIAL_MULTI */
diff --git a/include/configs/pdm360ng.h b/include/configs/pdm360ng.h
index b7d8221..8299e0c 100644
--- a/include/configs/pdm360ng.h
+++ b/include/configs/pdm360ng.h
@@ -456,6 +456,11 @@
 #define CONFIG_KGDB_SER_INDEX	2	/* which serial port to use */
 #endif
 
+#ifdef CONFIG_SERIAL_MULTI
+/* POST support */
+#define CONFIG_POST             (CONFIG_SYS_POST_COPROC)
+#endif
+
 /*
  * Environment Configuration
  */
diff --git a/include/post.h b/include/post.h
index ff83bce..3da959d 100644
--- a/include/post.h
+++ b/include/post.h
@@ -124,6 +124,7 @@ extern int post_hotkeys_pressed(void);
 #define CONFIG_SYS_POST_BSPEC4		0x00080000
 #define CONFIG_SYS_POST_BSPEC5		0x00100000
 #define CONFIG_SYS_POST_CODEC		0x00200000
+#define CONFIG_SYS_POST_COPROC		0x00400000
 
 #endif /* CONFIG_POST */
 
diff --git a/post/tests.c b/post/tests.c
index 3224f00..5c69157 100644
--- a/post/tests.c
+++ b/post/tests.c
@@ -53,6 +53,7 @@ extern int gdc_post_test (int flags);
 extern int fpga_post_test (int flags);
 extern int lwmon5_watchdog_post_test(int flags);
 extern int sysmon1_post_test(int flags);
+extern int pdm360ng_coprocessor_post_test(int flags);
 
 extern int sysmon_init_f (void);
 
@@ -286,6 +287,18 @@ struct post_test post_list[] =
 #if CONFIG_POST & CONFIG_SYS_POST_BSPEC5
 	CONFIG_POST_BSPEC5,
 #endif
+#if CONFIG_POST & CONFIG_SYS_POST_COPROC
+    {
+	"Coprocessors communication test",
+	"coproc_com",
+	"This test checks communication with coprocessors.",
+	POST_RAM | POST_ALWAYS | POST_CRITICAL,
+	&pdm360ng_coprocessor_post_test,
+	NULL,
+	NULL,
+	CONFIG_SYS_POST_COPROC
+    }
+#endif
 };
 
 unsigned int post_list_size = sizeof (post_list) / sizeof (struct post_test);
-- 
1.6.3.3

[U-Boot] [PATCH v3 3/3] mpc5121: pdm360ng: add coprocessor POST

[Wolfgang Denk]

Dear Anatolij Gustschin,

In message <1271254909-20398-4-git-send-email-agust@denx.de> you wrote:
> Adds coprocessor communication POST code.
> 
> Signed-off-by: Anatolij Gustschin <agust@denx.de>
> ---
>  board/pdm360ng/Makefile    |    1 +
>  board/pdm360ng/post.c      |   75 ++++++++++++++++++++++++++++++++++++++++++++
>  include/configs/pdm360ng.h |    5 +++
>  include/post.h             |    1 +
>  post/tests.c               |   13 +++++++
>  5 files changed, 95 insertions(+), 0 deletions(-)
>  create mode 100644 board/pdm360ng/post.c
...
> --- a/post/tests.c
> +++ b/post/tests.c
> @@ -53,6 +53,7 @@ extern int gdc_post_test (int flags);
>  extern int fpga_post_test (int flags);
>  extern int lwmon5_watchdog_post_test(int flags);
>  extern int sysmon1_post_test(int flags);
> +extern int pdm360ng_coprocessor_post_test(int flags);
>  
>  extern int sysmon_init_f (void);
>  
> @@ -286,6 +287,18 @@ struct post_test post_list[] =
>  #if CONFIG_POST & CONFIG_SYS_POST_BSPEC5
>  	CONFIG_POST_BSPEC5,
>  #endif
> +#if CONFIG_POST & CONFIG_SYS_POST_COPROC
> +    {
> +	"Coprocessors communication test",
> +	"coproc_com",
> +	"This test checks communication with coprocessors.",
> +	POST_RAM | POST_ALWAYS | POST_CRITICAL,
> +	&pdm360ng_coprocessor_post_test,
> +	NULL,
> +	NULL,
> +	CONFIG_SYS_POST_COPROC
> +    }
> +#endif
>  };

I don't want to see board specific code (pdm360ng_*) in such a global
file.  Please use a more generic approach.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
When a program is being  tested,  it  is  too  late  to  make  design
changes.                  -- Geoffrey James, "The Tao of Programming"

[U-Boot] [PATCH v3 3/3] mpc5121: pdm360ng: add coprocessor POST

[Detlev Zundel]

Hi Wolfgang,

> Dear Anatolij Gustschin,
>
> In message <1271254909-20398-4-git-send-email-agust@denx.de> you wrote:
>> Adds coprocessor communication POST code.
>> 
>> Signed-off-by: Anatolij Gustschin <agust@denx.de>
>> ---
>>  board/pdm360ng/Makefile    |    1 +
>>  board/pdm360ng/post.c      |   75 ++++++++++++++++++++++++++++++++++++++++++++
>>  include/configs/pdm360ng.h |    5 +++
>>  include/post.h             |    1 +
>>  post/tests.c               |   13 +++++++
>>  5 files changed, 95 insertions(+), 0 deletions(-)
>>  create mode 100644 board/pdm360ng/post.c
> ...
>> --- a/post/tests.c
>> +++ b/post/tests.c
>> @@ -53,6 +53,7 @@ extern int gdc_post_test (int flags);
>>  extern int fpga_post_test (int flags);
>>  extern int lwmon5_watchdog_post_test(int flags);
>>  extern int sysmon1_post_test(int flags);
>> +extern int pdm360ng_coprocessor_post_test(int flags);
>>  
>>  extern int sysmon_init_f (void);
>>  
>> @@ -286,6 +287,18 @@ struct post_test post_list[] =
>>  #if CONFIG_POST & CONFIG_SYS_POST_BSPEC5
>>  	CONFIG_POST_BSPEC5,
>>  #endif
>> +#if CONFIG_POST & CONFIG_SYS_POST_COPROC
>> +    {
>> +	"Coprocessors communication test",
>> +	"coproc_com",
>> +	"This test checks communication with coprocessors.",
>> +	POST_RAM | POST_ALWAYS | POST_CRITICAL,
>> +	&pdm360ng_coprocessor_post_test,
>> +	NULL,
>> +	NULL,
>> +	CONFIG_SYS_POST_COPROC
>> +    }
>> +#endif
>>  };
>
> I don't want to see board specific code (pdm360ng_*) in such a global
> file.  Please use a more generic approach.

Do you mean like for example CONFIG_POST_BSPEC1 used for lwmon5?

Anatolij, this should be straight forward.

Cheers
  Detlev

-- 
C hasn't changed much since the 1970s. And let's face it it's ugly.
Can't we do better? C++? (Sorry, never mind.)
                                    -- Rob Pike
--
DENX Software Engineering GmbH,      MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich,  Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: dzu at denx.de

[U-Boot] [PATCH v3 3/3] mpc5121: pdm360ng: add coprocessor POST

[Anatolij Gustschin]

Hi Detlev,

On Thu, 15 Apr 2010 11:18:13 +0200
Detlev Zundel <dzu@denx.de> wrote:

...
> >> @@ -286,6 +287,18 @@ struct post_test post_list[] =
> >>  #if CONFIG_POST & CONFIG_SYS_POST_BSPEC5
> >>  	CONFIG_POST_BSPEC5,
> >>  #endif
> >> +#if CONFIG_POST & CONFIG_SYS_POST_COPROC
> >> +    {
> >> +	"Coprocessors communication test",
> >> +	"coproc_com",
> >> +	"This test checks communication with coprocessors.",
> >> +	POST_RAM | POST_ALWAYS | POST_CRITICAL,
> >> +	&pdm360ng_coprocessor_post_test,
> >> +	NULL,
> >> +	NULL,
> >> +	CONFIG_SYS_POST_COPROC
> >> +    }
> >> +#endif
> >>  };
> >
> > I don't want to see board specific code (pdm360ng_*) in such a global
> > file.  Please use a more generic approach.
> 
> Do you mean like for example CONFIG_POST_BSPEC1 used for lwmon5?
> 
> Anatolij, this should be straight forward.

Similar was in the first patch version. But according to Wolfgang
this doesn't belong in the board config file.

Anatolij

[U-Boot] [PATCH v3 3/3] mpc5121: pdm360ng: add coprocessor POST

[Wolfgang Denk]

Dear Anatolij Gustschin,

In message <20100415112520.3b6c341d@wker> you wrote:
> 
> Similar was in the first patch version. But according to Wolfgang
> this doesn't belong in the board config file.

Eventually I did not understand the whole scope of the problem, then.
In any case we should keep such common files clear of board specific
stuff, and use feature specfic names instead.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
I express preference for a chronological  sequence  of  events  which
precludes a violence.   - Terry Pratchett, _The Dark Side of the Sun_

[U-Boot] [PATCH v3 3/3] mpc5121: pdm360ng: add coprocessor POST

[Wolfgang Denk]

Dear Detlev Zundel,

In message <m2bpdlf50q.fsf@ohwell.denx.de> you wrote:
> 
> >> @@ -286,6 +287,18 @@ struct post_test post_list[] =
> >>  #if CONFIG_POST & CONFIG_SYS_POST_BSPEC5
> >>  	CONFIG_POST_BSPEC5,
> >>  #endif
> >> +#if CONFIG_POST & CONFIG_SYS_POST_COPROC
> >> +    {
> >> +	"Coprocessors communication test",
> >> +	"coproc_com",
> >> +	"This test checks communication with coprocessors.",
> >> +	POST_RAM | POST_ALWAYS | POST_CRITICAL,
> >> +	&pdm360ng_coprocessor_post_test,
> >> +	NULL,
> >> +	NULL,
> >> +	CONFIG_SYS_POST_COPROC
> >> +    }
> >> +#endif
> >>  };
> >
> > I don't want to see board specific code (pdm360ng_*) in such a global
> > file.  Please use a more generic approach.
> 
> Do you mean like for example CONFIG_POST_BSPEC1 used for lwmon5?

That would be possible, too. But actually the ...POST_COPROC stuff
itself looks OK to me. It's just the "pdm360ng_coprocessor_post_test"
part that needs to be replaced by a more generic name.

I mean, the implementations for lwmon5 and sysmon1 are not exactly
elegant either, but at least they are a bit more generic.

> Anatolij, this should be straight forward.

That's what I thought, too.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Men will always be men -- no matter where they are.
	-- Harry Mudd, "Mudd's Women", stardate 1329.8

[U-Boot] [PATCH v3 3/3] mpc5121: pdm360ng: add coprocessor POST

[Anatolij Gustschin]

Hello Wolfgang,

On Wed, 14 Apr 2010 17:40:16 +0200
Wolfgang Denk <wd@denx.de> wrote:

> ...
> > --- a/post/tests.c
> > +++ b/post/tests.c
> > @@ -53,6 +53,7 @@ extern int gdc_post_test (int flags);
> >  extern int fpga_post_test (int flags);
> >  extern int lwmon5_watchdog_post_test(int flags);
> >  extern int sysmon1_post_test(int flags);
> > +extern int pdm360ng_coprocessor_post_test(int flags);
> >  
> >  extern int sysmon_init_f (void);
> >  
> > @@ -286,6 +287,18 @@ struct post_test post_list[] =
> >  #if CONFIG_POST & CONFIG_SYS_POST_BSPEC5
> >  	CONFIG_POST_BSPEC5,
> >  #endif
> > +#if CONFIG_POST & CONFIG_SYS_POST_COPROC
> > +    {
> > +	"Coprocessors communication test",
> > +	"coproc_com",
> > +	"This test checks communication with coprocessors.",
> > +	POST_RAM | POST_ALWAYS | POST_CRITICAL,
> > +	&pdm360ng_coprocessor_post_test,
> > +	NULL,
> > +	NULL,
> > +	CONFIG_SYS_POST_COPROC
> > +    }
> > +#endif
> >  };
> 
> I don't want to see board specific code (pdm360ng_*) in such a global
> file.  Please use a more generic approach.

What would be a preferred way to realize this? Defining a weak
function in post/post.c or post/tests.c which could be over-ridden
by board specific one? Like:

int __post_coprocessor_post_test(int flags)
{
        return 0;       
}
int coprocessor_post_test(int flags) 
        __attribute__((weak, alias("__post_coprocessor_post_test")));


Then I have to put board specific post code in board/pdm360ng/post.c
to the pdm360ng.c file back. Otherwise the board's
coprocessor_post_test() function is not linked if there is no other
code in this post.c file which is strongly-linked.

Anatolij

[U-Boot] [PATCH v3 3/3] mpc5121: pdm360ng: add coprocessor POST

[Wolfgang Denk]

Dear Anatolij Gustschin,

In message <20100415122416.050f31a8@wker> you wrote:
> 
> What would be a preferred way to realize this? Defining a weak
> function in post/post.c or post/tests.c which could be over-ridden
> by board specific one? Like:

This would eventually indeed allow for cleaner code, but then we
should also clean up the existing lwmon5 and sysmon1 code in the same
way.  I don't want to urge you doing that, though.

For now I would also accept the code as is, just with a more generic
function name.

> Then I have to put board specific post code in board/pdm360ng/post.c
> to the pdm360ng.c file back. Otherwise the board's
> coprocessor_post_test() function is not linked if there is no other
> code in this post.c file which is strongly-linked.

Actually board specific POST code should go to post/board/pdm360ng/

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Backed up the system lately?

[U-Boot] [PATCH v3 2/3] mpc5121: add support for PDM360NG board

[Wolfgang Denk]

Dear Anatolij Gustschin,

In message <1271254909-20398-3-git-send-email-agust@denx.de> you wrote:
> PDM360NG is a MPC5121E based board by ifm ecomatic gmbh.
...
>  - don't use DDR RAM size config macro, get_ram_size() is
>    used now in fixed_sdram() to determine RAM size (see
>    previous patch 1/3)

With this change, can we then not also get rid of manually defining
CONFIG_PDM360NG_BIG ?  We should be able to auto-detect the
configuration from the actual RAM size now, right?

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
"The glory of creation is in its infinite diversity." "And in the way
our differences combine to create meaning and beauty."
	-- Dr. Miranda Jones and Spock, "Is There in Truth No Beauty?",
	   stardate 5630.8

[U-Boot] [PATCH v3 2/3] mpc5121: add support for PDM360NG board

[Anatolij Gustschin]

Hello Wolfgang,

On Wed, 14 Apr 2010 17:48:40 +0200
Wolfgang Denk <wd@denx.de> wrote:

> In message <1271254909-20398-3-git-send-email-agust@denx.de> you wrote:
> > PDM360NG is a MPC5121E based board by ifm ecomatic gmbh.
> ...
> >  - don't use DDR RAM size config macro, get_ram_size() is
> >    used now in fixed_sdram() to determine RAM size (see
> >    previous patch 1/3)
> 
> With this change, can we then not also get rid of manually defining
> CONFIG_PDM360NG_BIG ?  We should be able to auto-detect the
> configuration from the actual RAM size now, right?

But another configuration for 128 MB uses different values
for DDR System Configuration Register and DDR Time Config[0-2]
Registers. We still need this config option.

Best regards,
Anatolij

[U-Boot] [PATCH v3 2/3] mpc5121: add support for PDM360NG board

[Stefan Roese]

Hi Anatolij,

On Thursday 15 April 2010 14:32:14 Anatolij Gustschin wrote:
> > With this change, can we then not also get rid of manually defining
> > CONFIG_PDM360NG_BIG ?  We should be able to auto-detect the
> > configuration from the actual RAM size now, right?
> 
> But another configuration for 128 MB uses different values
> for DDR System Configuration Register and DDR Time Config[0-2]
> Registers. We still need this config option.

On some 4xx boards, we have a similar SDRAM size auto-detection, using
different SDRAM controller setup's. It's done by first configuring the
max. size config option and testing its memory size (get_ram_size()).
If this size doesn't match the configured one (mirroring), then the next
smaller config option is used. And so on. This way we can have one binary
image supporting multiple SDRAM configurations.

I suggest you take a look at arch/ppc/cpu/ppc4xx/sdram.c:

sdram_conf_t mb0cf[] = {
        {(128 << 20), 13, 0x000A4001},      /* (0-128MB) Address Mode 3, 13x10(4) */
        {(64 << 20),  13, 0x00084001},      /* (0-64MB) Address Mode 3, 13x9(4)   */
        {(32 << 20),  12, 0x00062001},      /* (0-32MB) Address Mode 2, 12x9(4)   */
        {(16 << 20),  12, 0x00046001},      /* (0-16MB) Address Mode 4, 12x8(4)   */
        {(4 << 20),   11, 0x00008001},      /* (0-4MB) Address Mode 5, 11x8(2)    */
};

and initdram() where these struct is used.

Cheers,
Stefan

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DENX Software Engineering GmbH,      MD: Wolfgang Denk & Detlev Zundel
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[U-Boot] [PATCH v3 2/3] mpc5121: add support for PDM360NG board

[Wolfgang Denk]

Dear Anatolij Gustschin,

In message <20100415143214.3e10813d@wker> you wrote:
> 
> > With this change, can we then not also get rid of manually defining
> > CONFIG_PDM360NG_BIG ?  We should be able to auto-detect the
> > configuration from the actual RAM size now, right?
> 
> But another configuration for 128 MB uses different values
> for DDR System Configuration Register and DDR Time Config[0-2]
> Registers. We still need this config option.

Isn't there a way to auto-adjust these settings? On PowerPC, we
routinely use get_ram_size() to test different sets of memory
controller settings to auto-select the correct ones, allowing to use
one single binary image for all memory configurations.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
I have never understood the female capacity to avoid a direct  answer
to any question.
	-- Spock, "This Side of Paradise", stardate 3417.3

[U-Boot] [PATCH v3 1/3] mpc5121: determine RAM size using get_ram_size()

[Wolfgang Denk]

Dear Anatolij Gustschin,

In message <1271254909-20398-2-git-send-email-agust@denx.de> you wrote:
> Configure 1GiB address range in DDR LAW and
> determine the RAM size. Fix DDR LAW afterwards.

Why 1 GiB? Where is this linit coming from? It seems pretty artificial
to me?

> -	u32 msize = CONFIG_SYS_DDR_SIZE * 1024 * 1024;
> +	u32 msize = 1024 * 1024 * 1024;

I'd rather see a (#define'd) constant used here, espeaically as the
vlue is used again furhter doewn in the code...

>  	u32 i;
>  
> @@ -148,5 +148,10 @@ long int fixed_sdram(ddr512x_config_t *mddrc_config,
>  	out_be32(&im->mddrc.ddr_time_config0, mddrc_config->ddr_time_config0);
>  	out_be32(&im->mddrc.ddr_sys_config, mddrc_config->ddr_sys_config);
>  
> +	msize = get_ram_size(CONFIG_SYS_DDR_BASE, 0x40000000);

... i. e. here. Using two different notations for the same number
makes the code even hearder to read and understand.

I suggest we use CONFIG_SYS_MAX_RAM_SIZE like we do in so many other
boards, and leave it to the board maintainer to set a usefule default
value.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
"To IBM, 'open' means there is a modicum  of  interoperability  among
some of their equipment."                            - Harv Masterson

[U-Boot] [PATCH v3 1/3] mpc5121: determine RAM size using get_ram_size()

[Anatolij Gustschin]

Hello Wolfgang,

On Wed, 14 Apr 2010 17:31:47 +0200
Wolfgang Denk <wd@denx.de> wrote:

> In message <1271254909-20398-2-git-send-email-agust@denx.de> you wrote:
> > Configure 1GiB address range in DDR LAW and
> > determine the RAM size. Fix DDR LAW afterwards.
> 
> Why 1 GiB? Where is this linit coming from? It seems pretty artificial
> to me?

It is the base address for NAND which is 0x40000000 (1GiB) for all
mpc512x boards in the U-Boot tree. But now I see that it is also
wrong as some boards use 0x30000000 for SRAM base. The upper limit
is 2GiB.

> > -	u32 msize = CONFIG_SYS_DDR_SIZE * 1024 * 1024;
> > +	u32 msize = 1024 * 1024 * 1024;
> 
> I'd rather see a (#define'd) constant used here, espeaically as the
> vlue is used again furhter doewn in the code...

Will fix.

> >  	u32 i;
> >  
> > @@ -148,5 +148,10 @@ long int fixed_sdram(ddr512x_config_t *mddrc_config,
> >  	out_be32(&im->mddrc.ddr_time_config0, mddrc_config->ddr_time_config0);
> >  	out_be32(&im->mddrc.ddr_sys_config, mddrc_config->ddr_sys_config);
> >  
> > +	msize = get_ram_size(CONFIG_SYS_DDR_BASE, 0x40000000);
> 
> ... i. e. here. Using two different notations for the same number
> makes the code even hearder to read and understand.
> 
> I suggest we use CONFIG_SYS_MAX_RAM_SIZE like we do in so many other
> boards, and leave it to the board maintainer to set a usefule default
> value.

Ok, I will submit next patch version with this fix. Thanks!

Best regards,
Anatolij

[U-Boot] [PATCH v2 5/7] mpc5121: add common post_word_load/store code

[Wolfgang Denk]

Dear Anatolij Gustschin,

In message <1268755808-24931-6-git-send-email-agust@denx.de> you wrote:
> Add common post_word_load/post_word_store routines
> for all mpc5121 boards. pdm360ng board support added
> by subsequent patches needs these, as it adds a board
> specific POST test.
> 
> Signed-off-by: Anatolij Gustschin <agust@denx.de>
> ---
> This patch is new in this series. This code was in board
> support file in v1 patch series. Now it is common for
> mpc512x boards.
> 
>  cpu/mpc512x/Makefile   |    1 +
>  cpu/mpc512x/commproc.c |   25 +++++++++++++++++++++++++
>  2 files changed, 26 insertions(+), 0 deletions(-)
>  create mode 100644 cpu/mpc512x/commproc.c

Applied to "u-boot-mpc5xxx" repository. Thanks.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Mr. Cole's Axiom:
        The sum of the intelligence on the planet is a constant;
        the population is growing.

[U-Boot] [PATCH v2 4/7] fdt_support: add partitions fixup in mtd node

[Wolfgang Denk]

Dear Anatolij Gustschin,

In message <1268755808-24931-5-git-send-email-agust@denx.de> you wrote:
> Allow overriding defined partitions in the device tree blob
> using partition info defined in the 'mtdparts' environment
> variable.
> 
> Signed-off-by: Anatolij Gustschin <agust@denx.de>
> Cc: Gerald Van Baren <vanbaren@cideas.com>
> ---
> Changes since first version:
>  - in fdt_fixup_mtdparts() check the presence of "mtdparts"
>    environment variable and don't proceed with initialisation
>    if the variable is not defined (suppresses warning while booting).
> 
>  common/cmd_mtdparts.c       |    2 +-
>  common/fdt_support.c        |  219 +++++++++++++++++++++++++++++++++++++++++++
>  include/fdt_support.h       |    2 +
>  include/jffs2/load_kernel.h |    1 +
>  include/mtd_node.h          |   11 ++
>  5 files changed, 234 insertions(+), 1 deletions(-)
>  create mode 100644 include/mtd_node.h

Applied to "next" branch. Thanks.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
I think there's a world market for about five computers.
         -- attr. Thomas J. Watson (Chairman of the Board, IBM), 1943

[U-Boot] [PATCH v2 3/7] mpc5121: add PSC serial communication routines

[Wolfgang Denk]

Dear Anatolij Gustschin,

In message <1268755808-24931-4-git-send-email-agust@denx.de> you wrote:
> Signed-off-by: Anatolij Gustschin <agust@denx.de>
> ---
> No changes since v1.
> 
>  cpu/mpc512x/serial.c |   87 ++++++++++++++++++++++++++++++++++++++++++++++++++
>  include/serial.h     |    7 ++++
>  2 files changed, 94 insertions(+), 0 deletions(-)

Applied to "u-boot-mpc5xxx" repository. Thanks.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Die Scheu vor Verantwortung ist die Krankheit unserer Zeit.
                                                 -- Otto von Bismarck

[U-Boot] [PATCH v2 2/7] mpc512x: add multi serial PSC support

[Wolfgang Denk]

Dear Anatolij Gustschin,

In message <1268755808-24931-3-git-send-email-agust@denx.de> you wrote:
> Extend mpc512x serial driver to support multiple PSC ports.
> 
> Supsequent patches for PDM360NG board support make use of this
> functionality by defining CONFIG_SERIAL_MULTI in the board config
> file. Additionally the used PSC devices are specified by defining
> e.g. CONFIG_SYS_PSC1, CONFIG_SYS_PSC4 and CONFIG_SYS_PSC6.
> 
> Support for PSC devices other than 1, 3, 4 and 6 is not added
> by this patch because these aren't used currently. In the future
> it can be easily added using DECLARE_PSC_SERIAL_FUNCTIONS(N) and
> INIT_PSC_SERIAL_STRUCTURE(N) macros in cpu/mpc512x/serial.c.
> Additionally you have to add code for registering added
> devices in serial_initialise() in common/serial.c.
> 
> Signed-off-by: Anatolij Gustschin <agust@denx.de>
> ---
> No changes since v1.
> 
>  common/serial.c              |   23 ++++
>  cpu/mpc512x/serial.c         |  266 +++++++++++++++++++++++++++++++++++++-----
>  include/asm-ppc/immap_512x.h |  108 +++++++++---------
>  include/serial.h             |    8 ++
>  4 files changed, 324 insertions(+), 81 deletions(-)

Applied to "u-boot-mpc5xxx" repository. Thanks.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Being schizophrenic is better than living alone.

[U-Boot] [PATCH v2 1/7] mpc512x: make MEM IO Control configuration a board config option

[Wolfgang Denk]

Dear Anatolij Gustschin,

In message <1268755808-24931-2-git-send-email-agust@denx.de> you wrote:
> Signed-off-by: Anatolij Gustschin <agust@denx.de>
> ---
> No changes since v1.
> 
>  cpu/mpc512x/fixed_sdram.c    |    2 +-
>  include/asm-ppc/immap_512x.h |    4 ----
>  include/configs/aria.h       |    2 ++
>  include/configs/mecp5123.h   |    2 ++
>  include/configs/mpc5121ads.h |    2 ++
>  5 files changed, 7 insertions(+), 5 deletions(-)

Applied to "u-boot-mpc5xxx" repository. Thanks.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Death. Destruction. Disease. Horror. That's what war  is  all  about.
That's what makes it a thing to be avoided.
	-- Kirk, "A Taste of Armageddon", stardate 3193.0

[U-Boot] [PATCH v2 0/7] Add support for PDM360NG board

[Wolfgang Denk]

Dear Anatolij Gustschin,

In message <1268755808-24931-1-git-send-email-agust@denx.de> you wrote:
> This patch series intend to support MPC5121e based
> PDM360NG board. Patches preceding the actual board
> support patch 6 prepare needed infrastructure for
> the PDM360NG board.

Argh... so I applied an old version of these patches.  OK, I can still
undo this; no damage done except wasted work and time.

To avoid this in the future please make sure to use proper threading
when you resubmit a patch series - this new submission was in no way
linked to your previous one.  Thanks.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Quantum Mechanics is God's version of "Trust me."