* [U-Boot] tlbentry for U3 bit
2010-04-19 10:42 [U-Boot] tlbentry for U3 bit Ronny D
@ 2010-04-19 11:15 ` Stefan Roese
0 siblings, 0 replies; 2+ messages in thread
From: Stefan Roese @ 2010-04-19 11:15 UTC (permalink / raw)
To: u-boot
Hi Ronny,
On Monday 19 April 2010 12:42:29 Ronny D wrote:
> I am using ppc440 based board. I have
> added one tlbentry in init.S for memctrl register with U3 bit enable.
>
> When I check the tlb entry through
> BDI I found that U3 bit is disabled.
>
> I have done the same thing using
> change_tlb then I have seen U3 bit enabled through BDI.
>
> Please let me know
>
> Is there any limitation of initS
> for setting tlbenty with U3 bit enable?
Take a look at the "tlbentry" macro (arch/ppc/include/mmu.h). As you can see,
the TLB2 macro does not allow changing any of the Ux bits:
#define tlbentry(epn,sz,rpn,erpn,attr)\
.long TLB0(epn,sz),TLB1(rpn,erpn),TLB2(attr)
#define TLB2(a) ((a) & 0x00000fbf)
So you need to change TLB2 if you need to set those Ux bits.
BTW: The PPC440 users manual mentions that the U3 storage attribute has no
effect on PPC440. So I'm wondering what you are trying to achieve by setting
this bit.
Cheers,
Stefan
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